target/linux/brcm63xx/dts/bcm63268.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "brcm,bcm63268";
   5
   6         aliases {
   7                 pinctrl = &pinctrl;
   8                 spi0 = &lsspi;
   9                 spi1 = &hsspi;
  10         };
  11
  12         cpus {
  13                 #address-cells = <1>;
  14                 #size-cells = <0>;
  15
  16                 cpu@0 {
  17                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  18                         device_type = "cpu";
  19                         reg = <0>;
  20                 };
  21
  22                 cpu@1 {
  23                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  24                         device_type = "cpu";
  25                         reg = <1>;
  26                 };
  27         };
  28
  29         cpu_intc: interrupt-controller {
  30                 #address-cells = <0>;
  31                 compatible = "mti,cpu-interrupt-controller";
  32
  33                 interrupt-controller;
  34                 #interrupt-cells = <1>;
  35         };
  36
  37         memory { device_type = "memory"; reg = <0 0>; };
  38
  39         ubus@10000000 {
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42                 ranges;
  43                 compatible = "simple-bus";
  44                 interrupt-parent = <&periph_intc>;
  45
  46                 ext_intc: interrupt-controller@10000018 {
  47                         compatible = "brcm,bcm6345-ext-intc";
  48                         reg = <0x10000018 0x4>;
  49
  50                         interrupt-controller;
  51                         #interrupt-cells = <2>;
  52
  53                         interrupts = <44>, <45>, <46>, <47>;
  54                 };
  55
  56                 periph_intc: interrupt-controller@10000020 {
  57                         compatible = "brcm,bcm6345-l1-intc";
  58                         reg = <0x10000020 0x20>,
  59                               <0x10000040 0x20>;
  60
  61                         interrupt-controller;
  62                         #interrupt-cells = <1>;
  63
  64                         interrupt-parent = <&cpu_intc>;
  65                         interrupts = <2>, <3>;
  66                 };
  67
  68                 pinctrl: pin-controller@100000c0 {
  69                         compatible = "brcm,bcm63268-pinctrl";
  70                         reg = <0x100000c0 0x8>,
  71                               <0x100000c8 0x8>,
  72                               <0x100000d0 0x4>,
  73                               <0x100000d8 0x4>,
  74                               <0x100000dc 0x4>,
  75                               <0x100000f8 0x4>;
  76                         reg-names = "dirout", "dat", "led", "mode",
  77                                     "ctrl", "basemode";
  78
  79                         gpio-controller;
  80                         #gpio-cells = <2>;
  81
  82                         interrupt-parent = <&periph_intc>;
  83                         interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
  84                         interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
  85
  86                         pinctrl_serial_led: serial_led {
  87                                 pinctrl_serial_led_clk: serial_led_clk {
  88                                         function = "serial_led_clk";
  89                                         pins = "gpio0";
  90                                 };
  91
  92                                 pinctrl_serial_led_data: serial_led_data {
  93                                         function = "serial_led_data";
  94                                         pins = "gpio1";
  95                                 };
  96                         };
  97
  98                         pinctrl_hsspi_cs4: hsspi_cs4 {
  99                                 function = "hsspi_cs4";
 100                                 pins = "gpio16";
 101                         };
 102
 103                         pinctrl_hsspi_cs5: hsspi_cs5 {
 104                                 function = "hsspi_cs5";
 105                                 pins = "gpio17";
 106                         };
 107
 108                         pinctrl_hsspi_cs6: hsspi_cs6 {
 109                                 function = "hsspi_cs6";
 110                                 pins = "gpio8";
 111                         };
 112
 113                         pinctrl_hsspi_cs7: hsspi_cs7 {
 114                                 function = "hsspi_cs7";
 115                                 pins = "gpio9";
 116                         };
 117
 118                         pinctrl_adsl_spi: adsl_spi {
 119                                 pinctrl_adsl_spi_miso: adsl_spi_miso {
 120                                         function = "adsl_spi_miso";
 121                                         pins = "gpio18";
 122                                 };
 123
 124                                 pinctrl_adsl_spi_mosi: adsl_spi_mosi {
 125                                         function = "adsl_spi_mosi";
 126                                         pins = "gpio19";
 127                                 };
 128                         };
 129
 130                         pinctrl_vreq_clk: vreq_clk {
 131                                 function = "vreq_clk";
 132                                 pins = "gpio22";
 133                         };
 134
 135                         pinctrl_pcie_clkreq_b: pcie_clkreq_b {
 136                                 function = "pcie_clkreq_b";
 137                                 pins = "gpio23";
 138                         };
 139
 140                         pinctrl_robosw_led_clk: robosw_led_clk {
 141                                 function = "robosw_led_clk";
 142                                 pins = "gpio30";
 143                         };
 144
 145                         pinctrl_robosw_led_data: robosw_led_data {
 146                                 function = "robosw_led_data";
 147                                 pins = "gpio31";
 148                         };
 149
 150                         pinctrl_nand: nand {
 151                                 function = "nand";
 152                                 group = "nand_grp";
 153                         };
 154
 155                         pinctrl_gpio35_alt: gpio35_alt {
 156                                 function = "gpio35_alt";
 157                                 pin = "gpio35";
 158                         };
 159
 160                         pinctrl_dectpd: dectpd {
 161                                 function = "dectpd";
 162                                 group = "dectpd_grp";
 163                         };
 164
 165                         pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
 166                                 function = "vdsl_phy_override_0";
 167                                 group = "vdsl_phy_override_0_grp";
 168                         };
 169
 170                         pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
 171                                 function = "vdsl_phy_override_1";
 172                                 group = "vdsl_phy_override_1_grp";
 173                         };
 174
 175                         pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
 176                                 function = "vdsl_phy_override_2";
 177                                 group = "vdsl_phy_override_2_grp";
 178                         };
 179
 180                         pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
 181                                 function = "vdsl_phy_override_3";
 182                                 group = "vdsl_phy_override_3_grp";
 183                         };
 184
 185                         pinctrl_dsl_gpio8: dsl_gpio8 {
 186                                 function = "dsl_gpio8";
 187                                 group = "dsl_gpio8";
 188                         };
 189
 190                         pinctrl_dsl_gpio9: dsl_gpio9 {
 191                                 function = "dsl_gpio9";
 192                                 group = "dsl_gpio9";
 193                         };
 194                 };
 195
 196                 lsspi: spi@10000800 {
 197                         #address-cells = <1>;
 198                         #size-cells = <0>;
 199                         compatible = "brcm,bcm6358-spi";
 200                         reg = <0x10000800 0x70c>;
 201                         interrupts = <80>;
 202                         /* clocks = <&clkctl 15>; */
 203                 };
 204
 205                 hsspi: spi@10001000 {
 206                         #address-cells = <1>;
 207                         #size-cells = <0>;
 208                         compatible = "brcm,bcm6328-hsspi";
 209                         reg = <0x10001000 0x600>;
 210                         interrupts = <6>;
 211                         /* clocks = <&clkctl 16>; */
 212                 };
 213
 214                 leds: led-controller@10001900 {
 215                         #address-cells = <1>;
 216                         #size-cells = <0>;
 217                         compatible = "brcm,bcm6328-leds";
 218                         reg = <0x10001900 0x24>;
 219                         status = "disabled";
 220                 };
 221         };
 222 };