add support for Linux 3.6
[openwrt/staging/lynxis/omap.git] / target / linux / ar7 / patches-3.6 / 972-cpmac_fixup.patch
1 --- a/arch/mips/ar7/platform.c
2 +++ b/arch/mips/ar7/platform.c
3 @@ -709,26 +709,23 @@ static int __init ar7_register_devices(v
4 }
5
6 if (ar7_has_high_cpmac()) {
7 + cpmac_get_mac(0, cpmac_high_data.dev_addr);
8 +
9 res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
10 - if (!res) {
11 - cpmac_get_mac(1, cpmac_high_data.dev_addr);
12 + if (!res)
13 + pr_warning("unable to register fixed phy for cpmac-high: %d\n", res);
14
15 - res = platform_device_register(&cpmac_high);
16 - if (res)
17 - pr_warning("unable to register cpmac-high: %d\n", res);
18 - } else
19 - pr_warning("unable to add cpmac-high phy: %d\n", res);
20 - } else
21 + res = platform_device_register(&cpmac_high);
22 + if (res)
23 + pr_warning("unable to register cpmac-high: %d\n", res);
24 + cpmac_get_mac(1, cpmac_low_data.dev_addr);
25 + } else {
26 cpmac_low_data.phy_mask = 0xffffffff;
27 -
28 - res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
29 - if (!res) {
30 cpmac_get_mac(0, cpmac_low_data.dev_addr);
31 - res = platform_device_register(&cpmac_low);
32 - if (res)
33 - pr_warning("unable to register cpmac-low: %d\n", res);
34 - } else
35 - pr_warning("unable to add cpmac-low phy: %d\n", res);
36 + }
37 + res = platform_device_register(&cpmac_low);
38 + if (res)
39 + pr_warning("unable to register cpmac-low: %d\n", res);
40
41 detect_leds();
42 res = platform_device_register(&ar7_gpio_leds);
43 @@ -741,8 +738,10 @@ static int __init ar7_register_devices(v
44
45 /* Register watchdog only if enabled in hardware */
46 bootcr = ioremap_nocache(AR7_REGS_DCL, 4);
47 - val = readl(bootcr);
48 - iounmap(bootcr);
49 + if (bootcr) {
50 + val = readl(bootcr);
51 + iounmap(bootcr);
52 + }
53 if (val & AR7_WDT_HW_ENA) {
54 if (ar7_has_high_vlynq())
55 ar7_wdt_res.start = UR8_REGS_WDT;
56 --- a/arch/mips/include/asm/mach-ar7/ar7.h
57 +++ b/arch/mips/include/asm/mach-ar7/ar7.h
58 @@ -42,6 +42,7 @@
59 #define AR7_REGS_PINSEL (AR7_REGS_BASE + 0x160C)
60 #define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
61 #define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00)
62 +#define AR7_REGS_MII (AR7_REGS_BASE + 0x1a08)
63 #define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00)
64 #define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00)
65 #define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400)
66 --- a/drivers/net/ethernet/ti/cpmac.c
67 +++ b/drivers/net/ethernet/ti/cpmac.c
68 @@ -35,7 +35,6 @@
69 #include <linux/skbuff.h>
70 #include <linux/mii.h>
71 #include <linux/phy.h>
72 -#include <linux/phy_fixed.h>
73 #include <linux/platform_device.h>
74 #include <linux/dma-mapping.h>
75 #include <linux/clk.h>
76 @@ -48,14 +47,11 @@ MODULE_LICENSE("GPL");
77 MODULE_ALIAS("platform:cpmac");
78
79 static int debug_level = 8;
80 -static int dumb_switch;
81
82 -/* Next 2 are only used in cpmac_probe, so it's pointless to change them */
83 +/* Next is only used in cpmac_probe, so it's pointless to change them */
84 module_param(debug_level, int, 0444);
85 -module_param(dumb_switch, int, 0444);
86
87 MODULE_PARM_DESC(debug_level, "Number of NETIF_MSG bits to enable");
88 -MODULE_PARM_DESC(dumb_switch, "Assume switch is not connected to MDIO bus");
89
90 #define CPMAC_VERSION "0.5.2"
91 /* frame size + 802.1q tag + FCS size */
92 @@ -674,9 +670,8 @@ static void cpmac_hw_start(struct net_de
93 for (i = 0; i < 8; i++)
94 cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]);
95 cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]);
96 - cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] |
97 - (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) |
98 - (dev->dev_addr[3] << 24));
99 + cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, be32_to_cpu(*(u32 *)
100 + dev->dev_addr));
101 cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE);
102 cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
103 cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
104 @@ -1121,25 +1116,19 @@ static int __devinit cpmac_probe(struct
105
106 pdata = pdev->dev.platform_data;
107
108 - if (external_switch || dumb_switch) {
109 - strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); /* fixed phys bus */
110 - phy_id = pdev->id;
111 - } else {
112 - for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
113 - if (!(pdata->phy_mask & (1 << phy_id)))
114 - continue;
115 - if (!cpmac_mii->phy_map[phy_id])
116 - continue;
117 - strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
118 - break;
119 - }
120 + for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
121 + if (!(pdata->phy_mask & (1 << phy_id)))
122 + continue;
123 + if (!cpmac_mii->phy_map[phy_id])
124 + continue;
125 + strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
126 + break;
127 }
128
129 - if (phy_id == PHY_MAX_ADDR) {
130 - dev_err(&pdev->dev, "no PHY present, falling back "
131 - "to switch on MDIO bus 0\n");
132 - strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); /* fixed phys bus */
133 + if (phy_id == PHY_MAX_ADDR && pdev->id == 1) {
134 + printk(KERN_ERR "cpmac: No PHY present, using fixed PHY\n");
135 phy_id = pdev->id;
136 + strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);
137 }
138
139 dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
140 @@ -1175,6 +1164,13 @@ static int __devinit cpmac_probe(struct
141 snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT,
142 mdio_bus_id, phy_id);
143
144 + rc = register_netdev(dev);
145 + if (rc) {
146 + printk(KERN_ERR "cpmac: error %i registering device %s\n", rc,
147 + dev->name);
148 + goto fail;
149 + }
150 +
151 priv->phy = phy_connect(dev, priv->phy_name, cpmac_adjust_link, 0,
152 PHY_INTERFACE_MODE_MII);
153
154 @@ -1186,13 +1182,6 @@ static int __devinit cpmac_probe(struct
155 goto fail;
156 }
157
158 - rc = register_netdev(dev);
159 - if (rc) {
160 - printk(KERN_ERR "cpmac: error %i registering device %s\n", rc,
161 - dev->name);
162 - goto fail;
163 - }
164 -
165 if (netif_msg_probe(priv)) {
166 printk(KERN_INFO
167 "cpmac: device %s (regs: %p, irq: %d, phy: %s, "
168 @@ -1225,6 +1214,7 @@ int __devinit cpmac_init(void)
169 {
170 u32 mask;
171 int i, res;
172 + void __iomem *mii_reg;
173
174 cpmac_mii = mdiobus_alloc();
175 if (cpmac_mii == NULL)
176 @@ -1248,31 +1238,51 @@ int __devinit cpmac_init(void)
177 ar7_gpio_disable(26);
178 ar7_gpio_disable(27);
179
180 - if (!ar7_is_titan()) {
181 + if (ar7_is_titan()) {
182 + ar7_device_reset(AR7_RESET_BIT_EPHY);
183 + ar7_device_reset(TITAN_RESET_BIT_EPHY1);
184 + } else {
185 + ar7_device_reset(AR7_RESET_BIT_EPHY);
186 ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
187 ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
188 }
189 - ar7_device_reset(AR7_RESET_BIT_EPHY);
190 -
191 - if (ar7_is_titan())
192 - ar7_device_reset(TITAN_RESET_BIT_EPHY1);
193
194 cpmac_mii->reset(cpmac_mii);
195
196 for (i = 0; i < 300; i++) {
197 mask = cpmac_read(cpmac_mii->priv, CPMAC_MDIO_ALIVE);
198 + mask &= ar7_is_titan()? ~(0x80000000 | 0x40000000) : ~(0x80000000);
199 if (mask)
200 break;
201 else
202 msleep(10);
203 }
204
205 - mask &= 0x7fffffff;
206 if (mask & (mask - 1)) {
207 external_switch = 1;
208 - mask = 0;
209 + if (!ar7_has_high_cpmac()) {
210 + if (ar7_is_titan()) {
211 + ar7_device_disable(AR7_RESET_BIT_EPHY);
212 + ar7_device_disable(TITAN_RESET_BIT_EPHY1);
213 + } else
214 + ar7_device_disable(AR7_RESET_BIT_EPHY);
215 +
216 + //Titan remap might be different
217 + mii_reg = ioremap(AR7_REGS_MII, 4);
218 + if (mii_reg) {
219 + writel(readl(mii_reg) | 1, mii_reg);
220 + iounmap(mii_reg);
221 + }
222 + }
223 }
224
225 + if (external_switch)
226 + printk(KERN_INFO "EXTERNAL SWITCH!!!\n");
227 + else if (mask)
228 + printk(KERN_INFO "EXTERNAL PHY!!!\n");
229 + else
230 + printk(KERN_INFO "INTERNAL PHY!!!\n");
231 +
232 if (ar7_is_titan())
233 cpmac_mii->phy_mask = ~(mask | 0x80000000 | 0x40000000);
234 else