projects / openwrt / staging / lynxis / omap.git / blob
? search:


8bfc0d407184186bf7140289eb65f1230039cebc
[openwrt/staging/lynxis/omap.git] / target / linux / avr32 / patches / 100-git_sync.patch
1 Index: linux-2.6.24.7/arch/avr32/boards/atngw100/Kconfig
2 ===================================================================
3 --- /dev/null
4 +++ linux-2.6.24.7/arch/avr32/boards/atngw100/Kconfig
5 @@ -0,0 +1,12 @@
6 +# NGW100 customization
7 +
8 +config BOARD_ATNGW100_I2C_GPIO
9 + bool "Use GPIO for i2c instead of built-in TWI module"
10 + help
11 + The driver for the built-in TWI module has been plagued by
12 + various problems, while the i2c-gpio driver is based on the
13 + trusty old i2c-algo-bit bitbanging engine, making it work
14 + on pretty much any setup.
15 +
16 + Choose 'Y' here if you're having i2c-related problems and
17 + want to rule out the i2c bus driver.
18 Index: linux-2.6.24.7/arch/avr32/boards/atngw100/setup.c
19 ===================================================================
20 --- linux-2.6.24.7.orig/arch/avr32/boards/atngw100/setup.c
21 +++ linux-2.6.24.7/arch/avr32/boards/atngw100/setup.c
22 @@ -20,7 +20,7 @@
23 #include <asm/io.h>
24 #include <asm/setup.h>
25
26 -#include <asm/arch/at32ap7000.h>
27 +#include <asm/arch/at32ap700x.h>
28 #include <asm/arch/board.h>
29 #include <asm/arch/init.h>
30 #include <asm/arch/portmux.h>
31 @@ -37,11 +37,16 @@ static struct eth_platform_data __initda
32 static struct spi_board_info spi0_board_info[] __initdata = {
33 {
34 .modalias = "mtd_dataflash",
35 - .max_speed_hz = 10000000,
36 + .max_speed_hz = 8000000,
37 .chip_select = 0,
38 },
39 };
40
41 +static struct mci_platform_data __initdata mci0_data = {
42 + .detect_pin = GPIO_PIN_PC(25),
43 + .wp_pin = GPIO_PIN_PE(0),
44 +};
45 +
46 /*
47 * The next two functions should go away as the boot loader is
48 * supposed to initialize the macb address registers with a valid
49 @@ -124,6 +129,7 @@ static struct platform_device ngw_gpio_l
50 }
51 };
52
53 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
54 static struct i2c_gpio_platform_data i2c_gpio_data = {
55 .sda_pin = GPIO_PIN_PA(6),
56 .scl_pin = GPIO_PIN_PA(7),
57 @@ -139,6 +145,7 @@ static struct platform_device i2c_gpio_d
58 .platform_data = &i2c_gpio_data,
59 },
60 };
61 +#endif
62
63 static int __init atngw100_init(void)
64 {
65 @@ -157,6 +164,7 @@ static int __init atngw100_init(void)
66 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
67
68 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
69 + at32_add_device_mci(0, &mci0_data);
70 at32_add_device_usba(0, NULL);
71
72 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
73 @@ -165,11 +173,15 @@ static int __init atngw100_init(void)
74 }
75 platform_device_register(&ngw_gpio_leds);
76
77 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
78 at32_select_gpio(i2c_gpio_data.sda_pin,
79 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
80 at32_select_gpio(i2c_gpio_data.scl_pin,
81 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
82 platform_device_register(&i2c_gpio_device);
83 +#else
84 + at32_add_device_twi(0, NULL, 0);
85 +#endif
86
87 return 0;
88 }
89 Index: linux-2.6.24.7/arch/avr32/boards/atstk1000/atstk1000.h
90 ===================================================================
91 --- linux-2.6.24.7.orig/arch/avr32/boards/atstk1000/atstk1000.h
92 +++ linux-2.6.24.7/arch/avr32/boards/atstk1000/atstk1000.h
93 @@ -12,4 +12,6 @@
94
95 extern struct atmel_lcdfb_info atstk1000_lcdc_data;
96
97 +void atstk1000_setup_j2_leds(void);
98 +
99 #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
100 Index: linux-2.6.24.7/arch/avr32/boards/atstk1000/atstk1002.c
101 ===================================================================
102 --- linux-2.6.24.7.orig/arch/avr32/boards/atstk1000/atstk1002.c
103 +++ linux-2.6.24.7/arch/avr32/boards/atstk1000/atstk1002.c
104 @@ -11,7 +11,6 @@
105 #include <linux/etherdevice.h>
106 #include <linux/init.h>
107 #include <linux/kernel.h>
108 -#include <linux/leds.h>
109 #include <linux/platform_device.h>
110 #include <linux/string.h>
111 #include <linux/types.h>
112 @@ -22,7 +21,7 @@
113
114 #include <asm/io.h>
115 #include <asm/setup.h>
116 -#include <asm/arch/at32ap7000.h>
117 +#include <asm/arch/at32ap700x.h>
118 #include <asm/arch/board.h>
119 #include <asm/arch/init.h>
120 #include <asm/arch/portmux.h>
121 @@ -49,18 +48,16 @@ static struct eth_platform_data __initda
122 },
123 };
124
125 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
126 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
127 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
128 static struct at73c213_board_info at73c213_data = {
129 .ssc_id = 0,
130 .shortname = "AVR32 STK1000 external DAC",
131 };
132 #endif
133 -#endif
134
135 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
136 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
137 static struct spi_board_info spi0_board_info[] __initdata = {
138 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
139 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
140 {
141 /* AT73C213 */
142 .modalias = "at73c213",
143 @@ -80,12 +77,25 @@ static struct spi_board_info spi0_board_
144 };
145 #endif
146
147 -#ifdef CONFIG_BOARD_ATSTK1002_SPI1
148 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
149 static struct spi_board_info spi1_board_info[] __initdata = { {
150 /* patch in custom entries here */
151 } };
152 #endif
153
154 +static struct cf_platform_data __initdata cf0_data = {
155 +#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
156 + .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
157 + .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
158 +#else
159 + .detect_pin = GPIO_PIN_NONE,
160 + .reset_pin = GPIO_PIN_NONE,
161 +#endif
162 + .vcc_pin = GPIO_PIN_NONE,
163 + .ready_pin = GPIO_PIN_PB(27),
164 + .cs = 4,
165 +};
166 +
167 /*
168 * The next two functions should go away as the boot loader is
169 * supposed to initialize the macb address registers with a valid
170 @@ -141,68 +151,8 @@ static void __init set_hw_addr(struct pl
171 clk_put(pclk);
172 }
173
174 -#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
175 -
176 -static struct gpio_led stk_j2_led[] = {
177 -#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
178 -#define LEDSTRING "J2 jumpered to LED8"
179 - { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
180 - { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
181 - { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
182 - { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
183 - { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
184 - { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
185 - { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
186 - { .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
187 - .default_trigger = "heartbeat", },
188 -#else /* RGB */
189 -#define LEDSTRING "J2 jumpered to RGB LEDs"
190 - { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
191 - { .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
192 - { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
193 -
194 - { .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
195 - .default_trigger = "heartbeat", },
196 - { .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
197 - { .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
198 - .default_trigger = "heartbeat", },
199 - /* PB16, PB30 unused */
200 -#endif
201 -};
202 -
203 -static struct gpio_led_platform_data stk_j2_led_data = {
204 - .num_leds = ARRAY_SIZE(stk_j2_led),
205 - .leds = stk_j2_led,
206 -};
207 -
208 -static struct platform_device stk_j2_led_dev = {
209 - .name = "leds-gpio",
210 - .id = 2, /* gpio block J2 */
211 - .dev = {
212 - .platform_data = &stk_j2_led_data,
213 - },
214 -};
215 -
216 -static void setup_j2_leds(void)
217 -{
218 - unsigned i;
219 -
220 - for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
221 - at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
222 -
223 - printk("STK1002: " LEDSTRING "\n");
224 - platform_device_register(&stk_j2_led_dev);
225 -}
226 -
227 -#else
228 -static void setup_j2_leds(void)
229 -{
230 -}
231 -#endif
232 -
233 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
234 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
235 -static void __init at73c213_set_clk(struct at73c213_board_info *info)
236 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
237 +static void __init atstk1002_setup_extdac(void)
238 {
239 struct clk *gclk;
240 struct clk *pll;
241 @@ -220,7 +170,7 @@ static void __init at73c213_set_clk(stru
242 }
243
244 at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
245 - info->dac_clk = gclk;
246 + at73c213_data.dac_clk = gclk;
247
248 err_set_clk:
249 clk_put(pll);
250 @@ -229,12 +179,16 @@ err_pll:
251 err_gclk:
252 return;
253 }
254 -#endif
255 -#endif
256 +#else
257 +static void __init atstk1002_setup_extdac(void)
258 +{
259 +
260 +}
261 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
262
263 void __init setup_board(void)
264 {
265 -#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
266 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
267 at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
268 #else
269 at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
270 @@ -271,7 +225,7 @@ static int __init atstk1002_init(void)
271
272 at32_add_system_devices();
273
274 -#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
275 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
276 at32_add_device_usart(1);
277 #else
278 at32_add_device_usart(0);
279 @@ -281,12 +235,16 @@ static int __init atstk1002_init(void)
280 #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
281 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
282 #endif
283 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
284 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
285 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
286 #endif
287 -#ifdef CONFIG_BOARD_ATSTK1002_SPI1
288 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
289 at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
290 #endif
291 + at32_add_device_twi(0, NULL, 0);
292 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
293 + at32_add_device_mci(0, NULL);
294 +#endif
295 #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
296 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
297 #else
298 @@ -294,18 +252,23 @@ static int __init atstk1002_init(void)
299 fbmem_start, fbmem_size);
300 #endif
301 at32_add_device_usba(0, NULL);
302 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
303 - at32_add_device_ssc(0, ATMEL_SSC_TX);
304 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
305 + at32_add_device_ac97c(0);
306 +#else
307 + at32_add_device_abdac(0);
308 #endif
309 -
310 - setup_j2_leds();
311 -
312 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
313 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
314 - at73c213_set_clk(&at73c213_data);
315 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
316 + at32_add_device_ssc(0, ATMEL_SSC_TX);
317 #endif
318 + at32_add_device_cf(0, 2, &cf0_data);
319 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
320 + at32_add_device_psif(0);
321 + at32_add_device_psif(1);
322 #endif
323
324 + atstk1000_setup_j2_leds();
325 + atstk1002_setup_extdac();
326 +
327 return 0;
328 }
329 postcore_initcall(atstk1002_init);
330 Index: linux-2.6.24.7/arch/avr32/boards/atstk1000/atstk1003.c
331 ===================================================================
332 --- /dev/null
333 +++ linux-2.6.24.7/arch/avr32/boards/atstk1000/atstk1003.c
334 @@ -0,0 +1,185 @@
335 +/*
336 + * ATSTK1003 daughterboard-specific init code
337 + *
338 + * Copyright (C) 2007 Atmel Corporation
339 + *
340 + * This program is free software; you can redistribute it and/or modify
341 + * it under the terms of the GNU General Public License version 2 as
342 + * published by the Free Software Foundation.
343 + */
344 +#include <linux/clk.h>
345 +#include <linux/err.h>
346 +#include <linux/init.h>
347 +#include <linux/kernel.h>
348 +#include <linux/platform_device.h>
349 +#include <linux/string.h>
350 +#include <linux/types.h>
351 +
352 +#include <linux/spi/at73c213.h>
353 +#include <linux/spi/spi.h>
354 +
355 +#include <asm/setup.h>
356 +
357 +#include <asm/arch/at32ap700x.h>
358 +#include <asm/arch/board.h>
359 +#include <asm/arch/init.h>
360 +#include <asm/arch/portmux.h>
361 +
362 +#include "atstk1000.h"
363 +
364 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
365 +static struct at73c213_board_info at73c213_data = {
366 + .ssc_id = 0,
367 + .shortname = "AVR32 STK1000 external DAC",
368 +};
369 +#endif
370 +
371 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
372 +static struct spi_board_info spi0_board_info[] __initdata = {
373 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
374 + {
375 + /* AT73C213 */
376 + .modalias = "at73c213",
377 + .max_speed_hz = 200000,
378 + .chip_select = 0,
379 + .mode = SPI_MODE_1,
380 + .platform_data = &at73c213_data,
381 + },
382 +#endif
383 + /*
384 + * We can control the LTV350QV LCD panel, but it isn't much
385 + * point since we don't have an LCD controller...
386 + */
387 +};
388 +#endif
389 +
390 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
391 +static struct spi_board_info spi1_board_info[] __initdata = { {
392 + /* patch in custom entries here */
393 +} };
394 +#endif
395 +
396 +static struct cf_platform_data __initdata cf0_data = {
397 +#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
398 + .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
399 + .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
400 +#else
401 + .detect_pin = GPIO_PIN_NONE,
402 + .reset_pin = GPIO_PIN_NONE,
403 +#endif
404 + .vcc_pin = GPIO_PIN_NONE,
405 + .ready_pin = GPIO_PIN_PB(27),
406 + .cs = 4,
407 +};
408 +
409 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
410 +static void __init atstk1003_setup_extdac(void)
411 +{
412 + struct clk *gclk;
413 + struct clk *pll;
414 +
415 + gclk = clk_get(NULL, "gclk0");
416 + if (IS_ERR(gclk))
417 + goto err_gclk;
418 + pll = clk_get(NULL, "pll0");
419 + if (IS_ERR(pll))
420 + goto err_pll;
421 +
422 + if (clk_set_parent(gclk, pll)) {
423 + pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
424 + goto err_set_clk;
425 + }
426 +
427 + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
428 + at73c213_data.dac_clk = gclk;
429 +
430 +err_set_clk:
431 + clk_put(pll);
432 +err_pll:
433 + clk_put(gclk);
434 +err_gclk:
435 + return;
436 +}
437 +#else
438 +static void __init atstk1003_setup_extdac(void)
439 +{
440 +
441 +}
442 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
443 +
444 +void __init setup_board(void)
445 +{
446 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
447 + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
448 +#else
449 + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
450 +#endif
451 + /* USART 2/unused: expansion connector */
452 + at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
453 +
454 + at32_setup_serial_console(0);
455 +}
456 +
457 +static int __init atstk1003_init(void)
458 +{
459 + /*
460 + * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
461 + * SDRAM-specific pins so that nobody messes with them.
462 + */
463 + at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
464 + at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
465 + at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
466 + at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
467 + at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
468 + at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
469 + at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
470 + at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
471 + at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
472 + at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
473 + at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
474 + at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
475 + at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
476 + at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
477 + at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
478 + at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
479 + at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
480 +
481 + at32_add_system_devices();
482 +
483 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
484 + at32_add_device_usart(1);
485 +#else
486 + at32_add_device_usart(0);
487 +#endif
488 + at32_add_device_usart(2);
489 +
490 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
491 + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
492 +#endif
493 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
494 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
495 +#endif
496 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
497 + at32_add_device_mci(0, NULL);
498 +#endif
499 + at32_add_device_usba(0, NULL);
500 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
501 + at32_add_device_ac97c(0);
502 +#else
503 + at32_add_device_abdac(0);
504 +#endif
505 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
506 + at32_add_device_ssc(0, ATMEL_SSC_TX);
507 +#endif
508 + at32_add_device_cf(0, 2, &cf0_data);
509 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
510 + at32_add_device_psif(0);
511 + at32_add_device_psif(1);
512 +#endif
513 +
514 + atstk1000_setup_j2_leds();
515 + atstk1003_setup_extdac();
516 +
517 + return 0;
518 +}
519 +postcore_initcall(atstk1003_init);
520 Index: linux-2.6.24.7/arch/avr32/boards/atstk1000/atstk1004.c
521 ===================================================================
522 --- /dev/null
523 +++ linux-2.6.24.7/arch/avr32/boards/atstk1000/atstk1004.c
524 @@ -0,0 +1,156 @@
525 +/*
526 + * ATSTK1003 daughterboard-specific init code
527 + *
528 + * Copyright (C) 2007 Atmel Corporation
529 + *
530 + * This program is free software; you can redistribute it and/or modify
531 + * it under the terms of the GNU General Public License version 2 as
532 + * published by the Free Software Foundation.
533 + */
534 +#include <linux/clk.h>
535 +#include <linux/err.h>
536 +#include <linux/init.h>
537 +#include <linux/kernel.h>
538 +#include <linux/platform_device.h>
539 +#include <linux/string.h>
540 +#include <linux/types.h>
541 +
542 +#include <linux/spi/at73c213.h>
543 +#include <linux/spi/spi.h>
544 +
545 +#include <video/atmel_lcdc.h>
546 +
547 +#include <asm/setup.h>
548 +
549 +#include <asm/arch/at32ap700x.h>
550 +#include <asm/arch/board.h>
551 +#include <asm/arch/init.h>
552 +#include <asm/arch/portmux.h>
553 +
554 +#include "atstk1000.h"
555 +
556 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
557 +static struct at73c213_board_info at73c213_data = {
558 + .ssc_id = 0,
559 + .shortname = "AVR32 STK1000 external DAC",
560 +};
561 +#endif
562 +
563 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
564 +static struct spi_board_info spi0_board_info[] __initdata = {
565 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
566 + {
567 + /* AT73C213 */
568 + .modalias = "at73c213",
569 + .max_speed_hz = 200000,
570 + .chip_select = 0,
571 + .mode = SPI_MODE_1,
572 + .platform_data = &at73c213_data,
573 + },
574 +#endif
575 + {
576 + /* QVGA display */
577 + .modalias = "ltv350qv",
578 + .max_speed_hz = 16000000,
579 + .chip_select = 1,
580 + .mode = SPI_MODE_3,
581 + },
582 +};
583 +#endif
584 +
585 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
586 +static struct spi_board_info spi1_board_info[] __initdata = { {
587 + /* patch in custom entries here */
588 +} };
589 +#endif
590 +
591 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
592 +static void __init atstk1004_setup_extdac(void)
593 +{
594 + struct clk *gclk;
595 + struct clk *pll;
596 +
597 + gclk = clk_get(NULL, "gclk0");
598 + if (IS_ERR(gclk))
599 + goto err_gclk;
600 + pll = clk_get(NULL, "pll0");
601 + if (IS_ERR(pll))
602 + goto err_pll;
603 +
604 + if (clk_set_parent(gclk, pll)) {
605 + pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
606 + goto err_set_clk;
607 + }
608 +
609 + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
610 + at73c213_data.dac_clk = gclk;
611 +
612 +err_set_clk:
613 + clk_put(pll);
614 +err_pll:
615 + clk_put(gclk);
616 +err_gclk:
617 + return;
618 +}
619 +#else
620 +static void __init atstk1004_setup_extdac(void)
621 +{
622 +
623 +}
624 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
625 +
626 +void __init setup_board(void)
627 +{
628 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
629 + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
630 +#else
631 + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
632 +#endif
633 + /* USART 2/unused: expansion connector */
634 + at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
635 +
636 + at32_setup_serial_console(0);
637 +}
638 +
639 +static int __init atstk1004_init(void)
640 +{
641 + at32_add_system_devices();
642 +
643 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
644 + at32_add_device_usart(1);
645 +#else
646 + at32_add_device_usart(0);
647 +#endif
648 + at32_add_device_usart(2);
649 +
650 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
651 + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
652 +#endif
653 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
654 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
655 +#endif
656 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
657 + at32_add_device_mci(0, NULL);
658 +#endif
659 + at32_add_device_lcdc(0, &atstk1000_lcdc_data,
660 + fbmem_start, fbmem_size);
661 + at32_add_device_usba(0, NULL);
662 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
663 + at32_add_device_ac97c(0);
664 +#else
665 + at32_add_device_abdac(0);
666 +#endif
667 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
668 + at32_add_device_ssc(0, ATMEL_SSC_TX);
669 +#endif
670 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
671 + at32_add_device_psif(0);
672 + at32_add_device_psif(1);
673 +#endif
674 +
675 + atstk1000_setup_j2_leds();
676 + atstk1004_setup_extdac();
677 +
678 + return 0;
679 +}
680 +postcore_initcall(atstk1004_init);
681 Index: linux-2.6.24.7/arch/avr32/boards/atstk1000/Kconfig
682 ===================================================================
683 --- linux-2.6.24.7.orig/arch/avr32/boards/atstk1000/Kconfig
684 +++ linux-2.6.24.7/arch/avr32/boards/atstk1000/Kconfig
685 @@ -1,34 +1,53 @@
686 # STK1000 customization
687
688 -if BOARD_ATSTK1002
689 +if BOARD_ATSTK1000
690
691 -config BOARD_ATSTK1002_CUSTOM
692 - bool "Non-default STK-1002 jumper settings"
693 +choice
694 + prompt "ATSTK1000 CPU daughterboard type"
695 + default BOARD_ATSTK1002
696 +
697 +config BOARD_ATSTK1002
698 + bool "ATSTK1002"
699 + select CPU_AT32AP7000
700 +
701 +config BOARD_ATSTK1003
702 + bool "ATSTK1003"
703 + select CPU_AT32AP7001
704 +
705 +config BOARD_ATSTK1004
706 + bool "ATSTK1004"
707 + select CPU_AT32AP7002
708 +
709 +endchoice
710 +
711 +
712 +config BOARD_ATSTK100X_CUSTOM
713 + bool "Non-default STK1002/STK1003/STK1004 jumper settings"
714 help
715 You will normally leave the jumpers on the CPU card at their
716 default settings. If you need to use certain peripherals,
717 you will need to change some of those jumpers.
718
719 -if BOARD_ATSTK1002_CUSTOM
720 +if BOARD_ATSTK100X_CUSTOM
721
722 -config BOARD_ATSTK1002_SW1_CUSTOM
723 +config BOARD_ATSTK100X_SW1_CUSTOM
724 bool "SW1: use SSC1 (not SPI0)"
725 help
726 This also prevents using the external DAC as an audio interface,
727 and means you can't initialize the on-board QVGA display.
728
729 -config BOARD_ATSTK1002_SW2_CUSTOM
730 +config BOARD_ATSTK100X_SW2_CUSTOM
731 bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
732 help
733 If you change this you'll want an updated boot loader putting
734 the console on UART-C not UART-A.
735
736 -config BOARD_ATSTK1002_SW3_CUSTOM
737 +config BOARD_ATSTK100X_SW3_CUSTOM
738 bool "SW3: use TIMER1 (not SSC0 and GCLK)"
739 help
740 This also prevents using the external DAC as an audio interface.
741
742 -config BOARD_ATSTK1002_SW4_CUSTOM
743 +config BOARD_ATSTK100X_SW4_CUSTOM
744 bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
745 help
746 To use the camera interface you'll need a custom card (on the
747 @@ -36,27 +55,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
748
749 config BOARD_ATSTK1002_SW5_CUSTOM
750 bool "SW5: use MACB1 (not LCDC)"
751 + depends on BOARD_ATSTK1002
752
753 config BOARD_ATSTK1002_SW6_CUSTOM
754 bool "SW6: more GPIOs (not MACB0)"
755 + depends on BOARD_ATSTK1002
756
757 endif # custom
758
759 -config BOARD_ATSTK1002_SPI1
760 +config BOARD_ATSTK100X_SPI1
761 bool "Configure SPI1 controller"
762 - depends on !BOARD_ATSTK1002_SW4_CUSTOM
763 + depends on !BOARD_ATSTK100X_SW4_CUSTOM
764 help
765 All the signals for the second SPI controller are available on
766 GPIO lines and accessed through the J1 jumper block. Say "y"
767 here to configure that SPI controller.
768
769 -config BOARD_ATSTK1002_J2_LED
770 +config BOARD_ATSTK1000_J2_LED
771 bool
772 - default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
773 + default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
774
775 choice
776 prompt "LEDs connected to J2:"
777 - depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
778 + depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
779 optional
780 help
781 Select this if you have jumpered the J2 jumper block to the
782 @@ -64,16 +85,77 @@ choice
783 IDC cable. A default "heartbeat" trigger is provided, but
784 you can of course override this.
785
786 -config BOARD_ATSTK1002_J2_LED8
787 +config BOARD_ATSTK1000_J2_LED8
788 bool "LED0..LED7"
789 help
790 Select this if J2 is jumpered to LED0..LED7 amber leds.
791
792 -config BOARD_ATSTK1002_J2_RGB
793 +config BOARD_ATSTK1000_J2_RGB
794 bool "RGB leds"
795 help
796 Select this if J2 is jumpered to the RGB leds.
797
798 endchoice
799
800 -endif # stk 1002
801 +config BOARD_ATSTK1000_EXTDAC
802 + bool
803 + depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
804 + default y
805 +
806 +config BOARD_ATSTK100X_ENABLE_AC97
807 + bool "Use AC97C instead of ABDAC"
808 + help
809 + Select this if you want to use the built-in AC97 controller
810 + instead of the built-in Audio Bitstream DAC. These share
811 + the same I/O pins on the AP7000, so both can't be enabled
812 + at the same time.
813 +
814 + Note that the STK1000 kit doesn't ship with an AC97 codec on
815 + board, so say N unless you've got an expansion board with an
816 + AC97 codec on it that you want to use.
817 +
818 +config BOARD_ATSTK1000_CF_HACKS
819 + bool "ATSTK1000 CompactFlash hacks"
820 + depends on !BOARD_ATSTK100X_SW4_CUSTOM
821 + help
822 + Select this if you have re-routed the CompactFlash RESET and
823 + CD signals to GPIOs on your STK1000. This is necessary for
824 + reset and card detection to work properly, although some CF
825 + cards may be able to cope without reset.
826 +
827 +config BOARD_ATSTK1000_CF_RESET_PIN
828 + hex "CompactFlash RESET pin"
829 + default 0x30
830 + depends on BOARD_ATSTK1000_CF_HACKS
831 + help
832 + Select which GPIO pin to use for the CompactFlash RESET
833 + signal. This is specified as a hexadecimal number and should
834 + be defined as 0x20 * gpio_port + pin.
835 +
836 + The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
837 +
838 +config BOARD_ATSTK1000_CF_DETECT_PIN
839 + hex "CompactFlash DETECT pin"
840 + default 0x3e
841 + depends on BOARD_ATSTK1000_CF_HACKS
842 + help
843 + Select which GPIO pin to use for the CompactFlash CD
844 + signal. This is specified as a hexadecimal number and should
845 + be defined as 0x20 * gpio_port + pin.
846 +
847 + The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
848 +
849 +config BOARD_ATSTK100X_ENABLE_PSIF
850 + bool "Enable PSIF peripheral (PS/2 support)"
851 + default n
852 + help
853 + Select this if you want to use the PSIF peripheral to hook up PS/2
854 + devices to your STK1000. This will require a hardware modification to
855 + work correctly, since PS/2 devices require 5 volt power and signals,
856 + while the STK1000 only provides 3.3 volt.
857 +
858 + Say N if you have not modified the hardware to boost the voltage, say
859 + Y if you have level convertion hardware or a PS/2 device capable of
860 + operating on 3.3 volt.
861 +
862 +endif # stk 1000
863 Index: linux-2.6.24.7/arch/avr32/boards/atstk1000/Makefile
864 ===================================================================
865 --- linux-2.6.24.7.orig/arch/avr32/boards/atstk1000/Makefile
866 +++ linux-2.6.24.7/arch/avr32/boards/atstk1000/Makefile
867 @@ -1,2 +1,4 @@
868 obj-y += setup.o flash.o
869 obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o
870 +obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o
871 +obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o
872 Index: linux-2.6.24.7/arch/avr32/boards/atstk1000/setup.c
873 ===================================================================
874 --- linux-2.6.24.7.orig/arch/avr32/boards/atstk1000/setup.c
875 +++ linux-2.6.24.7/arch/avr32/boards/atstk1000/setup.c
876 @@ -10,13 +10,17 @@
877 #include <linux/bootmem.h>
878 #include <linux/fb.h>
879 #include <linux/init.h>
880 +#include <linux/platform_device.h>
881 #include <linux/types.h>
882 #include <linux/linkage.h>
883
884 #include <video/atmel_lcdc.h>
885
886 #include <asm/setup.h>
887 +
888 +#include <asm/arch/at32ap700x.h>
889 #include <asm/arch/board.h>
890 +#include <asm/arch/portmux.h>
891
892 #include "atstk1000.h"
893
894 @@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk
895 .default_monspecs = &atstk1000_default_monspecs,
896 .guard_time = 2,
897 };
898 +
899 +#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
900 +#include <linux/leds.h>
901 +
902 +static struct gpio_led stk1000_j2_led[] = {
903 +#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
904 +#define LEDSTRING "J2 jumpered to LED8"
905 + { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
906 + { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
907 + { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
908 + { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
909 + { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
910 + { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
911 + { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
912 + { .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
913 + .default_trigger = "heartbeat", },
914 +#else /* RGB */
915 +#define LEDSTRING "J2 jumpered to RGB LEDs"
916 + { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
917 + { .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
918 + { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
919 +
920 + { .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
921 + .default_trigger = "heartbeat", },
922 + { .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
923 + { .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
924 + .default_trigger = "heartbeat", },
925 + /* PB16, PB30 unused */
926 +#endif
927 +};
928 +
929 +static struct gpio_led_platform_data stk1000_j2_led_data = {
930 + .num_leds = ARRAY_SIZE(stk1000_j2_led),
931 + .leds = stk1000_j2_led,
932 +};
933 +
934 +static struct platform_device stk1000_j2_led_dev = {
935 + .name = "leds-gpio",
936 + .id = 2, /* gpio block J2 */
937 + .dev = {
938 + .platform_data = &stk1000_j2_led_data,
939 + },
940 +};
941 +
942 +void __init atstk1000_setup_j2_leds(void)
943 +{
944 + unsigned i;
945 +
946 + for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
947 + at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
948 +
949 + printk("STK1000: " LEDSTRING "\n");
950 + platform_device_register(&stk1000_j2_led_dev);
951 +}
952 +#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
953 +void __init atstk1000_setup_j2_leds(void)
954 +{
955 +
956 +}
957 +#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
958 Index: linux-2.6.24.7/arch/avr32/configs/atngw100_defconfig
959 ===================================================================
960 --- linux-2.6.24.7.orig/arch/avr32/configs/atngw100_defconfig
961 +++ linux-2.6.24.7/arch/avr32/configs/atngw100_defconfig
962 @@ -1,46 +1,52 @@
963 #
964 # Automatically generated make config: don't edit
965 -# Linux kernel version: 2.6.22-rc5
966 -# Sat Jun 23 15:40:05 2007
967 +# Linux kernel version: 2.6.24
968 +# Thu Mar 6 12:49:54 2008
969 #
970 CONFIG_AVR32=y
971 CONFIG_GENERIC_GPIO=y
972 CONFIG_GENERIC_HARDIRQS=y
973 +CONFIG_STACKTRACE_SUPPORT=y
974 +CONFIG_LOCKDEP_SUPPORT=y
975 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
976 CONFIG_HARDIRQS_SW_RESEND=y
977 CONFIG_GENERIC_IRQ_PROBE=y
978 CONFIG_RWSEM_GENERIC_SPINLOCK=y
979 CONFIG_GENERIC_TIME=y
980 +CONFIG_GENERIC_CLOCKEVENTS=y
981 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
982 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
983 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
984 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
985 CONFIG_GENERIC_HWEIGHT=y
986 CONFIG_GENERIC_CALIBRATE_DELAY=y
987 CONFIG_GENERIC_BUG=y
988 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
989
990 #
991 -# Code maturity level options
992 +# General setup
993 #
994 CONFIG_EXPERIMENTAL=y
995 CONFIG_BROKEN_ON_SMP=y
996 CONFIG_INIT_ENV_ARG_LIMIT=32
997 -
998 -#
999 -# General setup
1000 -#
1001 CONFIG_LOCALVERSION=""
1002 # CONFIG_LOCALVERSION_AUTO is not set
1003 CONFIG_SWAP=y
1004 CONFIG_SYSVIPC=y
1005 -# CONFIG_IPC_NS is not set
1006 CONFIG_SYSVIPC_SYSCTL=y
1007 CONFIG_POSIX_MQUEUE=y
1008 CONFIG_BSD_PROCESS_ACCT=y
1009 CONFIG_BSD_PROCESS_ACCT_V3=y
1010 # CONFIG_TASKSTATS is not set
1011 -# CONFIG_UTS_NS is not set
1012 +# CONFIG_USER_NS is not set
1013 +# CONFIG_PID_NS is not set
1014 # CONFIG_AUDIT is not set
1015 # CONFIG_IKCONFIG is not set
1016 CONFIG_LOG_BUF_SHIFT=14
1017 +# CONFIG_CGROUPS is not set
1018 +CONFIG_FAIR_GROUP_SCHED=y
1019 +CONFIG_FAIR_USER_SCHED=y
1020 +# CONFIG_FAIR_CGROUP_SCHED is not set
1021 CONFIG_SYSFS_DEPRECATED=y
1022 # CONFIG_RELAY is not set
1023 CONFIG_BLK_DEV_INITRD=y
1024 @@ -61,35 +67,28 @@ CONFIG_FUTEX=y
1025 CONFIG_ANON_INODES=y
1026 CONFIG_EPOLL=y
1027 CONFIG_SIGNALFD=y
1028 -CONFIG_TIMERFD=y
1029 CONFIG_EVENTFD=y
1030 CONFIG_SHMEM=y
1031 CONFIG_VM_EVENT_COUNTERS=y
1032 -# CONFIG_SLUB_DEBUG is not set
1033 +CONFIG_SLUB_DEBUG=y
1034 # CONFIG_SLAB is not set
1035 CONFIG_SLUB=y
1036 # CONFIG_SLOB is not set
1037 +CONFIG_SLABINFO=y
1038 CONFIG_RT_MUTEXES=y
1039 # CONFIG_TINY_SHMEM is not set
1040 CONFIG_BASE_SMALL=1
1041 -
1042 -#
1043 -# Loadable module support
1044 -#
1045 CONFIG_MODULES=y
1046 CONFIG_MODULE_UNLOAD=y
1047 CONFIG_MODULE_FORCE_UNLOAD=y
1048 # CONFIG_MODVERSIONS is not set
1049 # CONFIG_MODULE_SRCVERSION_ALL is not set
1050 CONFIG_KMOD=y
1051 -
1052 -#
1053 -# Block layer
1054 -#
1055 CONFIG_BLOCK=y
1056 # CONFIG_LBD is not set
1057 # CONFIG_BLK_DEV_IO_TRACE is not set
1058 # CONFIG_LSF is not set
1059 +# CONFIG_BLK_DEV_BSG is not set
1060
1061 #
1062 # IO Schedulers
1063 @@ -107,21 +106,28 @@ CONFIG_DEFAULT_IOSCHED="cfq"
1064 #
1065 # System Type and features
1066 #
1067 +CONFIG_TICK_ONESHOT=y
1068 +CONFIG_NO_HZ=y
1069 +CONFIG_HIGH_RES_TIMERS=y
1070 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
1071 CONFIG_SUBARCH_AVR32B=y
1072 CONFIG_MMU=y
1073 CONFIG_PERFORMANCE_COUNTERS=y
1074 CONFIG_PLATFORM_AT32AP=y
1075 +CONFIG_CPU_AT32AP700X=y
1076 CONFIG_CPU_AT32AP7000=y
1077 # CONFIG_BOARD_ATSTK1000 is not set
1078 CONFIG_BOARD_ATNGW100=y
1079 +CONFIG_BOARD_ATNGW100_I2C_GPIO=y
1080 CONFIG_LOADER_U_BOOT=y
1081
1082 #
1083 # Atmel AVR32 AP options
1084 #
1085 -# CONFIG_AP7000_32_BIT_SMC is not set
1086 -CONFIG_AP7000_16_BIT_SMC=y
1087 -# CONFIG_AP7000_8_BIT_SMC is not set
1088 +# CONFIG_AP700X_32_BIT_SMC is not set
1089 +CONFIG_AP700X_16_BIT_SMC=y
1090 +# CONFIG_AP700X_8_BIT_SMC is not set
1091 +CONFIG_GPIO_DEV=y
1092 CONFIG_LOAD_ADDRESS=0x10000000
1093 CONFIG_ENTRY_ADDRESS=0x90000000
1094 CONFIG_PHYS_OFFSET=0x10000000
1095 @@ -141,10 +147,14 @@ CONFIG_FLATMEM_MANUAL=y
1096 CONFIG_FLATMEM=y
1097 CONFIG_FLAT_NODE_MEM_MAP=y
1098 # CONFIG_SPARSEMEM_STATIC is not set
1099 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
1100 CONFIG_SPLIT_PTLOCK_CPUS=4
1101 # CONFIG_RESOURCES_64BIT is not set
1102 CONFIG_ZONE_DMA_FLAG=0
1103 +CONFIG_VIRT_TO_BUS=y
1104 # CONFIG_OWNERSHIP_TRACE is not set
1105 +# CONFIG_NMI_DEBUGGING is not set
1106 +CONFIG_DW_DMAC=y
1107 # CONFIG_HZ_100 is not set
1108 CONFIG_HZ_250=y
1109 # CONFIG_HZ_300 is not set
1110 @@ -153,13 +163,31 @@ CONFIG_HZ=250
1111 CONFIG_CMDLINE=""
1112
1113 #
1114 -# Bus options
1115 +# Power management options
1116 #
1117 -# CONFIG_ARCH_SUPPORTS_MSI is not set
1118
1119 #
1120 -# PCCARD (PCMCIA/CardBus) support
1121 +# CPU Frequency scaling
1122 +#
1123 +CONFIG_CPU_FREQ=y
1124 +CONFIG_CPU_FREQ_TABLE=y
1125 +# CONFIG_CPU_FREQ_DEBUG is not set
1126 +# CONFIG_CPU_FREQ_STAT is not set
1127 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
1128 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
1129 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
1130 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
1131 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
1132 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
1133 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
1134 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
1135 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
1136 +CONFIG_CPU_FREQ_AT32AP=y
1137 +
1138 +#
1139 +# Bus options
1140 #
1141 +# CONFIG_ARCH_SUPPORTS_MSI is not set
1142 # CONFIG_PCCARD is not set
1143
1144 #
1145 @@ -213,6 +241,7 @@ CONFIG_INET_TUNNEL=y
1146 CONFIG_INET_XFRM_MODE_TRANSPORT=y
1147 CONFIG_INET_XFRM_MODE_TUNNEL=y
1148 CONFIG_INET_XFRM_MODE_BEET=y
1149 +# CONFIG_INET_LRO is not set
1150 CONFIG_INET_DIAG=y
1151 CONFIG_INET_TCP_DIAG=y
1152 # CONFIG_TCP_CONG_ADVANCED is not set
1153 @@ -240,6 +269,7 @@ CONFIG_IPV6_SIT=y
1154 # CONFIG_NETWORK_SECMARK is not set
1155 CONFIG_NETFILTER=y
1156 # CONFIG_NETFILTER_DEBUG is not set
1157 +CONFIG_BRIDGE_NETFILTER=y
1158
1159 #
1160 # Core Netfilter Configuration
1161 @@ -252,6 +282,7 @@ CONFIG_NF_CONNTRACK_MARK=y
1162 # CONFIG_NF_CONNTRACK_EVENTS is not set
1163 CONFIG_NF_CT_PROTO_GRE=m
1164 # CONFIG_NF_CT_PROTO_SCTP is not set
1165 +# CONFIG_NF_CT_PROTO_UDPLITE is not set
1166 CONFIG_NF_CONNTRACK_AMANDA=m
1167 CONFIG_NF_CONNTRACK_FTP=m
1168 CONFIG_NF_CONNTRACK_H323=m
1169 @@ -269,9 +300,11 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m
1170 CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
1171 CONFIG_NETFILTER_XT_TARGET_NFLOG=m
1172 # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
1173 +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
1174 CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
1175 CONFIG_NETFILTER_XT_MATCH_COMMENT=m
1176 CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
1177 +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
1178 CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
1179 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
1180 # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
1181 @@ -284,6 +317,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
1182 CONFIG_NETFILTER_XT_MATCH_MARK=m
1183 CONFIG_NETFILTER_XT_MATCH_POLICY=m
1184 CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
1185 +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
1186 CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
1187 CONFIG_NETFILTER_XT_MATCH_QUOTA=m
1188 CONFIG_NETFILTER_XT_MATCH_REALM=m
1189 @@ -292,6 +326,8 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m
1190 CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
1191 CONFIG_NETFILTER_XT_MATCH_STRING=m
1192 CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
1193 +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
1194 +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
1195 CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
1196
1197 #
1198 @@ -359,13 +395,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
1199 CONFIG_IP6_NF_MANGLE=m
1200 CONFIG_IP6_NF_TARGET_HL=m
1201 CONFIG_IP6_NF_RAW=m
1202 +
1203 +#
1204 +# Bridge: Netfilter Configuration
1205 +#
1206 +# CONFIG_BRIDGE_NF_EBTABLES is not set
1207 # CONFIG_IP_DCCP is not set
1208 # CONFIG_IP_SCTP is not set
1209 # CONFIG_TIPC is not set
1210 # CONFIG_ATM is not set
1211 -# CONFIG_BRIDGE is not set
1212 +CONFIG_BRIDGE=m
1213 CONFIG_VLAN_8021Q=m
1214 # CONFIG_DECNET is not set
1215 +CONFIG_LLC=m
1216 # CONFIG_LLC2 is not set
1217 # CONFIG_IPX is not set
1218 # CONFIG_ATALK is not set
1219 @@ -373,10 +415,6 @@ CONFIG_VLAN_8021Q=m
1220 # CONFIG_LAPB is not set
1221 # CONFIG_ECONET is not set
1222 # CONFIG_WAN_ROUTER is not set
1223 -
1224 -#
1225 -# QoS and/or fair queueing
1226 -#
1227 # CONFIG_NET_SCHED is not set
1228 CONFIG_NET_CLS_ROUTE=y
1229
1230 @@ -384,6 +422,7 @@ CONFIG_NET_CLS_ROUTE=y
1231 # Network testing
1232 #
1233 # CONFIG_NET_PKTGEN is not set
1234 +# CONFIG_NET_TCPPROBE is not set
1235 # CONFIG_HAMRADIO is not set
1236 # CONFIG_IRDA is not set
1237 # CONFIG_BT is not set
1238 @@ -397,6 +436,7 @@ CONFIG_NET_CLS_ROUTE=y
1239 # CONFIG_MAC80211 is not set
1240 # CONFIG_IEEE80211 is not set
1241 # CONFIG_RFKILL is not set
1242 +# CONFIG_NET_9P is not set
1243
1244 #
1245 # Device Drivers
1246 @@ -405,16 +445,13 @@ CONFIG_NET_CLS_ROUTE=y
1247 #
1248 # Generic Driver Options
1249 #
1250 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
1251 CONFIG_STANDALONE=y
1252 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
1253 # CONFIG_FW_LOADER is not set
1254 # CONFIG_DEBUG_DRIVER is not set
1255 # CONFIG_DEBUG_DEVRES is not set
1256 # CONFIG_SYS_HYPERVISOR is not set
1257 -
1258 -#
1259 -# Connector - unified userspace <-> kernelspace linker
1260 -#
1261 # CONFIG_CONNECTOR is not set
1262 CONFIG_MTD=y
1263 # CONFIG_MTD_DEBUG is not set
1264 @@ -434,6 +471,7 @@ CONFIG_MTD_BLOCK=y
1265 # CONFIG_INFTL is not set
1266 # CONFIG_RFD_FTL is not set
1267 # CONFIG_SSFDC is not set
1268 +# CONFIG_MTD_OOPS is not set
1269
1270 #
1271 # RAM/ROM/Flash chip drivers
1272 @@ -493,20 +531,8 @@ CONFIG_MTD_DATAFLASH=y
1273 # UBI - Unsorted block images
1274 #
1275 # CONFIG_MTD_UBI is not set
1276 -
1277 -#
1278 -# Parallel port support
1279 -#
1280 # CONFIG_PARPORT is not set
1281 -
1282 -#
1283 -# Plug and Play support
1284 -#
1285 -# CONFIG_PNPACPI is not set
1286 -
1287 -#
1288 -# Block devices
1289 -#
1290 +CONFIG_BLK_DEV=y
1291 # CONFIG_BLK_DEV_COW_COMMON is not set
1292 CONFIG_BLK_DEV_LOOP=m
1293 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
1294 @@ -517,11 +543,13 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
1295 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
1296 # CONFIG_CDROM_PKTCDVD is not set
1297 # CONFIG_ATA_OVER_ETH is not set
1298 -
1299 -#
1300 -# Misc devices
1301 -#
1302 -# CONFIG_BLINK is not set
1303 +CONFIG_MISC_DEVICES=y
1304 +# CONFIG_ATMEL_PWM is not set
1305 +CONFIG_ATMEL_TCLIB=y
1306 +CONFIG_ATMEL_TCB_CLKSRC=y
1307 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
1308 +# CONFIG_EEPROM_93CX6 is not set
1309 +# CONFIG_ATMEL_SSC is not set
1310 # CONFIG_IDE is not set
1311
1312 #
1313 @@ -529,30 +557,42 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
1314 #
1315 # CONFIG_RAID_ATTRS is not set
1316 # CONFIG_SCSI is not set
1317 +# CONFIG_SCSI_DMA is not set
1318 # CONFIG_SCSI_NETLINK is not set
1319 # CONFIG_ATA is not set
1320 -
1321 -#
1322 -# Multi-device support (RAID and LVM)
1323 -#
1324 # CONFIG_MD is not set
1325 -
1326 -#
1327 -# Network device support
1328 -#
1329 CONFIG_NETDEVICES=y
1330 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
1331 # CONFIG_DUMMY is not set
1332 # CONFIG_BONDING is not set
1333 +# CONFIG_MACVLAN is not set
1334 # CONFIG_EQUALIZER is not set
1335 CONFIG_TUN=m
1336 -# CONFIG_PHYLIB is not set
1337 +# CONFIG_VETH is not set
1338 +CONFIG_PHYLIB=y
1339
1340 #
1341 -# Ethernet (10 or 100Mbit)
1342 +# MII PHY device drivers
1343 #
1344 +# CONFIG_MARVELL_PHY is not set
1345 +# CONFIG_DAVICOM_PHY is not set
1346 +# CONFIG_QSEMI_PHY is not set
1347 +# CONFIG_LXT_PHY is not set
1348 +# CONFIG_CICADA_PHY is not set
1349 +# CONFIG_VITESSE_PHY is not set
1350 +# CONFIG_SMSC_PHY is not set
1351 +# CONFIG_BROADCOM_PHY is not set
1352 +# CONFIG_ICPLUS_PHY is not set
1353 +# CONFIG_FIXED_PHY is not set
1354 +# CONFIG_MDIO_BITBANG is not set
1355 CONFIG_NET_ETHERNET=y
1356 -CONFIG_MII=y
1357 +# CONFIG_MII is not set
1358 CONFIG_MACB=y
1359 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
1360 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
1361 +# CONFIG_IBM_NEW_EMAC_TAH is not set
1362 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
1363 +# CONFIG_B44 is not set
1364 # CONFIG_NETDEV_1000 is not set
1365 # CONFIG_NETDEV_10000 is not set
1366
1367 @@ -571,21 +611,14 @@ CONFIG_PPP_DEFLATE=m
1368 CONFIG_PPP_BSDCOMP=m
1369 CONFIG_PPP_MPPE=m
1370 CONFIG_PPPOE=m
1371 +# CONFIG_PPPOL2TP is not set
1372 # CONFIG_SLIP is not set
1373 CONFIG_SLHC=m
1374 # CONFIG_SHAPER is not set
1375 # CONFIG_NETCONSOLE is not set
1376 # CONFIG_NETPOLL is not set
1377 # CONFIG_NET_POLL_CONTROLLER is not set
1378 -
1379 -#
1380 -# ISDN subsystem
1381 -#
1382 # CONFIG_ISDN is not set
1383 -
1384 -#
1385 -# Telephony Support
1386 -#
1387 # CONFIG_PHONE is not set
1388
1389 #
1390 @@ -615,28 +648,57 @@ CONFIG_SLHC=m
1391 #
1392 CONFIG_SERIAL_ATMEL=y
1393 CONFIG_SERIAL_ATMEL_CONSOLE=y
1394 +CONFIG_SERIAL_ATMEL_PDC=y
1395 # CONFIG_SERIAL_ATMEL_TTYAT is not set
1396 CONFIG_SERIAL_CORE=y
1397 CONFIG_SERIAL_CORE_CONSOLE=y
1398 CONFIG_UNIX98_PTYS=y
1399 # CONFIG_LEGACY_PTYS is not set
1400 -
1401 -#
1402 -# IPMI
1403 -#
1404 # CONFIG_IPMI_HANDLER is not set
1405 -# CONFIG_WATCHDOG is not set
1406 # CONFIG_HW_RANDOM is not set
1407 # CONFIG_RTC is not set
1408 # CONFIG_GEN_RTC is not set
1409 # CONFIG_R3964 is not set
1410 # CONFIG_RAW_DRIVER is not set
1411 -
1412 -#
1413 -# TPM devices
1414 -#
1415 # CONFIG_TCG_TPM is not set
1416 -# CONFIG_I2C is not set
1417 +CONFIG_I2C=m
1418 +CONFIG_I2C_BOARDINFO=y
1419 +CONFIG_I2C_CHARDEV=m
1420 +
1421 +#
1422 +# I2C Algorithms
1423 +#
1424 +CONFIG_I2C_ALGOBIT=m
1425 +# CONFIG_I2C_ALGOPCF is not set
1426 +# CONFIG_I2C_ALGOPCA is not set
1427 +
1428 +#
1429 +# I2C Hardware Bus support
1430 +#
1431 +CONFIG_I2C_ATMELTWI=m
1432 +CONFIG_I2C_GPIO=m
1433 +# CONFIG_I2C_OCORES is not set
1434 +# CONFIG_I2C_PARPORT_LIGHT is not set
1435 +# CONFIG_I2C_SIMTEC is not set
1436 +# CONFIG_I2C_TAOS_EVM is not set
1437 +# CONFIG_I2C_STUB is not set
1438 +
1439 +#
1440 +# Miscellaneous I2C Chip support
1441 +#
1442 +# CONFIG_SENSORS_DS1337 is not set
1443 +# CONFIG_SENSORS_DS1374 is not set
1444 +# CONFIG_DS1682 is not set
1445 +# CONFIG_SENSORS_EEPROM is not set
1446 +# CONFIG_SENSORS_PCF8574 is not set
1447 +# CONFIG_SENSORS_PCA9539 is not set
1448 +# CONFIG_SENSORS_PCF8591 is not set
1449 +# CONFIG_SENSORS_MAX6875 is not set
1450 +# CONFIG_SENSORS_TSL2550 is not set
1451 +# CONFIG_I2C_DEBUG_CORE is not set
1452 +# CONFIG_I2C_DEBUG_ALGO is not set
1453 +# CONFIG_I2C_DEBUG_BUS is not set
1454 +# CONFIG_I2C_DEBUG_CHIP is not set
1455
1456 #
1457 # SPI support
1458 @@ -655,13 +717,25 @@ CONFIG_SPI_ATMEL=y
1459 # SPI Protocol Masters
1460 #
1461 # CONFIG_SPI_AT25 is not set
1462 -# CONFIG_SPI_SPIDEV is not set
1463 +CONFIG_SPI_SPIDEV=m
1464 +# CONFIG_SPI_TLE62X0 is not set
1465 +# CONFIG_W1 is not set
1466 +# CONFIG_POWER_SUPPLY is not set
1467 +# CONFIG_HWMON is not set
1468 +CONFIG_WATCHDOG=y
1469 +# CONFIG_WATCHDOG_NOWAYOUT is not set
1470
1471 #
1472 -# Dallas's 1-wire bus
1473 +# Watchdog Device Drivers
1474 #
1475 -# CONFIG_W1 is not set
1476 -# CONFIG_HWMON is not set
1477 +# CONFIG_SOFT_WATCHDOG is not set
1478 +CONFIG_AT32AP700X_WDT=y
1479 +
1480 +#
1481 +# Sonics Silicon Backplane
1482 +#
1483 +CONFIG_SSB_POSSIBLE=y
1484 +# CONFIG_SSB is not set
1485
1486 #
1487 # Multifunction device drivers
1488 @@ -678,23 +752,21 @@ CONFIG_SPI_ATMEL=y
1489 #
1490 # Graphics support
1491 #
1492 +# CONFIG_VGASTATE is not set
1493 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1494 +# CONFIG_FB is not set
1495 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1496
1497 #
1498 # Display device support
1499 #
1500 # CONFIG_DISPLAY_SUPPORT is not set
1501 -# CONFIG_VGASTATE is not set
1502 -# CONFIG_FB is not set
1503
1504 #
1505 # Sound
1506 #
1507 # CONFIG_SOUND is not set
1508 -
1509 -#
1510 -# USB support
1511 -#
1512 +CONFIG_USB_SUPPORT=y
1513 # CONFIG_USB_ARCH_HAS_HCD is not set
1514 # CONFIG_USB_ARCH_HAS_OHCI is not set
1515 # CONFIG_USB_ARCH_HAS_EHCI is not set
1516 @@ -706,12 +778,48 @@ CONFIG_SPI_ATMEL=y
1517 #
1518 # USB Gadget Support
1519 #
1520 -# CONFIG_USB_GADGET is not set
1521 -# CONFIG_MMC is not set
1522 +CONFIG_USB_GADGET=y
1523 +# CONFIG_USB_GADGET_DEBUG is not set
1524 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
1525 +CONFIG_USB_GADGET_SELECTED=y
1526 +# CONFIG_USB_GADGET_AMD5536UDC is not set
1527 +CONFIG_USB_GADGET_ATMEL_USBA=y
1528 +CONFIG_USB_ATMEL_USBA=y
1529 +# CONFIG_USB_GADGET_FSL_USB2 is not set
1530 +# CONFIG_USB_GADGET_NET2280 is not set
1531 +# CONFIG_USB_GADGET_PXA2XX is not set
1532 +# CONFIG_USB_GADGET_M66592 is not set
1533 +# CONFIG_USB_GADGET_GOKU is not set
1534 +# CONFIG_USB_GADGET_LH7A40X is not set
1535 +# CONFIG_USB_GADGET_OMAP is not set
1536 +# CONFIG_USB_GADGET_S3C2410 is not set
1537 +# CONFIG_USB_GADGET_AT91 is not set
1538 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
1539 +CONFIG_USB_GADGET_DUALSPEED=y
1540 +CONFIG_USB_ZERO=m
1541 +CONFIG_USB_ETH=m
1542 +CONFIG_USB_ETH_RNDIS=y
1543 +CONFIG_USB_GADGETFS=m
1544 +CONFIG_USB_FILE_STORAGE=m
1545 +# CONFIG_USB_FILE_STORAGE_TEST is not set
1546 +CONFIG_USB_G_SERIAL=m
1547 +# CONFIG_USB_MIDI_GADGET is not set
1548 +CONFIG_MMC=y
1549 +# CONFIG_MMC_DEBUG is not set
1550 +# CONFIG_MMC_UNSAFE_RESUME is not set
1551 +
1552 +#
1553 +# MMC/SD Card Drivers
1554 +#
1555 +CONFIG_MMC_BLOCK=y
1556 +# CONFIG_MMC_BLOCK_BOUNCE is not set
1557 +# CONFIG_SDIO_UART is not set
1558
1559 #
1560 -# LED devices
1561 +# MMC/SD Host Controller Drivers
1562 #
1563 +CONFIG_MMC_ATMELMCI=y
1564 +CONFIG_MMC_SPI=m
1565 CONFIG_NEW_LEDS=y
1566 CONFIG_LEDS_CLASS=y
1567
1568 @@ -726,53 +834,71 @@ CONFIG_LEDS_GPIO=y
1569 CONFIG_LEDS_TRIGGERS=y
1570 CONFIG_LEDS_TRIGGER_TIMER=y
1571 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1572 -
1573 +CONFIG_RTC_LIB=y
1574 +CONFIG_RTC_CLASS=y
1575 +CONFIG_RTC_HCTOSYS=y
1576 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1577 +# CONFIG_RTC_DEBUG is not set
1578
1579 #
1580 -# LED drivers
1581 -#
1582 -
1583 -#
1584 -# LED Triggers
1585 -#
1586 -
1587 -#
1588 -# InfiniBand support
1589 +# RTC interfaces
1590 #
1591 +CONFIG_RTC_INTF_SYSFS=y
1592 +CONFIG_RTC_INTF_PROC=y
1593 +CONFIG_RTC_INTF_DEV=y
1594 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1595 +# CONFIG_RTC_DRV_TEST is not set
1596
1597 #
1598 -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1599 +# I2C RTC drivers
1600 #
1601 +# CONFIG_RTC_DRV_DS1307 is not set
1602 +# CONFIG_RTC_DRV_DS1374 is not set
1603 +# CONFIG_RTC_DRV_DS1672 is not set
1604 +# CONFIG_RTC_DRV_MAX6900 is not set
1605 +# CONFIG_RTC_DRV_RS5C372 is not set
1606 +# CONFIG_RTC_DRV_ISL1208 is not set
1607 +# CONFIG_RTC_DRV_X1205 is not set
1608 +# CONFIG_RTC_DRV_PCF8563 is not set
1609 +# CONFIG_RTC_DRV_PCF8583 is not set
1610 +# CONFIG_RTC_DRV_M41T80 is not set
1611
1612 #
1613 -# Real Time Clock
1614 +# SPI RTC drivers
1615 #
1616 -# CONFIG_RTC_CLASS is not set
1617 +# CONFIG_RTC_DRV_RS5C348 is not set
1618 +# CONFIG_RTC_DRV_MAX6902 is not set
1619
1620 #
1621 -# DMA Engine support
1622 +# Platform RTC drivers
1623 #
1624 -# CONFIG_DMA_ENGINE is not set
1625 +# CONFIG_RTC_DRV_DS1553 is not set
1626 +# CONFIG_RTC_DRV_STK17TA8 is not set
1627 +# CONFIG_RTC_DRV_DS1742 is not set
1628 +# CONFIG_RTC_DRV_M48T86 is not set
1629 +# CONFIG_RTC_DRV_M48T59 is not set
1630 +# CONFIG_RTC_DRV_V3020 is not set
1631
1632 #
1633 -# DMA Clients
1634 +# on-CPU RTC drivers
1635 #
1636 +CONFIG_RTC_DRV_AT32AP700X=y
1637
1638 #
1639 -# DMA Devices
1640 +# Userspace I/O
1641 #
1642 +# CONFIG_UIO is not set
1643
1644 #
1645 # File systems
1646 #
1647 -CONFIG_EXT2_FS=y
1648 +CONFIG_EXT2_FS=m
1649 # CONFIG_EXT2_FS_XATTR is not set
1650 # CONFIG_EXT2_FS_XIP is not set
1651 -CONFIG_EXT3_FS=y
1652 +CONFIG_EXT3_FS=m
1653 # CONFIG_EXT3_FS_XATTR is not set
1654 # CONFIG_EXT4DEV_FS is not set
1655 -CONFIG_JBD=y
1656 -# CONFIG_JBD_DEBUG is not set
1657 +CONFIG_JBD=m
1658 # CONFIG_REISERFS_FS is not set
1659 # CONFIG_JFS_FS is not set
1660 # CONFIG_FS_POSIX_ACL is not set
1661 @@ -781,7 +907,8 @@ CONFIG_JBD=y
1662 # CONFIG_OCFS2_FS is not set
1663 # CONFIG_MINIX_FS is not set
1664 # CONFIG_ROMFS_FS is not set
1665 -# CONFIG_INOTIFY is not set
1666 +CONFIG_INOTIFY=y
1667 +CONFIG_INOTIFY_USER=y
1668 # CONFIG_QUOTA is not set
1669 # CONFIG_DNOTIFY is not set
1670 # CONFIG_AUTOFS_FS is not set
1671 @@ -814,7 +941,6 @@ CONFIG_SYSFS=y
1672 CONFIG_TMPFS=y
1673 # CONFIG_TMPFS_POSIX_ACL is not set
1674 # CONFIG_HUGETLB_PAGE is not set
1675 -CONFIG_RAMFS=y
1676 CONFIG_CONFIGFS_FS=y
1677
1678 #
1679 @@ -830,10 +956,12 @@ CONFIG_CONFIGFS_FS=y
1680 CONFIG_JFFS2_FS=y
1681 CONFIG_JFFS2_FS_DEBUG=0
1682 CONFIG_JFFS2_FS_WRITEBUFFER=y
1683 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1684 # CONFIG_JFFS2_SUMMARY is not set
1685 # CONFIG_JFFS2_FS_XATTR is not set
1686 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1687 CONFIG_JFFS2_ZLIB=y
1688 +# CONFIG_JFFS2_LZO is not set
1689 CONFIG_JFFS2_RTIME=y
1690 # CONFIG_JFFS2_RUBIN is not set
1691 # CONFIG_CRAMFS is not set
1692 @@ -842,19 +970,21 @@ CONFIG_JFFS2_RTIME=y
1693 # CONFIG_QNX4FS_FS is not set
1694 # CONFIG_SYSV_FS is not set
1695 # CONFIG_UFS_FS is not set
1696 -
1697 -#
1698 -# Network File Systems
1699 -#
1700 +CONFIG_NETWORK_FILESYSTEMS=y
1701 CONFIG_NFS_FS=y
1702 CONFIG_NFS_V3=y
1703 # CONFIG_NFS_V3_ACL is not set
1704 # CONFIG_NFS_V4 is not set
1705 # CONFIG_NFS_DIRECTIO is not set
1706 -# CONFIG_NFSD is not set
1707 +CONFIG_NFSD=m
1708 +CONFIG_NFSD_V3=y
1709 +# CONFIG_NFSD_V3_ACL is not set
1710 +# CONFIG_NFSD_V4 is not set
1711 +CONFIG_NFSD_TCP=y
1712 CONFIG_ROOT_NFS=y
1713 CONFIG_LOCKD=y
1714 CONFIG_LOCKD_V4=y
1715 +CONFIG_EXPORTFS=m
1716 CONFIG_NFS_COMMON=y
1717 CONFIG_SUNRPC=y
1718 # CONFIG_SUNRPC_BIND34 is not set
1719 @@ -871,23 +1001,18 @@ CONFIG_CIFS=m
1720 # CONFIG_NCP_FS is not set
1721 # CONFIG_CODA_FS is not set
1722 # CONFIG_AFS_FS is not set
1723 -# CONFIG_9P_FS is not set
1724
1725 #
1726 # Partition Types
1727 #
1728 # CONFIG_PARTITION_ADVANCED is not set
1729 CONFIG_MSDOS_PARTITION=y
1730 -
1731 -#
1732 -# Native Language Support
1733 -#
1734 -CONFIG_NLS=y
1735 +CONFIG_NLS=m
1736 CONFIG_NLS_DEFAULT="iso8859-1"
1737 -# CONFIG_NLS_CODEPAGE_437 is not set
1738 +CONFIG_NLS_CODEPAGE_437=m
1739 # CONFIG_NLS_CODEPAGE_737 is not set
1740 # CONFIG_NLS_CODEPAGE_775 is not set
1741 -CONFIG_NLS_CODEPAGE_850=y
1742 +CONFIG_NLS_CODEPAGE_850=m
1743 # CONFIG_NLS_CODEPAGE_852 is not set
1744 # CONFIG_NLS_CODEPAGE_855 is not set
1745 # CONFIG_NLS_CODEPAGE_857 is not set
1746 @@ -908,7 +1033,7 @@ CONFIG_NLS_CODEPAGE_850=y
1747 # CONFIG_NLS_CODEPAGE_1250 is not set
1748 # CONFIG_NLS_CODEPAGE_1251 is not set
1749 # CONFIG_NLS_ASCII is not set
1750 -CONFIG_NLS_ISO8859_1=y
1751 +CONFIG_NLS_ISO8859_1=m
1752 # CONFIG_NLS_ISO8859_2 is not set
1753 # CONFIG_NLS_ISO8859_3 is not set
1754 # CONFIG_NLS_ISO8859_4 is not set
1755 @@ -921,18 +1046,19 @@ CONFIG_NLS_ISO8859_1=y
1756 # CONFIG_NLS_ISO8859_15 is not set
1757 # CONFIG_NLS_KOI8_R is not set
1758 # CONFIG_NLS_KOI8_U is not set
1759 -CONFIG_NLS_UTF8=y
1760 -
1761 -#
1762 -# Distributed Lock Manager
1763 -#
1764 +CONFIG_NLS_UTF8=m
1765 # CONFIG_DLM is not set
1766 +CONFIG_INSTRUMENTATION=y
1767 +CONFIG_PROFILING=y
1768 +CONFIG_OPROFILE=m
1769 +CONFIG_KPROBES=y
1770 +# CONFIG_MARKERS is not set
1771
1772 #
1773 # Kernel hacking
1774 #
1775 -CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1776 # CONFIG_PRINTK_TIME is not set
1777 +CONFIG_ENABLE_WARN_DEPRECATED=y
1778 CONFIG_ENABLE_MUST_CHECK=y
1779 CONFIG_MAGIC_SYSRQ=y
1780 # CONFIG_UNUSED_SYMBOLS is not set
1781 @@ -941,12 +1067,17 @@ CONFIG_MAGIC_SYSRQ=y
1782 CONFIG_DEBUG_KERNEL=y
1783 # CONFIG_DEBUG_SHIRQ is not set
1784 CONFIG_DETECT_SOFTLOCKUP=y
1785 +CONFIG_SCHED_DEBUG=y
1786 # CONFIG_SCHEDSTATS is not set
1787 # CONFIG_TIMER_STATS is not set
1788 +# CONFIG_SLUB_DEBUG_ON is not set
1789 # CONFIG_DEBUG_RT_MUTEXES is not set
1790 # CONFIG_RT_MUTEX_TESTER is not set
1791 # CONFIG_DEBUG_SPINLOCK is not set
1792 # CONFIG_DEBUG_MUTEXES is not set
1793 +# CONFIG_DEBUG_LOCK_ALLOC is not set
1794 +# CONFIG_PROVE_LOCKING is not set
1795 +# CONFIG_LOCK_STAT is not set
1796 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1797 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1798 # CONFIG_DEBUG_KOBJECT is not set
1799 @@ -954,21 +1085,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
1800 # CONFIG_DEBUG_INFO is not set
1801 # CONFIG_DEBUG_VM is not set
1802 # CONFIG_DEBUG_LIST is not set
1803 +# CONFIG_DEBUG_SG is not set
1804 CONFIG_FRAME_POINTER=y
1805 # CONFIG_FORCED_INLINING is not set
1806 +# CONFIG_BOOT_PRINTK_DELAY is not set
1807 # CONFIG_RCU_TORTURE_TEST is not set
1808 +# CONFIG_LKDTM is not set
1809 # CONFIG_FAULT_INJECTION is not set
1810 -# CONFIG_KPROBES is not set
1811 +# CONFIG_SAMPLES is not set
1812
1813 #
1814 # Security options
1815 #
1816 # CONFIG_KEYS is not set
1817 # CONFIG_SECURITY is not set
1818 -
1819 -#
1820 -# Cryptographic options
1821 -#
1822 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1823 CONFIG_CRYPTO=y
1824 CONFIG_CRYPTO_ALGAPI=y
1825 CONFIG_CRYPTO_BLKCIPHER=y
1826 @@ -989,6 +1120,7 @@ CONFIG_CRYPTO_ECB=m
1827 CONFIG_CRYPTO_CBC=y
1828 CONFIG_CRYPTO_PCBC=m
1829 # CONFIG_CRYPTO_LRW is not set
1830 +# CONFIG_CRYPTO_XTS is not set
1831 # CONFIG_CRYPTO_CRYPTD is not set
1832 CONFIG_CRYPTO_DES=y
1833 # CONFIG_CRYPTO_FCRYPT is not set
1834 @@ -1002,15 +1134,14 @@ CONFIG_CRYPTO_DES=y
1835 CONFIG_CRYPTO_ARC4=m
1836 # CONFIG_CRYPTO_KHAZAD is not set
1837 # CONFIG_CRYPTO_ANUBIS is not set
1838 +# CONFIG_CRYPTO_SEED is not set
1839 CONFIG_CRYPTO_DEFLATE=y
1840 # CONFIG_CRYPTO_MICHAEL_MIC is not set
1841 # CONFIG_CRYPTO_CRC32C is not set
1842 # CONFIG_CRYPTO_CAMELLIA is not set
1843 # CONFIG_CRYPTO_TEST is not set
1844 -
1845 -#
1846 -# Hardware crypto devices
1847 -#
1848 +# CONFIG_CRYPTO_AUTHENC is not set
1849 +CONFIG_CRYPTO_HW=y
1850
1851 #
1852 # Library routines
1853 @@ -1018,8 +1149,9 @@ CONFIG_CRYPTO_DEFLATE=y
1854 CONFIG_BITREVERSE=y
1855 CONFIG_CRC_CCITT=m
1856 # CONFIG_CRC16 is not set
1857 -# CONFIG_CRC_ITU_T is not set
1858 +CONFIG_CRC_ITU_T=m
1859 CONFIG_CRC32=y
1860 +CONFIG_CRC7=m
1861 # CONFIG_LIBCRC32C is not set
1862 CONFIG_ZLIB_INFLATE=y
1863 CONFIG_ZLIB_DEFLATE=y
1864 Index: linux-2.6.24.7/arch/avr32/configs/atstk1002_defconfig
1865 ===================================================================
1866 --- linux-2.6.24.7.orig/arch/avr32/configs/atstk1002_defconfig
1867 +++ linux-2.6.24.7/arch/avr32/configs/atstk1002_defconfig
1868 @@ -1,48 +1,49 @@
1869 #
1870 # Automatically generated make config: don't edit
1871 -# Linux kernel version: 2.6.22-rc5
1872 -# Sat Jun 23 15:32:08 2007
1873 +# Linux kernel version: 2.6.24
1874 +# Thu Mar 6 12:49:17 2008
1875 #
1876 CONFIG_AVR32=y
1877 CONFIG_GENERIC_GPIO=y
1878 CONFIG_GENERIC_HARDIRQS=y
1879 +CONFIG_STACKTRACE_SUPPORT=y
1880 +CONFIG_LOCKDEP_SUPPORT=y
1881 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1882 CONFIG_HARDIRQS_SW_RESEND=y
1883 CONFIG_GENERIC_IRQ_PROBE=y
1884 CONFIG_RWSEM_GENERIC_SPINLOCK=y
1885 CONFIG_GENERIC_TIME=y
1886 +CONFIG_GENERIC_CLOCKEVENTS=y
1887 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
1888 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
1889 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
1890 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
1891 CONFIG_GENERIC_HWEIGHT=y
1892 CONFIG_GENERIC_CALIBRATE_DELAY=y
1893 CONFIG_GENERIC_BUG=y
1894 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
1895
1896 #
1897 -# Code maturity level options
1898 +# General setup
1899 #
1900 CONFIG_EXPERIMENTAL=y
1901 CONFIG_BROKEN_ON_SMP=y
1902 CONFIG_INIT_ENV_ARG_LIMIT=32
1903 -
1904 -#
1905 -# General setup
1906 -#
1907 CONFIG_LOCALVERSION=""
1908 # CONFIG_LOCALVERSION_AUTO is not set
1909 CONFIG_SWAP=y
1910 CONFIG_SYSVIPC=y
1911 -# CONFIG_IPC_NS is not set
1912 CONFIG_SYSVIPC_SYSCTL=y
1913 CONFIG_POSIX_MQUEUE=y
1914 -CONFIG_BSD_PROCESS_ACCT=y
1915 -CONFIG_BSD_PROCESS_ACCT_V3=y
1916 -CONFIG_TASKSTATS=y
1917 -CONFIG_TASK_DELAY_ACCT=y
1918 -# CONFIG_TASK_XACCT is not set
1919 -# CONFIG_UTS_NS is not set
1920 -CONFIG_AUDIT=y
1921 +# CONFIG_BSD_PROCESS_ACCT is not set
1922 +# CONFIG_TASKSTATS is not set
1923 +# CONFIG_USER_NS is not set
1924 +# CONFIG_PID_NS is not set
1925 +# CONFIG_AUDIT is not set
1926 # CONFIG_IKCONFIG is not set
1927 CONFIG_LOG_BUF_SHIFT=14
1928 +# CONFIG_CGROUPS is not set
1929 +# CONFIG_FAIR_GROUP_SCHED is not set
1930 CONFIG_SYSFS_DEPRECATED=y
1931 CONFIG_RELAY=y
1932 CONFIG_BLK_DEV_INITRD=y
1933 @@ -63,35 +64,28 @@ CONFIG_FUTEX=y
1934 CONFIG_ANON_INODES=y
1935 CONFIG_EPOLL=y
1936 CONFIG_SIGNALFD=y
1937 -CONFIG_TIMERFD=y
1938 CONFIG_EVENTFD=y
1939 CONFIG_SHMEM=y
1940 CONFIG_VM_EVENT_COUNTERS=y
1941 -# CONFIG_SLUB_DEBUG is not set
1942 +CONFIG_SLUB_DEBUG=y
1943 # CONFIG_SLAB is not set
1944 CONFIG_SLUB=y
1945 # CONFIG_SLOB is not set
1946 +CONFIG_SLABINFO=y
1947 CONFIG_RT_MUTEXES=y
1948 # CONFIG_TINY_SHMEM is not set
1949 CONFIG_BASE_SMALL=1
1950 -
1951 -#
1952 -# Loadable module support
1953 -#
1954 CONFIG_MODULES=y
1955 CONFIG_MODULE_UNLOAD=y
1956 # CONFIG_MODULE_FORCE_UNLOAD is not set
1957 # CONFIG_MODVERSIONS is not set
1958 # CONFIG_MODULE_SRCVERSION_ALL is not set
1959 # CONFIG_KMOD is not set
1960 -
1961 -#
1962 -# Block layer
1963 -#
1964 CONFIG_BLOCK=y
1965 # CONFIG_LBD is not set
1966 # CONFIG_BLK_DEV_IO_TRACE is not set
1967 # CONFIG_LSF is not set
1968 +# CONFIG_BLK_DEV_BSG is not set
1969
1970 #
1971 # IO Schedulers
1972 @@ -99,32 +93,49 @@ CONFIG_BLOCK=y
1973 CONFIG_IOSCHED_NOOP=y
1974 # CONFIG_IOSCHED_AS is not set
1975 # CONFIG_IOSCHED_DEADLINE is not set
1976 -# CONFIG_IOSCHED_CFQ is not set
1977 +CONFIG_IOSCHED_CFQ=y
1978 # CONFIG_DEFAULT_AS is not set
1979 # CONFIG_DEFAULT_DEADLINE is not set
1980 -# CONFIG_DEFAULT_CFQ is not set
1981 -CONFIG_DEFAULT_NOOP=y
1982 -CONFIG_DEFAULT_IOSCHED="noop"
1983 +CONFIG_DEFAULT_CFQ=y
1984 +# CONFIG_DEFAULT_NOOP is not set
1985 +CONFIG_DEFAULT_IOSCHED="cfq"
1986
1987 #
1988 # System Type and features
1989 #
1990 +CONFIG_TICK_ONESHOT=y
1991 +CONFIG_NO_HZ=y
1992 +CONFIG_HIGH_RES_TIMERS=y
1993 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
1994 CONFIG_SUBARCH_AVR32B=y
1995 CONFIG_MMU=y
1996 CONFIG_PERFORMANCE_COUNTERS=y
1997 CONFIG_PLATFORM_AT32AP=y
1998 +CONFIG_CPU_AT32AP700X=y
1999 CONFIG_CPU_AT32AP7000=y
2000 -CONFIG_BOARD_ATSTK1002=y
2001 CONFIG_BOARD_ATSTK1000=y
2002 # CONFIG_BOARD_ATNGW100 is not set
2003 +CONFIG_BOARD_ATSTK1002=y
2004 +# CONFIG_BOARD_ATSTK1003 is not set
2005 +# CONFIG_BOARD_ATSTK1004 is not set
2006 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
2007 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
2008 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
2009 +# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
2010 +# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
2011 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
2012 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
2013 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
2014 +# CONFIG_BOARD_ATSTK100X_ENABLE_PSIF is not set
2015 CONFIG_LOADER_U_BOOT=y
2016
2017 #
2018 # Atmel AVR32 AP options
2019 #
2020 -# CONFIG_AP7000_32_BIT_SMC is not set
2021 -CONFIG_AP7000_16_BIT_SMC=y
2022 -# CONFIG_AP7000_8_BIT_SMC is not set
2023 +# CONFIG_AP700X_32_BIT_SMC is not set
2024 +CONFIG_AP700X_16_BIT_SMC=y
2025 +# CONFIG_AP700X_8_BIT_SMC is not set
2026 +CONFIG_GPIO_DEV=y
2027 CONFIG_LOAD_ADDRESS=0x10000000
2028 CONFIG_ENTRY_ADDRESS=0x90000000
2029 CONFIG_PHYS_OFFSET=0x10000000
2030 @@ -144,10 +155,14 @@ CONFIG_FLATMEM_MANUAL=y
2031 CONFIG_FLATMEM=y
2032 CONFIG_FLAT_NODE_MEM_MAP=y
2033 # CONFIG_SPARSEMEM_STATIC is not set
2034 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
2035 CONFIG_SPLIT_PTLOCK_CPUS=4
2036 # CONFIG_RESOURCES_64BIT is not set
2037 CONFIG_ZONE_DMA_FLAG=0
2038 +CONFIG_VIRT_TO_BUS=y
2039 # CONFIG_OWNERSHIP_TRACE is not set
2040 +CONFIG_NMI_DEBUGGING=y
2041 +CONFIG_DW_DMAC=y
2042 # CONFIG_HZ_100 is not set
2043 CONFIG_HZ_250=y
2044 # CONFIG_HZ_300 is not set
2045 @@ -156,13 +171,31 @@ CONFIG_HZ=250
2046 CONFIG_CMDLINE=""
2047
2048 #
2049 -# Bus options
2050 +# Power management options
2051 #
2052 -# CONFIG_ARCH_SUPPORTS_MSI is not set
2053
2054 #
2055 -# PCCARD (PCMCIA/CardBus) support
2056 +# CPU Frequency scaling
2057 +#
2058 +CONFIG_CPU_FREQ=y
2059 +CONFIG_CPU_FREQ_TABLE=y
2060 +# CONFIG_CPU_FREQ_DEBUG is not set
2061 +# CONFIG_CPU_FREQ_STAT is not set
2062 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
2063 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
2064 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
2065 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
2066 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
2067 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
2068 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
2069 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
2070 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
2071 +CONFIG_CPU_FREQ_AT32AP=y
2072 +
2073 +#
2074 +# Bus options
2075 #
2076 +# CONFIG_ARCH_SUPPORTS_MSI is not set
2077 # CONFIG_PCCARD is not set
2078
2079 #
2080 @@ -182,7 +215,12 @@ CONFIG_NET=y
2081 CONFIG_PACKET=y
2082 CONFIG_PACKET_MMAP=y
2083 CONFIG_UNIX=y
2084 -# CONFIG_NET_KEY is not set
2085 +CONFIG_XFRM=y
2086 +CONFIG_XFRM_USER=m
2087 +# CONFIG_XFRM_SUB_POLICY is not set
2088 +# CONFIG_XFRM_MIGRATE is not set
2089 +CONFIG_NET_KEY=m
2090 +# CONFIG_NET_KEY_MIGRATE is not set
2091 CONFIG_INET=y
2092 # CONFIG_IP_MULTICAST is not set
2093 # CONFIG_IP_ADVANCED_ROUTER is not set
2094 @@ -191,36 +229,52 @@ CONFIG_IP_PNP=y
2095 CONFIG_IP_PNP_DHCP=y
2096 # CONFIG_IP_PNP_BOOTP is not set
2097 # CONFIG_IP_PNP_RARP is not set
2098 -# CONFIG_NET_IPIP is not set
2099 -# CONFIG_NET_IPGRE is not set
2100 +CONFIG_NET_IPIP=m
2101 +CONFIG_NET_IPGRE=m
2102 # CONFIG_ARPD is not set
2103 # CONFIG_SYN_COOKIES is not set
2104 -# CONFIG_INET_AH is not set
2105 -# CONFIG_INET_ESP is not set
2106 +CONFIG_INET_AH=m
2107 +CONFIG_INET_ESP=m
2108 # CONFIG_INET_IPCOMP is not set
2109 # CONFIG_INET_XFRM_TUNNEL is not set
2110 -# CONFIG_INET_TUNNEL is not set
2111 -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
2112 -# CONFIG_INET_XFRM_MODE_TUNNEL is not set
2113 -# CONFIG_INET_XFRM_MODE_BEET is not set
2114 +CONFIG_INET_TUNNEL=m
2115 +CONFIG_INET_XFRM_MODE_TRANSPORT=m
2116 +CONFIG_INET_XFRM_MODE_TUNNEL=m
2117 +CONFIG_INET_XFRM_MODE_BEET=m
2118 +# CONFIG_INET_LRO is not set
2119 CONFIG_INET_DIAG=y
2120 CONFIG_INET_TCP_DIAG=y
2121 # CONFIG_TCP_CONG_ADVANCED is not set
2122 CONFIG_TCP_CONG_CUBIC=y
2123 CONFIG_DEFAULT_TCP_CONG="cubic"
2124 # CONFIG_TCP_MD5SIG is not set
2125 -# CONFIG_IPV6 is not set
2126 -# CONFIG_INET6_XFRM_TUNNEL is not set
2127 -# CONFIG_INET6_TUNNEL is not set
2128 +CONFIG_IPV6=m
2129 +# CONFIG_IPV6_PRIVACY is not set
2130 +# CONFIG_IPV6_ROUTER_PREF is not set
2131 +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
2132 +CONFIG_INET6_AH=m
2133 +CONFIG_INET6_ESP=m
2134 +CONFIG_INET6_IPCOMP=m
2135 +# CONFIG_IPV6_MIP6 is not set
2136 +CONFIG_INET6_XFRM_TUNNEL=m
2137 +CONFIG_INET6_TUNNEL=m
2138 +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
2139 +CONFIG_INET6_XFRM_MODE_TUNNEL=m
2140 +CONFIG_INET6_XFRM_MODE_BEET=m
2141 +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
2142 +CONFIG_IPV6_SIT=m
2143 +CONFIG_IPV6_TUNNEL=m
2144 +# CONFIG_IPV6_MULTIPLE_TABLES is not set
2145 # CONFIG_NETWORK_SECMARK is not set
2146 # CONFIG_NETFILTER is not set
2147 # CONFIG_IP_DCCP is not set
2148 # CONFIG_IP_SCTP is not set
2149 # CONFIG_TIPC is not set
2150 # CONFIG_ATM is not set
2151 -# CONFIG_BRIDGE is not set
2152 +CONFIG_BRIDGE=m
2153 # CONFIG_VLAN_8021Q is not set
2154 # CONFIG_DECNET is not set
2155 +CONFIG_LLC=m
2156 # CONFIG_LLC2 is not set
2157 # CONFIG_IPX is not set
2158 # CONFIG_ATALK is not set
2159 @@ -228,16 +282,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
2160 # CONFIG_LAPB is not set
2161 # CONFIG_ECONET is not set
2162 # CONFIG_WAN_ROUTER is not set
2163 -
2164 -#
2165 -# QoS and/or fair queueing
2166 -#
2167 # CONFIG_NET_SCHED is not set
2168
2169 #
2170 # Network testing
2171 #
2172 # CONFIG_NET_PKTGEN is not set
2173 +# CONFIG_NET_TCPPROBE is not set
2174 # CONFIG_HAMRADIO is not set
2175 # CONFIG_IRDA is not set
2176 # CONFIG_BT is not set
2177 @@ -251,6 +302,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
2178 # CONFIG_MAC80211 is not set
2179 # CONFIG_IEEE80211 is not set
2180 # CONFIG_RFKILL is not set
2181 +# CONFIG_NET_9P is not set
2182
2183 #
2184 # Device Drivers
2185 @@ -259,16 +311,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
2186 #
2187 # Generic Driver Options
2188 #
2189 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
2190 CONFIG_STANDALONE=y
2191 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
2192 # CONFIG_FW_LOADER is not set
2193 # CONFIG_DEBUG_DRIVER is not set
2194 # CONFIG_DEBUG_DEVRES is not set
2195 # CONFIG_SYS_HYPERVISOR is not set
2196 -
2197 -#
2198 -# Connector - unified userspace <-> kernelspace linker
2199 -#
2200 # CONFIG_CONNECTOR is not set
2201 CONFIG_MTD=y
2202 # CONFIG_MTD_DEBUG is not set
2203 @@ -288,6 +337,7 @@ CONFIG_MTD_BLOCK=y
2204 # CONFIG_INFTL is not set
2205 # CONFIG_RFD_FTL is not set
2206 # CONFIG_SSFDC is not set
2207 +# CONFIG_MTD_OOPS is not set
2208
2209 #
2210 # RAM/ROM/Flash chip drivers
2211 @@ -327,6 +377,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
2212 #
2213 # Self-contained MTD device drivers
2214 #
2215 +CONFIG_MTD_DATAFLASH=m
2216 +CONFIG_MTD_M25P80=m
2217 # CONFIG_MTD_SLRAM is not set
2218 # CONFIG_MTD_PHRAM is not set
2219 # CONFIG_MTD_MTDRAM is not set
2220 @@ -345,20 +397,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
2221 # UBI - Unsorted block images
2222 #
2223 # CONFIG_MTD_UBI is not set
2224 -
2225 -#
2226 -# Parallel port support
2227 -#
2228 # CONFIG_PARPORT is not set
2229 -
2230 -#
2231 -# Plug and Play support
2232 -#
2233 -# CONFIG_PNPACPI is not set
2234 -
2235 -#
2236 -# Block devices
2237 -#
2238 +CONFIG_BLK_DEV=y
2239 # CONFIG_BLK_DEV_COW_COMMON is not set
2240 CONFIG_BLK_DEV_LOOP=m
2241 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
2242 @@ -369,42 +409,91 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
2243 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
2244 # CONFIG_CDROM_PKTCDVD is not set
2245 # CONFIG_ATA_OVER_ETH is not set
2246 -
2247 -#
2248 -# Misc devices
2249 -#
2250 -# CONFIG_BLINK is not set
2251 +CONFIG_MISC_DEVICES=y
2252 +CONFIG_ATMEL_PWM=m
2253 +CONFIG_ATMEL_TCLIB=y
2254 +CONFIG_ATMEL_TCB_CLKSRC=y
2255 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
2256 +# CONFIG_EEPROM_93CX6 is not set
2257 +CONFIG_ATMEL_SSC=m
2258 # CONFIG_IDE is not set
2259
2260 #
2261 # SCSI device support
2262 #
2263 # CONFIG_RAID_ATTRS is not set
2264 -# CONFIG_SCSI is not set
2265 +CONFIG_SCSI=m
2266 +CONFIG_SCSI_DMA=y
2267 +# CONFIG_SCSI_TGT is not set
2268 # CONFIG_SCSI_NETLINK is not set
2269 -# CONFIG_ATA is not set
2270 +# CONFIG_SCSI_PROC_FS is not set
2271
2272 #
2273 -# Multi-device support (RAID and LVM)
2274 +# SCSI support type (disk, tape, CD-ROM)
2275 #
2276 -# CONFIG_MD is not set
2277 +CONFIG_BLK_DEV_SD=m
2278 +# CONFIG_CHR_DEV_ST is not set
2279 +# CONFIG_CHR_DEV_OSST is not set
2280 +CONFIG_BLK_DEV_SR=m
2281 +# CONFIG_BLK_DEV_SR_VENDOR is not set
2282 +# CONFIG_CHR_DEV_SG is not set
2283 +# CONFIG_CHR_DEV_SCH is not set
2284 +
2285 +#
2286 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
2287 +#
2288 +# CONFIG_SCSI_MULTI_LUN is not set
2289 +# CONFIG_SCSI_CONSTANTS is not set
2290 +# CONFIG_SCSI_LOGGING is not set
2291 +# CONFIG_SCSI_SCAN_ASYNC is not set
2292 +CONFIG_SCSI_WAIT_SCAN=m
2293
2294 #
2295 -# Network device support
2296 +# SCSI Transports
2297 #
2298 +# CONFIG_SCSI_SPI_ATTRS is not set
2299 +# CONFIG_SCSI_FC_ATTRS is not set
2300 +# CONFIG_SCSI_ISCSI_ATTRS is not set
2301 +# CONFIG_SCSI_SAS_LIBSAS is not set
2302 +# CONFIG_SCSI_SRP_ATTRS is not set
2303 +# CONFIG_SCSI_LOWLEVEL is not set
2304 +CONFIG_ATA=m
2305 +# CONFIG_ATA_NONSTANDARD is not set
2306 +CONFIG_PATA_AT32=m
2307 +# CONFIG_PATA_PLATFORM is not set
2308 +# CONFIG_MD is not set
2309 CONFIG_NETDEVICES=y
2310 -CONFIG_DUMMY=y
2311 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
2312 +# CONFIG_DUMMY is not set
2313 # CONFIG_BONDING is not set
2314 +# CONFIG_MACVLAN is not set
2315 # CONFIG_EQUALIZER is not set
2316 CONFIG_TUN=m
2317 -# CONFIG_PHYLIB is not set
2318 +# CONFIG_VETH is not set
2319 +CONFIG_PHYLIB=y
2320
2321 #
2322 -# Ethernet (10 or 100Mbit)
2323 +# MII PHY device drivers
2324 #
2325 +# CONFIG_MARVELL_PHY is not set
2326 +# CONFIG_DAVICOM_PHY is not set
2327 +# CONFIG_QSEMI_PHY is not set
2328 +# CONFIG_LXT_PHY is not set
2329 +# CONFIG_CICADA_PHY is not set
2330 +# CONFIG_VITESSE_PHY is not set
2331 +# CONFIG_SMSC_PHY is not set
2332 +# CONFIG_BROADCOM_PHY is not set
2333 +# CONFIG_ICPLUS_PHY is not set
2334 +# CONFIG_FIXED_PHY is not set
2335 +# CONFIG_MDIO_BITBANG is not set
2336 CONFIG_NET_ETHERNET=y
2337 -CONFIG_MII=y
2338 +# CONFIG_MII is not set
2339 CONFIG_MACB=y
2340 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
2341 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
2342 +# CONFIG_IBM_NEW_EMAC_TAH is not set
2343 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
2344 +# CONFIG_B44 is not set
2345 # CONFIG_NETDEV_1000 is not set
2346 # CONFIG_NETDEV_10000 is not set
2347
2348 @@ -423,27 +512,54 @@ CONFIG_PPP_DEFLATE=m
2349 CONFIG_PPP_BSDCOMP=m
2350 # CONFIG_PPP_MPPE is not set
2351 # CONFIG_PPPOE is not set
2352 +# CONFIG_PPPOL2TP is not set
2353 # CONFIG_SLIP is not set
2354 CONFIG_SLHC=m
2355 # CONFIG_SHAPER is not set
2356 # CONFIG_NETCONSOLE is not set
2357 # CONFIG_NETPOLL is not set
2358 # CONFIG_NET_POLL_CONTROLLER is not set
2359 -
2360 -#
2361 -# ISDN subsystem
2362 -#
2363 # CONFIG_ISDN is not set
2364 -
2365 -#
2366 -# Telephony Support
2367 -#
2368 # CONFIG_PHONE is not set
2369
2370 #
2371 # Input device support
2372 #
2373 -# CONFIG_INPUT is not set
2374 +CONFIG_INPUT=m
2375 +# CONFIG_INPUT_FF_MEMLESS is not set
2376 +CONFIG_INPUT_POLLDEV=m
2377 +
2378 +#
2379 +# Userland interfaces
2380 +#
2381 +CONFIG_INPUT_MOUSEDEV=m
2382 +CONFIG_INPUT_MOUSEDEV_PSAUX=y
2383 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
2384 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
2385 +# CONFIG_INPUT_JOYDEV is not set
2386 +CONFIG_INPUT_EVDEV=m
2387 +# CONFIG_INPUT_EVBUG is not set
2388 +
2389 +#
2390 +# Input Device Drivers
2391 +#
2392 +CONFIG_INPUT_KEYBOARD=y
2393 +# CONFIG_KEYBOARD_ATKBD is not set
2394 +# CONFIG_KEYBOARD_SUNKBD is not set
2395 +# CONFIG_KEYBOARD_LKKBD is not set
2396 +# CONFIG_KEYBOARD_XTKBD is not set
2397 +# CONFIG_KEYBOARD_NEWTON is not set
2398 +# CONFIG_KEYBOARD_STOWAWAY is not set
2399 +CONFIG_KEYBOARD_GPIO=m
2400 +CONFIG_INPUT_MOUSE=y
2401 +# CONFIG_MOUSE_PS2 is not set
2402 +# CONFIG_MOUSE_SERIAL is not set
2403 +# CONFIG_MOUSE_VSXXXAA is not set
2404 +CONFIG_MOUSE_GPIO=m
2405 +# CONFIG_INPUT_JOYSTICK is not set
2406 +# CONFIG_INPUT_TABLET is not set
2407 +# CONFIG_INPUT_TOUCHSCREEN is not set
2408 +# CONFIG_INPUT_MISC is not set
2409
2410 #
2411 # Hardware I/O ports
2412 @@ -467,40 +583,94 @@ CONFIG_SLHC=m
2413 #
2414 CONFIG_SERIAL_ATMEL=y
2415 CONFIG_SERIAL_ATMEL_CONSOLE=y
2416 +CONFIG_SERIAL_ATMEL_PDC=y
2417 # CONFIG_SERIAL_ATMEL_TTYAT is not set
2418 CONFIG_SERIAL_CORE=y
2419 CONFIG_SERIAL_CORE_CONSOLE=y
2420 CONFIG_UNIX98_PTYS=y
2421 # CONFIG_LEGACY_PTYS is not set
2422 -
2423 -#
2424 -# IPMI
2425 -#
2426 # CONFIG_IPMI_HANDLER is not set
2427 -# CONFIG_WATCHDOG is not set
2428 # CONFIG_HW_RANDOM is not set
2429 # CONFIG_RTC is not set
2430 # CONFIG_GEN_RTC is not set
2431 # CONFIG_R3964 is not set
2432 # CONFIG_RAW_DRIVER is not set
2433 +# CONFIG_TCG_TPM is not set
2434 +CONFIG_I2C=m
2435 +CONFIG_I2C_BOARDINFO=y
2436 +CONFIG_I2C_CHARDEV=m
2437 +
2438 +#
2439 +# I2C Algorithms
2440 +#
2441 +CONFIG_I2C_ALGOBIT=m
2442 +# CONFIG_I2C_ALGOPCF is not set
2443 +# CONFIG_I2C_ALGOPCA is not set
2444 +
2445 +#
2446 +# I2C Hardware Bus support
2447 +#
2448 +CONFIG_I2C_ATMELTWI=m
2449 +CONFIG_I2C_GPIO=m
2450 +# CONFIG_I2C_OCORES is not set
2451 +# CONFIG_I2C_PARPORT_LIGHT is not set
2452 +# CONFIG_I2C_SIMTEC is not set
2453 +# CONFIG_I2C_TAOS_EVM is not set
2454 +# CONFIG_I2C_STUB is not set
2455 +
2456 +#
2457 +# Miscellaneous I2C Chip support
2458 +#
2459 +# CONFIG_SENSORS_DS1337 is not set
2460 +# CONFIG_SENSORS_DS1374 is not set
2461 +# CONFIG_DS1682 is not set
2462 +# CONFIG_SENSORS_EEPROM is not set
2463 +# CONFIG_SENSORS_PCF8574 is not set
2464 +# CONFIG_SENSORS_PCA9539 is not set
2465 +# CONFIG_SENSORS_PCF8591 is not set
2466 +# CONFIG_SENSORS_MAX6875 is not set
2467 +# CONFIG_SENSORS_TSL2550 is not set
2468 +# CONFIG_I2C_DEBUG_CORE is not set
2469 +# CONFIG_I2C_DEBUG_ALGO is not set
2470 +# CONFIG_I2C_DEBUG_BUS is not set
2471 +# CONFIG_I2C_DEBUG_CHIP is not set
2472
2473 #
2474 -# TPM devices
2475 +# SPI support
2476 #
2477 -# CONFIG_TCG_TPM is not set
2478 -# CONFIG_I2C is not set
2479 +CONFIG_SPI=y
2480 +# CONFIG_SPI_DEBUG is not set
2481 +CONFIG_SPI_MASTER=y
2482
2483 #
2484 -# SPI support
2485 +# SPI Master Controller Drivers
2486 #
2487 -# CONFIG_SPI is not set
2488 -# CONFIG_SPI_MASTER is not set
2489 +CONFIG_SPI_ATMEL=y
2490 +# CONFIG_SPI_BITBANG is not set
2491
2492 #
2493 -# Dallas's 1-wire bus
2494 +# SPI Protocol Masters
2495 #
2496 +# CONFIG_SPI_AT25 is not set
2497 +CONFIG_SPI_SPIDEV=m
2498 +# CONFIG_SPI_TLE62X0 is not set
2499 # CONFIG_W1 is not set
2500 +# CONFIG_POWER_SUPPLY is not set
2501 # CONFIG_HWMON is not set
2502 +CONFIG_WATCHDOG=y
2503 +# CONFIG_WATCHDOG_NOWAYOUT is not set
2504 +
2505 +#
2506 +# Watchdog Device Drivers
2507 +#
2508 +# CONFIG_SOFT_WATCHDOG is not set
2509 +CONFIG_AT32AP700X_WDT=y
2510 +
2511 +#
2512 +# Sonics Silicon Backplane
2513 +#
2514 +CONFIG_SSB_POSSIBLE=y
2515 +# CONFIG_SSB is not set
2516
2517 #
2518 # Multifunction device drivers
2519 @@ -517,23 +687,104 @@ CONFIG_UNIX98_PTYS=y
2520 #
2521 # Graphics support
2522 #
2523 -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
2524 +# CONFIG_VGASTATE is not set
2525 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
2526 +CONFIG_FB=y
2527 +# CONFIG_FIRMWARE_EDID is not set
2528 +# CONFIG_FB_DDC is not set
2529 +CONFIG_FB_CFB_FILLRECT=y
2530 +CONFIG_FB_CFB_COPYAREA=y
2531 +CONFIG_FB_CFB_IMAGEBLIT=y
2532 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
2533 +# CONFIG_FB_SYS_FILLRECT is not set
2534 +# CONFIG_FB_SYS_COPYAREA is not set
2535 +# CONFIG_FB_SYS_IMAGEBLIT is not set
2536 +# CONFIG_FB_SYS_FOPS is not set
2537 +CONFIG_FB_DEFERRED_IO=y
2538 +# CONFIG_FB_SVGALIB is not set
2539 +# CONFIG_FB_MACMODES is not set
2540 +# CONFIG_FB_BACKLIGHT is not set
2541 +# CONFIG_FB_MODE_HELPERS is not set
2542 +# CONFIG_FB_TILEBLITTING is not set
2543 +
2544 +#
2545 +# Frame buffer hardware drivers
2546 +#
2547 +# CONFIG_FB_S1D13XXX is not set
2548 +CONFIG_FB_ATMEL=y
2549 +# CONFIG_FB_VIRTUAL is not set
2550 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
2551 +CONFIG_LCD_CLASS_DEVICE=y
2552 +CONFIG_LCD_LTV350QV=y
2553 +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
2554
2555 #
2556 # Display device support
2557 #
2558 # CONFIG_DISPLAY_SUPPORT is not set
2559 -# CONFIG_VGASTATE is not set
2560 -# CONFIG_FB is not set
2561 +# CONFIG_LOGO is not set
2562
2563 #
2564 # Sound
2565 #
2566 -# CONFIG_SOUND is not set
2567 +CONFIG_SOUND=m
2568 +
2569 +#
2570 +# Advanced Linux Sound Architecture
2571 +#
2572 +CONFIG_SND=m
2573 +CONFIG_SND_TIMER=m
2574 +CONFIG_SND_PCM=m
2575 +# CONFIG_SND_SEQUENCER is not set
2576 +CONFIG_SND_OSSEMUL=y
2577 +CONFIG_SND_MIXER_OSS=m
2578 +CONFIG_SND_PCM_OSS=m
2579 +CONFIG_SND_PCM_OSS_PLUGINS=y
2580 +# CONFIG_SND_DYNAMIC_MINORS is not set
2581 +# CONFIG_SND_SUPPORT_OLD_API is not set
2582 +# CONFIG_SND_VERBOSE_PROCFS is not set
2583 +# CONFIG_SND_VERBOSE_PRINTK is not set
2584 +# CONFIG_SND_DEBUG is not set
2585 +
2586 +#
2587 +# Generic devices
2588 +#
2589 +CONFIG_SND_AC97_CODEC=m
2590 +# CONFIG_SND_DUMMY is not set
2591 +# CONFIG_SND_MTPAV is not set
2592 +# CONFIG_SND_SERIAL_U16550 is not set
2593 +# CONFIG_SND_MPU401 is not set
2594 +
2595 +#
2596 +# AVR32 devices
2597 +#
2598 +CONFIG_SND_ATMEL_AC97=m
2599
2600 #
2601 -# USB support
2602 +# SPI devices
2603 #
2604 +CONFIG_SND_AT73C213=m
2605 +CONFIG_SND_AT73C213_TARGET_BITRATE=48000
2606 +
2607 +#
2608 +# System on Chip audio support
2609 +#
2610 +# CONFIG_SND_SOC is not set
2611 +
2612 +#
2613 +# SoC Audio support for SuperH
2614 +#
2615 +
2616 +#
2617 +# Open Sound System
2618 +#
2619 +CONFIG_SOUND_PRIME=m
2620 +# CONFIG_SOUND_MSNDCLAS is not set
2621 +# CONFIG_SOUND_MSNDPIN is not set
2622 +CONFIG_SOUND_AT32_ABDAC=m
2623 +CONFIG_AC97_BUS=m
2624 +# CONFIG_HID_SUPPORT is not set
2625 +CONFIG_USB_SUPPORT=y
2626 # CONFIG_USB_ARCH_HAS_HCD is not set
2627 # CONFIG_USB_ARCH_HAS_OHCI is not set
2628 # CONFIG_USB_ARCH_HAS_EHCI is not set
2629 @@ -545,63 +796,137 @@ CONFIG_UNIX98_PTYS=y
2630 #
2631 # USB Gadget Support
2632 #
2633 -# CONFIG_USB_GADGET is not set
2634 -# CONFIG_MMC is not set
2635 -
2636 -#
2637 -# LED devices
2638 -#
2639 -# CONFIG_NEW_LEDS is not set
2640 +CONFIG_USB_GADGET=y
2641 +# CONFIG_USB_GADGET_DEBUG is not set
2642 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
2643 +# CONFIG_USB_GADGET_DEBUG_FS is not set
2644 +CONFIG_USB_GADGET_SELECTED=y
2645 +# CONFIG_USB_GADGET_AMD5536UDC is not set
2646 +CONFIG_USB_GADGET_ATMEL_USBA=y
2647 +CONFIG_USB_ATMEL_USBA=y
2648 +# CONFIG_USB_GADGET_FSL_USB2 is not set
2649 +# CONFIG_USB_GADGET_NET2280 is not set
2650 +# CONFIG_USB_GADGET_PXA2XX is not set
2651 +# CONFIG_USB_GADGET_M66592 is not set
2652 +# CONFIG_USB_GADGET_GOKU is not set
2653 +# CONFIG_USB_GADGET_LH7A40X is not set
2654 +# CONFIG_USB_GADGET_OMAP is not set
2655 +# CONFIG_USB_GADGET_S3C2410 is not set
2656 +# CONFIG_USB_GADGET_AT91 is not set
2657 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
2658 +CONFIG_USB_GADGET_DUALSPEED=y
2659 +CONFIG_USB_ZERO=m
2660 +CONFIG_USB_ETH=m
2661 +CONFIG_USB_ETH_RNDIS=y
2662 +CONFIG_USB_GADGETFS=m
2663 +CONFIG_USB_FILE_STORAGE=m
2664 +# CONFIG_USB_FILE_STORAGE_TEST is not set
2665 +CONFIG_USB_G_SERIAL=m
2666 +# CONFIG_USB_MIDI_GADGET is not set
2667 +CONFIG_MMC=y
2668 +# CONFIG_MMC_DEBUG is not set
2669 +# CONFIG_MMC_UNSAFE_RESUME is not set
2670 +
2671 +#
2672 +# MMC/SD Card Drivers
2673 +#
2674 +CONFIG_MMC_BLOCK=y
2675 +# CONFIG_MMC_BLOCK_BOUNCE is not set
2676 +# CONFIG_SDIO_UART is not set
2677 +
2678 +#
2679 +# MMC/SD Host Controller Drivers
2680 +#
2681 +CONFIG_MMC_ATMELMCI=y
2682 +CONFIG_MMC_SPI=m
2683 +CONFIG_NEW_LEDS=y
2684 +CONFIG_LEDS_CLASS=m
2685
2686 #
2687 # LED drivers
2688 #
2689 +CONFIG_LEDS_ATMEL_PWM=m
2690 +CONFIG_LEDS_GPIO=m
2691
2692 #
2693 # LED Triggers
2694 #
2695 +CONFIG_LEDS_TRIGGERS=y
2696 +CONFIG_LEDS_TRIGGER_TIMER=m
2697 +CONFIG_LEDS_TRIGGER_HEARTBEAT=m
2698 +CONFIG_RTC_LIB=y
2699 +CONFIG_RTC_CLASS=y
2700 +CONFIG_RTC_HCTOSYS=y
2701 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
2702 +# CONFIG_RTC_DEBUG is not set
2703
2704 #
2705 -# InfiniBand support
2706 +# RTC interfaces
2707 #
2708 +CONFIG_RTC_INTF_SYSFS=y
2709 +CONFIG_RTC_INTF_PROC=y
2710 +CONFIG_RTC_INTF_DEV=y
2711 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
2712 +# CONFIG_RTC_DRV_TEST is not set
2713
2714 #
2715 -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
2716 +# I2C RTC drivers
2717 #
2718 +# CONFIG_RTC_DRV_DS1307 is not set
2719 +# CONFIG_RTC_DRV_DS1374 is not set
2720 +# CONFIG_RTC_DRV_DS1672 is not set
2721 +# CONFIG_RTC_DRV_MAX6900 is not set
2722 +# CONFIG_RTC_DRV_RS5C372 is not set
2723 +# CONFIG_RTC_DRV_ISL1208 is not set
2724 +# CONFIG_RTC_DRV_X1205 is not set
2725 +# CONFIG_RTC_DRV_PCF8563 is not set
2726 +# CONFIG_RTC_DRV_PCF8583 is not set
2727 +# CONFIG_RTC_DRV_M41T80 is not set
2728
2729 #
2730 -# Real Time Clock
2731 +# SPI RTC drivers
2732 #
2733 -# CONFIG_RTC_CLASS is not set
2734 +# CONFIG_RTC_DRV_RS5C348 is not set
2735 +# CONFIG_RTC_DRV_MAX6902 is not set
2736
2737 #
2738 -# DMA Engine support
2739 +# Platform RTC drivers
2740 #
2741 -# CONFIG_DMA_ENGINE is not set
2742 +# CONFIG_RTC_DRV_DS1553 is not set
2743 +# CONFIG_RTC_DRV_STK17TA8 is not set
2744 +# CONFIG_RTC_DRV_DS1742 is not set
2745 +# CONFIG_RTC_DRV_M48T86 is not set
2746 +# CONFIG_RTC_DRV_M48T59 is not set
2747 +# CONFIG_RTC_DRV_V3020 is not set
2748
2749 #
2750 -# DMA Clients
2751 +# on-CPU RTC drivers
2752 #
2753 +CONFIG_RTC_DRV_AT32AP700X=y
2754
2755 #
2756 -# DMA Devices
2757 +# Userspace I/O
2758 #
2759 +# CONFIG_UIO is not set
2760
2761 #
2762 # File systems
2763 #
2764 -CONFIG_EXT2_FS=m
2765 +CONFIG_EXT2_FS=y
2766 # CONFIG_EXT2_FS_XATTR is not set
2767 # CONFIG_EXT2_FS_XIP is not set
2768 -# CONFIG_EXT3_FS is not set
2769 +CONFIG_EXT3_FS=y
2770 +# CONFIG_EXT3_FS_XATTR is not set
2771 # CONFIG_EXT4DEV_FS is not set
2772 +CONFIG_JBD=y
2773 +# CONFIG_JBD_DEBUG is not set
2774 # CONFIG_REISERFS_FS is not set
2775 # CONFIG_JFS_FS is not set
2776 # CONFIG_FS_POSIX_ACL is not set
2777 # CONFIG_XFS_FS is not set
2778 # CONFIG_GFS2_FS is not set
2779 # CONFIG_OCFS2_FS is not set
2780 -CONFIG_MINIX_FS=m
2781 +# CONFIG_MINIX_FS is not set
2782 # CONFIG_ROMFS_FS is not set
2783 CONFIG_INOTIFY=y
2784 CONFIG_INOTIFY_USER=y
2785 @@ -609,7 +934,7 @@ CONFIG_INOTIFY_USER=y
2786 # CONFIG_DNOTIFY is not set
2787 # CONFIG_AUTOFS_FS is not set
2788 # CONFIG_AUTOFS4_FS is not set
2789 -# CONFIG_FUSE_FS is not set
2790 +CONFIG_FUSE_FS=m
2791
2792 #
2793 # CD-ROM/DVD Filesystems
2794 @@ -637,8 +962,7 @@ CONFIG_SYSFS=y
2795 CONFIG_TMPFS=y
2796 # CONFIG_TMPFS_POSIX_ACL is not set
2797 # CONFIG_HUGETLB_PAGE is not set
2798 -CONFIG_RAMFS=y
2799 -CONFIG_CONFIGFS_FS=m
2800 +CONFIG_CONFIGFS_FS=y
2801
2802 #
2803 # Miscellaneous filesystems
2804 @@ -652,11 +976,12 @@ CONFIG_CONFIGFS_FS=m
2805 # CONFIG_EFS_FS is not set
2806 CONFIG_JFFS2_FS=y
2807 CONFIG_JFFS2_FS_DEBUG=0
2808 -CONFIG_JFFS2_FS_WRITEBUFFER=y
2809 +# CONFIG_JFFS2_FS_WRITEBUFFER is not set
2810 # CONFIG_JFFS2_SUMMARY is not set
2811 # CONFIG_JFFS2_FS_XATTR is not set
2812 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
2813 CONFIG_JFFS2_ZLIB=y
2814 +# CONFIG_JFFS2_LZO is not set
2815 CONFIG_JFFS2_RTIME=y
2816 # CONFIG_JFFS2_RUBIN is not set
2817 # CONFIG_CRAMFS is not set
2818 @@ -665,10 +990,7 @@ CONFIG_JFFS2_RTIME=y
2819 # CONFIG_QNX4FS_FS is not set
2820 # CONFIG_SYSV_FS is not set
2821 # CONFIG_UFS_FS is not set
2822 -
2823 -#
2824 -# Network File Systems
2825 -#
2826 +CONFIG_NETWORK_FILESYSTEMS=y
2827 CONFIG_NFS_FS=y
2828 CONFIG_NFS_V3=y
2829 # CONFIG_NFS_V3_ACL is not set
2830 @@ -688,17 +1010,12 @@ CONFIG_SUNRPC=y
2831 # CONFIG_NCP_FS is not set
2832 # CONFIG_CODA_FS is not set
2833 # CONFIG_AFS_FS is not set
2834 -# CONFIG_9P_FS is not set
2835
2836 #
2837 # Partition Types
2838 #
2839 # CONFIG_PARTITION_ADVANCED is not set
2840 CONFIG_MSDOS_PARTITION=y
2841 -
2842 -#
2843 -# Native Language Support
2844 -#
2845 CONFIG_NLS=m
2846 CONFIG_NLS_DEFAULT="iso8859-1"
2847 CONFIG_NLS_CODEPAGE_437=m
2848 @@ -739,17 +1056,18 @@ CONFIG_NLS_ISO8859_1=m
2849 # CONFIG_NLS_KOI8_R is not set
2850 # CONFIG_NLS_KOI8_U is not set
2851 CONFIG_NLS_UTF8=m
2852 -
2853 -#
2854 -# Distributed Lock Manager
2855 -#
2856 # CONFIG_DLM is not set
2857 +CONFIG_INSTRUMENTATION=y
2858 +CONFIG_PROFILING=y
2859 +CONFIG_OPROFILE=m
2860 +CONFIG_KPROBES=y
2861 +# CONFIG_MARKERS is not set
2862
2863 #
2864 # Kernel hacking
2865 #
2866 -CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2867 # CONFIG_PRINTK_TIME is not set
2868 +CONFIG_ENABLE_WARN_DEPRECATED=y
2869 CONFIG_ENABLE_MUST_CHECK=y
2870 CONFIG_MAGIC_SYSRQ=y
2871 # CONFIG_UNUSED_SYMBOLS is not set
2872 @@ -758,12 +1076,17 @@ CONFIG_DEBUG_FS=y
2873 CONFIG_DEBUG_KERNEL=y
2874 # CONFIG_DEBUG_SHIRQ is not set
2875 CONFIG_DETECT_SOFTLOCKUP=y
2876 +CONFIG_SCHED_DEBUG=y
2877 # CONFIG_SCHEDSTATS is not set
2878 # CONFIG_TIMER_STATS is not set
2879 +# CONFIG_SLUB_DEBUG_ON is not set
2880 # CONFIG_DEBUG_RT_MUTEXES is not set
2881 # CONFIG_RT_MUTEX_TESTER is not set
2882 # CONFIG_DEBUG_SPINLOCK is not set
2883 # CONFIG_DEBUG_MUTEXES is not set
2884 +# CONFIG_DEBUG_LOCK_ALLOC is not set
2885 +# CONFIG_PROVE_LOCKING is not set
2886 +# CONFIG_LOCK_STAT is not set
2887 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
2888 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
2889 # CONFIG_DEBUG_KOBJECT is not set
2890 @@ -771,22 +1094,63 @@ CONFIG_DEBUG_BUGVERBOSE=y
2891 # CONFIG_DEBUG_INFO is not set
2892 # CONFIG_DEBUG_VM is not set
2893 # CONFIG_DEBUG_LIST is not set
2894 +# CONFIG_DEBUG_SG is not set
2895 CONFIG_FRAME_POINTER=y
2896 CONFIG_FORCED_INLINING=y
2897 +# CONFIG_BOOT_PRINTK_DELAY is not set
2898 # CONFIG_RCU_TORTURE_TEST is not set
2899 +# CONFIG_LKDTM is not set
2900 # CONFIG_FAULT_INJECTION is not set
2901 -# CONFIG_KPROBES is not set
2902 +# CONFIG_SAMPLES is not set
2903
2904 #
2905 # Security options
2906 #
2907 # CONFIG_KEYS is not set
2908 # CONFIG_SECURITY is not set
2909 -
2910 -#
2911 -# Cryptographic options
2912 -#
2913 -# CONFIG_CRYPTO is not set
2914 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
2915 +CONFIG_CRYPTO=y
2916 +CONFIG_CRYPTO_ALGAPI=m
2917 +CONFIG_CRYPTO_BLKCIPHER=m
2918 +CONFIG_CRYPTO_HASH=m
2919 +CONFIG_CRYPTO_MANAGER=m
2920 +CONFIG_CRYPTO_HMAC=m
2921 +# CONFIG_CRYPTO_XCBC is not set
2922 +# CONFIG_CRYPTO_NULL is not set
2923 +# CONFIG_CRYPTO_MD4 is not set
2924 +CONFIG_CRYPTO_MD5=m
2925 +CONFIG_CRYPTO_SHA1=m
2926 +# CONFIG_CRYPTO_SHA256 is not set
2927 +# CONFIG_CRYPTO_SHA512 is not set
2928 +# CONFIG_CRYPTO_WP512 is not set
2929 +# CONFIG_CRYPTO_TGR192 is not set
2930 +# CONFIG_CRYPTO_GF128MUL is not set
2931 +# CONFIG_CRYPTO_ECB is not set
2932 +CONFIG_CRYPTO_CBC=m
2933 +# CONFIG_CRYPTO_PCBC is not set
2934 +# CONFIG_CRYPTO_LRW is not set
2935 +# CONFIG_CRYPTO_XTS is not set
2936 +# CONFIG_CRYPTO_CRYPTD is not set
2937 +CONFIG_CRYPTO_DES=m
2938 +# CONFIG_CRYPTO_FCRYPT is not set
2939 +# CONFIG_CRYPTO_BLOWFISH is not set
2940 +# CONFIG_CRYPTO_TWOFISH is not set
2941 +# CONFIG_CRYPTO_SERPENT is not set
2942 +# CONFIG_CRYPTO_AES is not set
2943 +# CONFIG_CRYPTO_CAST5 is not set
2944 +# CONFIG_CRYPTO_CAST6 is not set
2945 +# CONFIG_CRYPTO_TEA is not set
2946 +# CONFIG_CRYPTO_ARC4 is not set
2947 +# CONFIG_CRYPTO_KHAZAD is not set
2948 +# CONFIG_CRYPTO_ANUBIS is not set
2949 +# CONFIG_CRYPTO_SEED is not set
2950 +CONFIG_CRYPTO_DEFLATE=m
2951 +# CONFIG_CRYPTO_MICHAEL_MIC is not set
2952 +# CONFIG_CRYPTO_CRC32C is not set
2953 +# CONFIG_CRYPTO_CAMELLIA is not set
2954 +# CONFIG_CRYPTO_TEST is not set
2955 +# CONFIG_CRYPTO_AUTHENC is not set
2956 +# CONFIG_CRYPTO_HW is not set
2957
2958 #
2959 # Library routines
2960 @@ -794,10 +1158,10 @@ CONFIG_FORCED_INLINING=y
2961 CONFIG_BITREVERSE=y
2962 CONFIG_CRC_CCITT=m
2963 # CONFIG_CRC16 is not set
2964 -# CONFIG_CRC_ITU_T is not set
2965 +CONFIG_CRC_ITU_T=m
2966 CONFIG_CRC32=y
2967 +CONFIG_CRC7=m
2968 # CONFIG_LIBCRC32C is not set
2969 -CONFIG_AUDIT_GENERIC=y
2970 CONFIG_ZLIB_INFLATE=y
2971 CONFIG_ZLIB_DEFLATE=y
2972 CONFIG_PLIST=y
2973 Index: linux-2.6.24.7/arch/avr32/configs/atstk1003_defconfig
2974 ===================================================================
2975 --- /dev/null
2976 +++ linux-2.6.24.7/arch/avr32/configs/atstk1003_defconfig
2977 @@ -0,0 +1,1041 @@
2978 +#
2979 +# Automatically generated make config: don't edit
2980 +# Linux kernel version: 2.6.24
2981 +# Thu Mar 6 12:50:27 2008
2982 +#
2983 +CONFIG_AVR32=y
2984 +CONFIG_GENERIC_GPIO=y
2985 +CONFIG_GENERIC_HARDIRQS=y
2986 +CONFIG_STACKTRACE_SUPPORT=y
2987 +CONFIG_LOCKDEP_SUPPORT=y
2988 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2989 +CONFIG_HARDIRQS_SW_RESEND=y
2990 +CONFIG_GENERIC_IRQ_PROBE=y
2991 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
2992 +CONFIG_GENERIC_TIME=y
2993 +CONFIG_GENERIC_CLOCKEVENTS=y
2994 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
2995 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
2996 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
2997 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
2998 +CONFIG_GENERIC_HWEIGHT=y
2999 +CONFIG_GENERIC_CALIBRATE_DELAY=y
3000 +CONFIG_GENERIC_BUG=y
3001 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
3002 +
3003 +#
3004 +# General setup
3005 +#
3006 +CONFIG_EXPERIMENTAL=y
3007 +CONFIG_BROKEN_ON_SMP=y
3008 +CONFIG_INIT_ENV_ARG_LIMIT=32
3009 +CONFIG_LOCALVERSION=""
3010 +# CONFIG_LOCALVERSION_AUTO is not set
3011 +CONFIG_SWAP=y
3012 +CONFIG_SYSVIPC=y
3013 +CONFIG_SYSVIPC_SYSCTL=y
3014 +CONFIG_POSIX_MQUEUE=y
3015 +CONFIG_BSD_PROCESS_ACCT=y
3016 +CONFIG_BSD_PROCESS_ACCT_V3=y
3017 +CONFIG_TASKSTATS=y
3018 +CONFIG_TASK_DELAY_ACCT=y
3019 +# CONFIG_TASK_XACCT is not set
3020 +# CONFIG_USER_NS is not set
3021 +# CONFIG_PID_NS is not set
3022 +CONFIG_AUDIT=y
3023 +# CONFIG_IKCONFIG is not set
3024 +CONFIG_LOG_BUF_SHIFT=14
3025 +# CONFIG_CGROUPS is not set
3026 +CONFIG_FAIR_GROUP_SCHED=y
3027 +CONFIG_FAIR_USER_SCHED=y
3028 +# CONFIG_FAIR_CGROUP_SCHED is not set
3029 +CONFIG_SYSFS_DEPRECATED=y
3030 +CONFIG_RELAY=y
3031 +CONFIG_BLK_DEV_INITRD=y
3032 +CONFIG_INITRAMFS_SOURCE=""
3033 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
3034 +CONFIG_SYSCTL=y
3035 +CONFIG_EMBEDDED=y
3036 +# CONFIG_SYSCTL_SYSCALL is not set
3037 +CONFIG_KALLSYMS=y
3038 +# CONFIG_KALLSYMS_ALL is not set
3039 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
3040 +CONFIG_HOTPLUG=y
3041 +CONFIG_PRINTK=y
3042 +CONFIG_BUG=y
3043 +CONFIG_ELF_CORE=y
3044 +# CONFIG_BASE_FULL is not set
3045 +CONFIG_FUTEX=y
3046 +CONFIG_ANON_INODES=y
3047 +CONFIG_EPOLL=y
3048 +CONFIG_SIGNALFD=y
3049 +CONFIG_EVENTFD=y
3050 +CONFIG_SHMEM=y
3051 +CONFIG_VM_EVENT_COUNTERS=y
3052 +# CONFIG_SLUB_DEBUG is not set
3053 +# CONFIG_SLAB is not set
3054 +CONFIG_SLUB=y
3055 +# CONFIG_SLOB is not set
3056 +CONFIG_SLABINFO=y
3057 +CONFIG_RT_MUTEXES=y
3058 +# CONFIG_TINY_SHMEM is not set
3059 +CONFIG_BASE_SMALL=1
3060 +CONFIG_MODULES=y
3061 +CONFIG_MODULE_UNLOAD=y
3062 +# CONFIG_MODULE_FORCE_UNLOAD is not set
3063 +# CONFIG_MODVERSIONS is not set
3064 +# CONFIG_MODULE_SRCVERSION_ALL is not set
3065 +# CONFIG_KMOD is not set
3066 +CONFIG_BLOCK=y
3067 +# CONFIG_LBD is not set
3068 +# CONFIG_BLK_DEV_IO_TRACE is not set
3069 +# CONFIG_LSF is not set
3070 +# CONFIG_BLK_DEV_BSG is not set
3071 +
3072 +#
3073 +# IO Schedulers
3074 +#
3075 +CONFIG_IOSCHED_NOOP=y
3076 +# CONFIG_IOSCHED_AS is not set
3077 +# CONFIG_IOSCHED_DEADLINE is not set
3078 +CONFIG_IOSCHED_CFQ=y
3079 +# CONFIG_DEFAULT_AS is not set
3080 +# CONFIG_DEFAULT_DEADLINE is not set
3081 +CONFIG_DEFAULT_CFQ=y
3082 +# CONFIG_DEFAULT_NOOP is not set
3083 +CONFIG_DEFAULT_IOSCHED="cfq"
3084 +
3085 +#
3086 +# System Type and features
3087 +#
3088 +CONFIG_TICK_ONESHOT=y
3089 +CONFIG_NO_HZ=y
3090 +CONFIG_HIGH_RES_TIMERS=y
3091 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
3092 +CONFIG_SUBARCH_AVR32B=y
3093 +CONFIG_MMU=y
3094 +CONFIG_PERFORMANCE_COUNTERS=y
3095 +CONFIG_PLATFORM_AT32AP=y
3096 +CONFIG_CPU_AT32AP700X=y
3097 +CONFIG_CPU_AT32AP7001=y
3098 +CONFIG_BOARD_ATSTK1000=y
3099 +# CONFIG_BOARD_ATNGW100 is not set
3100 +# CONFIG_BOARD_ATSTK1002 is not set
3101 +CONFIG_BOARD_ATSTK1003=y
3102 +# CONFIG_BOARD_ATSTK1004 is not set
3103 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
3104 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
3105 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
3106 +# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
3107 +# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
3108 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
3109 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
3110 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
3111 +# CONFIG_BOARD_ATSTK100X_ENABLE_PSIF is not set
3112 +CONFIG_LOADER_U_BOOT=y
3113 +
3114 +#
3115 +# Atmel AVR32 AP options
3116 +#
3117 +# CONFIG_AP700X_32_BIT_SMC is not set
3118 +CONFIG_AP700X_16_BIT_SMC=y
3119 +# CONFIG_AP700X_8_BIT_SMC is not set
3120 +CONFIG_GPIO_DEV=y
3121 +CONFIG_LOAD_ADDRESS=0x10000000
3122 +CONFIG_ENTRY_ADDRESS=0x90000000
3123 +CONFIG_PHYS_OFFSET=0x10000000
3124 +CONFIG_PREEMPT_NONE=y
3125 +# CONFIG_PREEMPT_VOLUNTARY is not set
3126 +# CONFIG_PREEMPT is not set
3127 +# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
3128 +# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
3129 +# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
3130 +CONFIG_ARCH_FLATMEM_ENABLE=y
3131 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
3132 +# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
3133 +CONFIG_SELECT_MEMORY_MODEL=y
3134 +CONFIG_FLATMEM_MANUAL=y
3135 +# CONFIG_DISCONTIGMEM_MANUAL is not set
3136 +# CONFIG_SPARSEMEM_MANUAL is not set
3137 +CONFIG_FLATMEM=y
3138 +CONFIG_FLAT_NODE_MEM_MAP=y
3139 +# CONFIG_SPARSEMEM_STATIC is not set
3140 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
3141 +CONFIG_SPLIT_PTLOCK_CPUS=4
3142 +# CONFIG_RESOURCES_64BIT is not set
3143 +CONFIG_ZONE_DMA_FLAG=0
3144 +CONFIG_VIRT_TO_BUS=y
3145 +# CONFIG_OWNERSHIP_TRACE is not set
3146 +CONFIG_NMI_DEBUGGING=y
3147 +CONFIG_DW_DMAC=y
3148 +# CONFIG_HZ_100 is not set
3149 +CONFIG_HZ_250=y
3150 +# CONFIG_HZ_300 is not set
3151 +# CONFIG_HZ_1000 is not set
3152 +CONFIG_HZ=250
3153 +CONFIG_CMDLINE=""
3154 +
3155 +#
3156 +# Power management options
3157 +#
3158 +
3159 +#
3160 +# CPU Frequency scaling
3161 +#
3162 +CONFIG_CPU_FREQ=y
3163 +CONFIG_CPU_FREQ_TABLE=y
3164 +# CONFIG_CPU_FREQ_DEBUG is not set
3165 +# CONFIG_CPU_FREQ_STAT is not set
3166 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
3167 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
3168 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
3169 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
3170 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
3171 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
3172 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
3173 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
3174 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
3175 +CONFIG_CPU_FREQ_AT32AP=y
3176 +
3177 +#
3178 +# Bus options
3179 +#
3180 +# CONFIG_ARCH_SUPPORTS_MSI is not set
3181 +# CONFIG_PCCARD is not set
3182 +
3183 +#
3184 +# Executable file formats
3185 +#
3186 +CONFIG_BINFMT_ELF=y
3187 +# CONFIG_BINFMT_MISC is not set
3188 +
3189 +#
3190 +# Networking
3191 +#
3192 +CONFIG_NET=y
3193 +
3194 +#
3195 +# Networking options
3196 +#
3197 +CONFIG_PACKET=y
3198 +CONFIG_PACKET_MMAP=y
3199 +CONFIG_UNIX=y
3200 +# CONFIG_NET_KEY is not set
3201 +CONFIG_INET=y
3202 +# CONFIG_IP_MULTICAST is not set
3203 +# CONFIG_IP_ADVANCED_ROUTER is not set
3204 +CONFIG_IP_FIB_HASH=y
3205 +# CONFIG_IP_PNP is not set
3206 +# CONFIG_NET_IPIP is not set
3207 +# CONFIG_NET_IPGRE is not set
3208 +# CONFIG_ARPD is not set
3209 +# CONFIG_SYN_COOKIES is not set
3210 +# CONFIG_INET_AH is not set
3211 +# CONFIG_INET_ESP is not set
3212 +# CONFIG_INET_IPCOMP is not set
3213 +# CONFIG_INET_XFRM_TUNNEL is not set
3214 +# CONFIG_INET_TUNNEL is not set
3215 +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
3216 +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
3217 +# CONFIG_INET_XFRM_MODE_BEET is not set
3218 +# CONFIG_INET_LRO is not set
3219 +# CONFIG_INET_DIAG is not set
3220 +# CONFIG_TCP_CONG_ADVANCED is not set
3221 +CONFIG_TCP_CONG_CUBIC=y
3222 +CONFIG_DEFAULT_TCP_CONG="cubic"
3223 +# CONFIG_TCP_MD5SIG is not set
3224 +# CONFIG_IPV6 is not set
3225 +# CONFIG_INET6_XFRM_TUNNEL is not set
3226 +# CONFIG_INET6_TUNNEL is not set
3227 +# CONFIG_NETWORK_SECMARK is not set
3228 +# CONFIG_NETFILTER is not set
3229 +# CONFIG_IP_DCCP is not set
3230 +# CONFIG_IP_SCTP is not set
3231 +# CONFIG_TIPC is not set
3232 +# CONFIG_ATM is not set
3233 +# CONFIG_BRIDGE is not set
3234 +# CONFIG_VLAN_8021Q is not set
3235 +# CONFIG_DECNET is not set
3236 +# CONFIG_LLC2 is not set
3237 +# CONFIG_IPX is not set
3238 +# CONFIG_ATALK is not set
3239 +# CONFIG_X25 is not set
3240 +# CONFIG_LAPB is not set
3241 +# CONFIG_ECONET is not set
3242 +# CONFIG_WAN_ROUTER is not set
3243 +# CONFIG_NET_SCHED is not set
3244 +
3245 +#
3246 +# Network testing
3247 +#
3248 +# CONFIG_NET_PKTGEN is not set
3249 +# CONFIG_NET_TCPPROBE is not set
3250 +# CONFIG_HAMRADIO is not set
3251 +# CONFIG_IRDA is not set
3252 +# CONFIG_BT is not set
3253 +# CONFIG_AF_RXRPC is not set
3254 +
3255 +#
3256 +# Wireless
3257 +#
3258 +# CONFIG_CFG80211 is not set
3259 +# CONFIG_WIRELESS_EXT is not set
3260 +# CONFIG_MAC80211 is not set
3261 +# CONFIG_IEEE80211 is not set
3262 +# CONFIG_RFKILL is not set
3263 +# CONFIG_NET_9P is not set
3264 +
3265 +#
3266 +# Device Drivers
3267 +#
3268 +
3269 +#
3270 +# Generic Driver Options
3271 +#
3272 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
3273 +CONFIG_STANDALONE=y
3274 +# CONFIG_PREVENT_FIRMWARE_BUILD is not set
3275 +# CONFIG_FW_LOADER is not set
3276 +# CONFIG_DEBUG_DRIVER is not set
3277 +# CONFIG_DEBUG_DEVRES is not set
3278 +# CONFIG_SYS_HYPERVISOR is not set
3279 +# CONFIG_CONNECTOR is not set
3280 +CONFIG_MTD=y
3281 +# CONFIG_MTD_DEBUG is not set
3282 +# CONFIG_MTD_CONCAT is not set
3283 +CONFIG_MTD_PARTITIONS=y
3284 +# CONFIG_MTD_REDBOOT_PARTS is not set
3285 +CONFIG_MTD_CMDLINE_PARTS=y
3286 +
3287 +#
3288 +# User Modules And Translation Layers
3289 +#
3290 +CONFIG_MTD_CHAR=y
3291 +CONFIG_MTD_BLKDEVS=y
3292 +CONFIG_MTD_BLOCK=y
3293 +# CONFIG_FTL is not set
3294 +# CONFIG_NFTL is not set
3295 +# CONFIG_INFTL is not set
3296 +# CONFIG_RFD_FTL is not set
3297 +# CONFIG_SSFDC is not set
3298 +# CONFIG_MTD_OOPS is not set
3299 +
3300 +#
3301 +# RAM/ROM/Flash chip drivers
3302 +#
3303 +CONFIG_MTD_CFI=y
3304 +# CONFIG_MTD_JEDECPROBE is not set
3305 +CONFIG_MTD_GEN_PROBE=y
3306 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
3307 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
3308 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
3309 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
3310 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
3311 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
3312 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
3313 +CONFIG_MTD_CFI_I1=y
3314 +CONFIG_MTD_CFI_I2=y
3315 +# CONFIG_MTD_CFI_I4 is not set
3316 +# CONFIG_MTD_CFI_I8 is not set
3317 +# CONFIG_MTD_CFI_INTELEXT is not set
3318 +CONFIG_MTD_CFI_AMDSTD=y
3319 +# CONFIG_MTD_CFI_STAA is not set
3320 +CONFIG_MTD_CFI_UTIL=y
3321 +# CONFIG_MTD_RAM is not set
3322 +# CONFIG_MTD_ROM is not set
3323 +# CONFIG_MTD_ABSENT is not set
3324 +
3325 +#
3326 +# Mapping drivers for chip access
3327 +#
3328 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
3329 +CONFIG_MTD_PHYSMAP=y
3330 +CONFIG_MTD_PHYSMAP_START=0x8000000
3331 +CONFIG_MTD_PHYSMAP_LEN=0x0
3332 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
3333 +# CONFIG_MTD_PLATRAM is not set
3334 +
3335 +#
3336 +# Self-contained MTD device drivers
3337 +#
3338 +CONFIG_MTD_DATAFLASH=m
3339 +CONFIG_MTD_M25P80=m
3340 +# CONFIG_MTD_SLRAM is not set
3341 +# CONFIG_MTD_PHRAM is not set
3342 +# CONFIG_MTD_MTDRAM is not set
3343 +# CONFIG_MTD_BLOCK2MTD is not set
3344 +
3345 +#
3346 +# Disk-On-Chip Device Drivers
3347 +#
3348 +# CONFIG_MTD_DOC2000 is not set
3349 +# CONFIG_MTD_DOC2001 is not set
3350 +# CONFIG_MTD_DOC2001PLUS is not set
3351 +# CONFIG_MTD_NAND is not set
3352 +# CONFIG_MTD_ONENAND is not set
3353 +
3354 +#
3355 +# UBI - Unsorted block images
3356 +#
3357 +# CONFIG_MTD_UBI is not set
3358 +# CONFIG_PARPORT is not set
3359 +CONFIG_BLK_DEV=y
3360 +# CONFIG_BLK_DEV_COW_COMMON is not set
3361 +CONFIG_BLK_DEV_LOOP=m
3362 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set
3363 +CONFIG_BLK_DEV_NBD=m
3364 +CONFIG_BLK_DEV_RAM=m
3365 +CONFIG_BLK_DEV_RAM_COUNT=16
3366 +CONFIG_BLK_DEV_RAM_SIZE=4096
3367 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
3368 +# CONFIG_CDROM_PKTCDVD is not set
3369 +# CONFIG_ATA_OVER_ETH is not set
3370 +CONFIG_MISC_DEVICES=y
3371 +CONFIG_ATMEL_PWM=m
3372 +CONFIG_ATMEL_TCLIB=y
3373 +CONFIG_ATMEL_TCB_CLKSRC=y
3374 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
3375 +# CONFIG_EEPROM_93CX6 is not set
3376 +CONFIG_ATMEL_SSC=m
3377 +# CONFIG_IDE is not set
3378 +
3379 +#
3380 +# SCSI device support
3381 +#
3382 +# CONFIG_RAID_ATTRS is not set
3383 +CONFIG_SCSI=m
3384 +CONFIG_SCSI_DMA=y
3385 +# CONFIG_SCSI_TGT is not set
3386 +# CONFIG_SCSI_NETLINK is not set
3387 +# CONFIG_SCSI_PROC_FS is not set
3388 +
3389 +#
3390 +# SCSI support type (disk, tape, CD-ROM)
3391 +#
3392 +CONFIG_BLK_DEV_SD=m
3393 +# CONFIG_CHR_DEV_ST is not set
3394 +# CONFIG_CHR_DEV_OSST is not set
3395 +CONFIG_BLK_DEV_SR=m
3396 +# CONFIG_BLK_DEV_SR_VENDOR is not set
3397 +# CONFIG_CHR_DEV_SG is not set
3398 +# CONFIG_CHR_DEV_SCH is not set
3399 +
3400 +#
3401 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
3402 +#
3403 +# CONFIG_SCSI_MULTI_LUN is not set
3404 +# CONFIG_SCSI_CONSTANTS is not set
3405 +# CONFIG_SCSI_LOGGING is not set
3406 +# CONFIG_SCSI_SCAN_ASYNC is not set
3407 +CONFIG_SCSI_WAIT_SCAN=m
3408 +
3409 +#
3410 +# SCSI Transports
3411 +#
3412 +# CONFIG_SCSI_SPI_ATTRS is not set
3413 +# CONFIG_SCSI_FC_ATTRS is not set
3414 +# CONFIG_SCSI_ISCSI_ATTRS is not set
3415 +# CONFIG_SCSI_SAS_LIBSAS is not set
3416 +# CONFIG_SCSI_SRP_ATTRS is not set
3417 +CONFIG_SCSI_LOWLEVEL=y
3418 +# CONFIG_ISCSI_TCP is not set
3419 +# CONFIG_SCSI_DEBUG is not set
3420 +CONFIG_ATA=m
3421 +# CONFIG_ATA_NONSTANDARD is not set
3422 +CONFIG_PATA_AT32=m
3423 +# CONFIG_PATA_PLATFORM is not set
3424 +# CONFIG_MD is not set
3425 +CONFIG_NETDEVICES=y
3426 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
3427 +# CONFIG_DUMMY is not set
3428 +# CONFIG_BONDING is not set
3429 +# CONFIG_MACVLAN is not set
3430 +# CONFIG_EQUALIZER is not set
3431 +# CONFIG_TUN is not set
3432 +# CONFIG_VETH is not set
3433 +# CONFIG_NET_ETHERNET is not set
3434 +# CONFIG_NETDEV_1000 is not set
3435 +# CONFIG_NETDEV_10000 is not set
3436 +
3437 +#
3438 +# Wireless LAN
3439 +#
3440 +# CONFIG_WLAN_PRE80211 is not set
3441 +# CONFIG_WLAN_80211 is not set
3442 +# CONFIG_WAN is not set
3443 +CONFIG_PPP=m
3444 +# CONFIG_PPP_MULTILINK is not set
3445 +# CONFIG_PPP_FILTER is not set
3446 +CONFIG_PPP_ASYNC=m
3447 +# CONFIG_PPP_SYNC_TTY is not set
3448 +CONFIG_PPP_DEFLATE=m
3449 +CONFIG_PPP_BSDCOMP=m
3450 +# CONFIG_PPP_MPPE is not set
3451 +# CONFIG_PPPOE is not set
3452 +# CONFIG_PPPOL2TP is not set
3453 +# CONFIG_SLIP is not set
3454 +CONFIG_SLHC=m
3455 +# CONFIG_SHAPER is not set
3456 +# CONFIG_NETCONSOLE is not set
3457 +# CONFIG_NETPOLL is not set
3458 +# CONFIG_NET_POLL_CONTROLLER is not set
3459 +# CONFIG_ISDN is not set
3460 +# CONFIG_PHONE is not set
3461 +
3462 +#
3463 +# Input device support
3464 +#
3465 +CONFIG_INPUT=m
3466 +# CONFIG_INPUT_FF_MEMLESS is not set
3467 +CONFIG_INPUT_POLLDEV=m
3468 +
3469 +#
3470 +# Userland interfaces
3471 +#
3472 +CONFIG_INPUT_MOUSEDEV=m
3473 +CONFIG_INPUT_MOUSEDEV_PSAUX=y
3474 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
3475 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
3476 +# CONFIG_INPUT_JOYDEV is not set
3477 +# CONFIG_INPUT_EVDEV is not set
3478 +# CONFIG_INPUT_EVBUG is not set
3479 +
3480 +#
3481 +# Input Device Drivers
3482 +#
3483 +CONFIG_INPUT_KEYBOARD=y
3484 +# CONFIG_KEYBOARD_ATKBD is not set
3485 +# CONFIG_KEYBOARD_SUNKBD is not set
3486 +# CONFIG_KEYBOARD_LKKBD is not set
3487 +# CONFIG_KEYBOARD_XTKBD is not set
3488 +# CONFIG_KEYBOARD_NEWTON is not set
3489 +# CONFIG_KEYBOARD_STOWAWAY is not set
3490 +CONFIG_KEYBOARD_GPIO=m
3491 +CONFIG_INPUT_MOUSE=y
3492 +# CONFIG_MOUSE_PS2 is not set
3493 +# CONFIG_MOUSE_SERIAL is not set
3494 +# CONFIG_MOUSE_VSXXXAA is not set
3495 +CONFIG_MOUSE_GPIO=m
3496 +# CONFIG_INPUT_JOYSTICK is not set
3497 +# CONFIG_INPUT_TABLET is not set
3498 +# CONFIG_INPUT_TOUCHSCREEN is not set
3499 +# CONFIG_INPUT_MISC is not set
3500 +
3501 +#
3502 +# Hardware I/O ports
3503 +#
3504 +# CONFIG_SERIO is not set
3505 +# CONFIG_GAMEPORT is not set
3506 +
3507 +#
3508 +# Character devices
3509 +#
3510 +# CONFIG_VT is not set
3511 +# CONFIG_SERIAL_NONSTANDARD is not set
3512 +
3513 +#
3514 +# Serial drivers
3515 +#
3516 +# CONFIG_SERIAL_8250 is not set
3517 +
3518 +#
3519 +# Non-8250 serial port support
3520 +#
3521 +CONFIG_SERIAL_ATMEL=y
3522 +CONFIG_SERIAL_ATMEL_CONSOLE=y
3523 +CONFIG_SERIAL_ATMEL_PDC=y
3524 +# CONFIG_SERIAL_ATMEL_TTYAT is not set
3525 +CONFIG_SERIAL_CORE=y
3526 +CONFIG_SERIAL_CORE_CONSOLE=y
3527 +CONFIG_UNIX98_PTYS=y
3528 +# CONFIG_LEGACY_PTYS is not set
3529 +# CONFIG_IPMI_HANDLER is not set
3530 +# CONFIG_HW_RANDOM is not set
3531 +# CONFIG_RTC is not set
3532 +# CONFIG_GEN_RTC is not set
3533 +# CONFIG_R3964 is not set
3534 +# CONFIG_RAW_DRIVER is not set
3535 +# CONFIG_TCG_TPM is not set
3536 +CONFIG_I2C=m
3537 +CONFIG_I2C_BOARDINFO=y
3538 +CONFIG_I2C_CHARDEV=m
3539 +
3540 +#
3541 +# I2C Algorithms
3542 +#
3543 +CONFIG_I2C_ALGOBIT=m
3544 +# CONFIG_I2C_ALGOPCF is not set
3545 +# CONFIG_I2C_ALGOPCA is not set
3546 +
3547 +#
3548 +# I2C Hardware Bus support
3549 +#
3550 +CONFIG_I2C_ATMELTWI=m
3551 +CONFIG_I2C_GPIO=m
3552 +# CONFIG_I2C_OCORES is not set
3553 +# CONFIG_I2C_PARPORT_LIGHT is not set
3554 +# CONFIG_I2C_SIMTEC is not set
3555 +# CONFIG_I2C_TAOS_EVM is not set
3556 +# CONFIG_I2C_STUB is not set
3557 +
3558 +#
3559 +# Miscellaneous I2C Chip support
3560 +#
3561 +# CONFIG_SENSORS_DS1337 is not set
3562 +# CONFIG_SENSORS_DS1374 is not set
3563 +# CONFIG_DS1682 is not set
3564 +# CONFIG_SENSORS_EEPROM is not set
3565 +# CONFIG_SENSORS_PCF8574 is not set
3566 +# CONFIG_SENSORS_PCA9539 is not set
3567 +# CONFIG_SENSORS_PCF8591 is not set
3568 +# CONFIG_SENSORS_MAX6875 is not set
3569 +# CONFIG_SENSORS_TSL2550 is not set
3570 +# CONFIG_I2C_DEBUG_CORE is not set
3571 +# CONFIG_I2C_DEBUG_ALGO is not set
3572 +# CONFIG_I2C_DEBUG_BUS is not set
3573 +# CONFIG_I2C_DEBUG_CHIP is not set
3574 +
3575 +#
3576 +# SPI support
3577 +#
3578 +CONFIG_SPI=y
3579 +# CONFIG_SPI_DEBUG is not set
3580 +CONFIG_SPI_MASTER=y
3581 +
3582 +#
3583 +# SPI Master Controller Drivers
3584 +#
3585 +CONFIG_SPI_ATMEL=y
3586 +# CONFIG_SPI_BITBANG is not set
3587 +
3588 +#
3589 +# SPI Protocol Masters
3590 +#
3591 +# CONFIG_SPI_AT25 is not set
3592 +CONFIG_SPI_SPIDEV=m
3593 +# CONFIG_SPI_TLE62X0 is not set
3594 +# CONFIG_W1 is not set
3595 +# CONFIG_POWER_SUPPLY is not set
3596 +# CONFIG_HWMON is not set
3597 +CONFIG_WATCHDOG=y
3598 +# CONFIG_WATCHDOG_NOWAYOUT is not set
3599 +
3600 +#
3601 +# Watchdog Device Drivers
3602 +#
3603 +# CONFIG_SOFT_WATCHDOG is not set
3604 +CONFIG_AT32AP700X_WDT=y
3605 +
3606 +#
3607 +# Sonics Silicon Backplane
3608 +#
3609 +CONFIG_SSB_POSSIBLE=y
3610 +# CONFIG_SSB is not set
3611 +
3612 +#
3613 +# Multifunction device drivers
3614 +#
3615 +# CONFIG_MFD_SM501 is not set
3616 +
3617 +#
3618 +# Multimedia devices
3619 +#
3620 +# CONFIG_VIDEO_DEV is not set
3621 +# CONFIG_DVB_CORE is not set
3622 +# CONFIG_DAB is not set
3623 +
3624 +#
3625 +# Graphics support
3626 +#
3627 +# CONFIG_VGASTATE is not set
3628 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
3629 +# CONFIG_FB is not set
3630 +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
3631 +
3632 +#
3633 +# Display device support
3634 +#
3635 +# CONFIG_DISPLAY_SUPPORT is not set
3636 +
3637 +#
3638 +# Sound
3639 +#
3640 +CONFIG_SOUND=m
3641 +
3642 +#
3643 +# Advanced Linux Sound Architecture
3644 +#
3645 +CONFIG_SND=m
3646 +CONFIG_SND_TIMER=m
3647 +CONFIG_SND_PCM=m
3648 +# CONFIG_SND_SEQUENCER is not set
3649 +CONFIG_SND_OSSEMUL=y
3650 +CONFIG_SND_MIXER_OSS=m
3651 +CONFIG_SND_PCM_OSS=m
3652 +CONFIG_SND_PCM_OSS_PLUGINS=y
3653 +# CONFIG_SND_DYNAMIC_MINORS is not set
3654 +CONFIG_SND_SUPPORT_OLD_API=y
3655 +CONFIG_SND_VERBOSE_PROCFS=y
3656 +# CONFIG_SND_VERBOSE_PRINTK is not set
3657 +# CONFIG_SND_DEBUG is not set
3658 +
3659 +#
3660 +# Generic devices
3661 +#
3662 +CONFIG_SND_AC97_CODEC=m
3663 +# CONFIG_SND_DUMMY is not set
3664 +# CONFIG_SND_MTPAV is not set
3665 +# CONFIG_SND_SERIAL_U16550 is not set
3666 +# CONFIG_SND_MPU401 is not set
3667 +
3668 +#
3669 +# AVR32 devices
3670 +#
3671 +CONFIG_SND_ATMEL_AC97=m
3672 +
3673 +#
3674 +# SPI devices
3675 +#
3676 +CONFIG_SND_AT73C213=m
3677 +CONFIG_SND_AT73C213_TARGET_BITRATE=48000
3678 +
3679 +#
3680 +# System on Chip audio support
3681 +#
3682 +# CONFIG_SND_SOC is not set
3683 +
3684 +#
3685 +# SoC Audio support for SuperH
3686 +#
3687 +
3688 +#
3689 +# Open Sound System
3690 +#
3691 +# CONFIG_SOUND_PRIME is not set
3692 +CONFIG_AC97_BUS=m
3693 +# CONFIG_HID_SUPPORT is not set
3694 +CONFIG_USB_SUPPORT=y
3695 +# CONFIG_USB_ARCH_HAS_HCD is not set
3696 +# CONFIG_USB_ARCH_HAS_OHCI is not set
3697 +# CONFIG_USB_ARCH_HAS_EHCI is not set
3698 +
3699 +#
3700 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
3701 +#
3702 +
3703 +#
3704 +# USB Gadget Support
3705 +#
3706 +CONFIG_USB_GADGET=y
3707 +# CONFIG_USB_GADGET_DEBUG is not set
3708 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
3709 +CONFIG_USB_GADGET_DEBUG_FS=y
3710 +CONFIG_USB_GADGET_SELECTED=y
3711 +# CONFIG_USB_GADGET_AMD5536UDC is not set
3712 +CONFIG_USB_GADGET_ATMEL_USBA=y
3713 +CONFIG_USB_ATMEL_USBA=y
3714 +# CONFIG_USB_GADGET_FSL_USB2 is not set
3715 +# CONFIG_USB_GADGET_NET2280 is not set
3716 +# CONFIG_USB_GADGET_PXA2XX is not set
3717 +# CONFIG_USB_GADGET_M66592 is not set
3718 +# CONFIG_USB_GADGET_GOKU is not set
3719 +# CONFIG_USB_GADGET_LH7A40X is not set
3720 +# CONFIG_USB_GADGET_OMAP is not set
3721 +# CONFIG_USB_GADGET_S3C2410 is not set
3722 +# CONFIG_USB_GADGET_AT91 is not set
3723 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
3724 +CONFIG_USB_GADGET_DUALSPEED=y
3725 +CONFIG_USB_ZERO=m
3726 +CONFIG_USB_ETH=m
3727 +CONFIG_USB_ETH_RNDIS=y
3728 +CONFIG_USB_GADGETFS=m
3729 +CONFIG_USB_FILE_STORAGE=m
3730 +# CONFIG_USB_FILE_STORAGE_TEST is not set
3731 +CONFIG_USB_G_SERIAL=m
3732 +# CONFIG_USB_MIDI_GADGET is not set
3733 +CONFIG_MMC=y
3734 +# CONFIG_MMC_DEBUG is not set
3735 +# CONFIG_MMC_UNSAFE_RESUME is not set
3736 +
3737 +#
3738 +# MMC/SD Card Drivers
3739 +#
3740 +CONFIG_MMC_BLOCK=y
3741 +# CONFIG_MMC_BLOCK_BOUNCE is not set
3742 +# CONFIG_SDIO_UART is not set
3743 +
3744 +#
3745 +# MMC/SD Host Controller Drivers
3746 +#
3747 +CONFIG_MMC_ATMELMCI=y
3748 +CONFIG_MMC_SPI=m
3749 +CONFIG_NEW_LEDS=y
3750 +CONFIG_LEDS_CLASS=y
3751 +
3752 +#
3753 +# LED drivers
3754 +#
3755 +CONFIG_LEDS_ATMEL_PWM=m
3756 +CONFIG_LEDS_GPIO=y
3757 +
3758 +#
3759 +# LED Triggers
3760 +#
3761 +CONFIG_LEDS_TRIGGERS=y
3762 +CONFIG_LEDS_TRIGGER_TIMER=y
3763 +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
3764 +CONFIG_RTC_LIB=y
3765 +CONFIG_RTC_CLASS=y
3766 +CONFIG_RTC_HCTOSYS=y
3767 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
3768 +# CONFIG_RTC_DEBUG is not set
3769 +
3770 +#
3771 +# RTC interfaces
3772 +#
3773 +CONFIG_RTC_INTF_SYSFS=y
3774 +CONFIG_RTC_INTF_PROC=y
3775 +CONFIG_RTC_INTF_DEV=y
3776 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
3777 +# CONFIG_RTC_DRV_TEST is not set
3778 +
3779 +#
3780 +# I2C RTC drivers
3781 +#
3782 +# CONFIG_RTC_DRV_DS1307 is not set
3783 +# CONFIG_RTC_DRV_DS1374 is not set
3784 +# CONFIG_RTC_DRV_DS1672 is not set
3785 +# CONFIG_RTC_DRV_MAX6900 is not set
3786 +# CONFIG_RTC_DRV_RS5C372 is not set
3787 +# CONFIG_RTC_DRV_ISL1208 is not set
3788 +# CONFIG_RTC_DRV_X1205 is not set
3789 +# CONFIG_RTC_DRV_PCF8563 is not set
3790 +# CONFIG_RTC_DRV_PCF8583 is not set
3791 +# CONFIG_RTC_DRV_M41T80 is not set
3792 +
3793 +#
3794 +# SPI RTC drivers
3795 +#
3796 +# CONFIG_RTC_DRV_RS5C348 is not set
3797 +# CONFIG_RTC_DRV_MAX6902 is not set
3798 +
3799 +#
3800 +# Platform RTC drivers
3801 +#
3802 +# CONFIG_RTC_DRV_DS1553 is not set
3803 +# CONFIG_RTC_DRV_STK17TA8 is not set
3804 +# CONFIG_RTC_DRV_DS1742 is not set
3805 +# CONFIG_RTC_DRV_M48T86 is not set
3806 +# CONFIG_RTC_DRV_M48T59 is not set
3807 +# CONFIG_RTC_DRV_V3020 is not set
3808 +
3809 +#
3810 +# on-CPU RTC drivers
3811 +#
3812 +CONFIG_RTC_DRV_AT32AP700X=y
3813 +
3814 +#
3815 +# Userspace I/O
3816 +#
3817 +CONFIG_UIO=m
3818 +
3819 +#
3820 +# File systems
3821 +#
3822 +CONFIG_EXT2_FS=m
3823 +# CONFIG_EXT2_FS_XATTR is not set
3824 +# CONFIG_EXT2_FS_XIP is not set
3825 +CONFIG_EXT3_FS=m
3826 +# CONFIG_EXT3_FS_XATTR is not set
3827 +# CONFIG_EXT4DEV_FS is not set
3828 +CONFIG_JBD=m
3829 +# CONFIG_JBD_DEBUG is not set
3830 +# CONFIG_REISERFS_FS is not set
3831 +# CONFIG_JFS_FS is not set
3832 +# CONFIG_FS_POSIX_ACL is not set
3833 +# CONFIG_XFS_FS is not set
3834 +# CONFIG_GFS2_FS is not set
3835 +# CONFIG_OCFS2_FS is not set
3836 +# CONFIG_MINIX_FS is not set
3837 +# CONFIG_ROMFS_FS is not set
3838 +CONFIG_INOTIFY=y
3839 +CONFIG_INOTIFY_USER=y
3840 +# CONFIG_QUOTA is not set
3841 +# CONFIG_DNOTIFY is not set
3842 +# CONFIG_AUTOFS_FS is not set
3843 +# CONFIG_AUTOFS4_FS is not set
3844 +CONFIG_FUSE_FS=m
3845 +
3846 +#
3847 +# CD-ROM/DVD Filesystems
3848 +#
3849 +# CONFIG_ISO9660_FS is not set
3850 +# CONFIG_UDF_FS is not set
3851 +
3852 +#
3853 +# DOS/FAT/NT Filesystems
3854 +#
3855 +CONFIG_FAT_FS=m
3856 +CONFIG_MSDOS_FS=m
3857 +CONFIG_VFAT_FS=m
3858 +CONFIG_FAT_DEFAULT_CODEPAGE=437
3859 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
3860 +# CONFIG_NTFS_FS is not set
3861 +
3862 +#
3863 +# Pseudo filesystems
3864 +#
3865 +CONFIG_PROC_FS=y
3866 +CONFIG_PROC_KCORE=y
3867 +CONFIG_PROC_SYSCTL=y
3868 +CONFIG_SYSFS=y
3869 +CONFIG_TMPFS=y
3870 +# CONFIG_TMPFS_POSIX_ACL is not set
3871 +# CONFIG_HUGETLB_PAGE is not set
3872 +CONFIG_CONFIGFS_FS=y
3873 +
3874 +#
3875 +# Miscellaneous filesystems
3876 +#
3877 +# CONFIG_ADFS_FS is not set
3878 +# CONFIG_AFFS_FS is not set
3879 +# CONFIG_HFS_FS is not set
3880 +# CONFIG_HFSPLUS_FS is not set
3881 +# CONFIG_BEFS_FS is not set
3882 +# CONFIG_BFS_FS is not set
3883 +# CONFIG_EFS_FS is not set
3884 +CONFIG_JFFS2_FS=y
3885 +CONFIG_JFFS2_FS_DEBUG=0
3886 +CONFIG_JFFS2_FS_WRITEBUFFER=y
3887 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
3888 +# CONFIG_JFFS2_SUMMARY is not set
3889 +# CONFIG_JFFS2_FS_XATTR is not set
3890 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
3891 +CONFIG_JFFS2_ZLIB=y
3892 +# CONFIG_JFFS2_LZO is not set
3893 +CONFIG_JFFS2_RTIME=y
3894 +# CONFIG_JFFS2_RUBIN is not set
3895 +# CONFIG_CRAMFS is not set
3896 +# CONFIG_VXFS_FS is not set
3897 +# CONFIG_HPFS_FS is not set
3898 +# CONFIG_QNX4FS_FS is not set
3899 +# CONFIG_SYSV_FS is not set
3900 +# CONFIG_UFS_FS is not set
3901 +# CONFIG_NETWORK_FILESYSTEMS is not set
3902 +
3903 +#
3904 +# Partition Types
3905 +#
3906 +# CONFIG_PARTITION_ADVANCED is not set
3907 +CONFIG_MSDOS_PARTITION=y
3908 +CONFIG_NLS=m
3909 +CONFIG_NLS_DEFAULT="iso8859-1"
3910 +CONFIG_NLS_CODEPAGE_437=m
3911 +# CONFIG_NLS_CODEPAGE_737 is not set
3912 +# CONFIG_NLS_CODEPAGE_775 is not set
3913 +# CONFIG_NLS_CODEPAGE_850 is not set
3914 +# CONFIG_NLS_CODEPAGE_852 is not set
3915 +# CONFIG_NLS_CODEPAGE_855 is not set
3916 +# CONFIG_NLS_CODEPAGE_857 is not set
3917 +# CONFIG_NLS_CODEPAGE_860 is not set
3918 +# CONFIG_NLS_CODEPAGE_861 is not set
3919 +# CONFIG_NLS_CODEPAGE_862 is not set
3920 +# CONFIG_NLS_CODEPAGE_863 is not set
3921 +# CONFIG_NLS_CODEPAGE_864 is not set
3922 +# CONFIG_NLS_CODEPAGE_865 is not set
3923 +# CONFIG_NLS_CODEPAGE_866 is not set
3924 +# CONFIG_NLS_CODEPAGE_869 is not set
3925 +# CONFIG_NLS_CODEPAGE_936 is not set
3926 +# CONFIG_NLS_CODEPAGE_950 is not set
3927 +# CONFIG_NLS_CODEPAGE_932 is not set
3928 +# CONFIG_NLS_CODEPAGE_949 is not set
3929 +# CONFIG_NLS_CODEPAGE_874 is not set
3930 +# CONFIG_NLS_ISO8859_8 is not set
3931 +# CONFIG_NLS_CODEPAGE_1250 is not set
3932 +# CONFIG_NLS_CODEPAGE_1251 is not set
3933 +# CONFIG_NLS_ASCII is not set
3934 +CONFIG_NLS_ISO8859_1=m
3935 +# CONFIG_NLS_ISO8859_2 is not set
3936 +# CONFIG_NLS_ISO8859_3 is not set
3937 +# CONFIG_NLS_ISO8859_4 is not set
3938 +# CONFIG_NLS_ISO8859_5 is not set
3939 +# CONFIG_NLS_ISO8859_6 is not set
3940 +# CONFIG_NLS_ISO8859_7 is not set
3941 +# CONFIG_NLS_ISO8859_9 is not set
3942 +# CONFIG_NLS_ISO8859_13 is not set
3943 +# CONFIG_NLS_ISO8859_14 is not set
3944 +# CONFIG_NLS_ISO8859_15 is not set
3945 +# CONFIG_NLS_KOI8_R is not set
3946 +# CONFIG_NLS_KOI8_U is not set
3947 +CONFIG_NLS_UTF8=m
3948 +# CONFIG_DLM is not set
3949 +CONFIG_INSTRUMENTATION=y
3950 +CONFIG_PROFILING=y
3951 +CONFIG_OPROFILE=m
3952 +CONFIG_KPROBES=y
3953 +# CONFIG_MARKERS is not set
3954 +
3955 +#
3956 +# Kernel hacking
3957 +#
3958 +# CONFIG_PRINTK_TIME is not set
3959 +CONFIG_ENABLE_WARN_DEPRECATED=y
3960 +CONFIG_ENABLE_MUST_CHECK=y
3961 +CONFIG_MAGIC_SYSRQ=y
3962 +# CONFIG_UNUSED_SYMBOLS is not set
3963 +CONFIG_DEBUG_FS=y
3964 +# CONFIG_HEADERS_CHECK is not set
3965 +CONFIG_DEBUG_KERNEL=y
3966 +# CONFIG_DEBUG_SHIRQ is not set
3967 +CONFIG_DETECT_SOFTLOCKUP=y
3968 +CONFIG_SCHED_DEBUG=y
3969 +# CONFIG_SCHEDSTATS is not set
3970 +# CONFIG_TIMER_STATS is not set
3971 +# CONFIG_DEBUG_RT_MUTEXES is not set
3972 +# CONFIG_RT_MUTEX_TESTER is not set
3973 +# CONFIG_DEBUG_SPINLOCK is not set
3974 +# CONFIG_DEBUG_MUTEXES is not set
3975 +# CONFIG_DEBUG_LOCK_ALLOC is not set
3976 +# CONFIG_PROVE_LOCKING is not set
3977 +# CONFIG_LOCK_STAT is not set
3978 +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
3979 +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
3980 +# CONFIG_DEBUG_KOBJECT is not set
3981 +CONFIG_DEBUG_BUGVERBOSE=y
3982 +# CONFIG_DEBUG_INFO is not set
3983 +# CONFIG_DEBUG_VM is not set
3984 +# CONFIG_DEBUG_LIST is not set
3985 +# CONFIG_DEBUG_SG is not set
3986 +CONFIG_FRAME_POINTER=y
3987 +CONFIG_FORCED_INLINING=y
3988 +# CONFIG_BOOT_PRINTK_DELAY is not set
3989 +# CONFIG_RCU_TORTURE_TEST is not set
3990 +# CONFIG_LKDTM is not set
3991 +# CONFIG_FAULT_INJECTION is not set
3992 +# CONFIG_SAMPLES is not set
3993 +
3994 +#
3995 +# Security options
3996 +#
3997 +# CONFIG_KEYS is not set
3998 +# CONFIG_SECURITY is not set
3999 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
4000 +# CONFIG_CRYPTO is not set
4001 +
4002 +#
4003 +# Library routines
4004 +#
4005 +CONFIG_BITREVERSE=y
4006 +CONFIG_CRC_CCITT=m
4007 +# CONFIG_CRC16 is not set
4008 +CONFIG_CRC_ITU_T=m
4009 +CONFIG_CRC32=y
4010 +CONFIG_CRC7=m
4011 +# CONFIG_LIBCRC32C is not set
4012 +CONFIG_AUDIT_GENERIC=y
4013 +CONFIG_ZLIB_INFLATE=y
4014 +CONFIG_ZLIB_DEFLATE=y
4015 +CONFIG_PLIST=y
4016 +CONFIG_HAS_IOMEM=y
4017 +CONFIG_HAS_IOPORT=y
4018 +CONFIG_HAS_DMA=y
4019 Index: linux-2.6.24.7/arch/avr32/configs/atstk1004_defconfig
4020 ===================================================================
4021 --- /dev/null
4022 +++ linux-2.6.24.7/arch/avr32/configs/atstk1004_defconfig
4023 @@ -0,0 +1,639 @@
4024 +#
4025 +# Automatically generated make config: don't edit
4026 +# Linux kernel version: 2.6.24
4027 +# Thu Mar 6 12:51:05 2008
4028 +#
4029 +CONFIG_AVR32=y
4030 +CONFIG_GENERIC_GPIO=y
4031 +CONFIG_GENERIC_HARDIRQS=y
4032 +CONFIG_STACKTRACE_SUPPORT=y
4033 +CONFIG_LOCKDEP_SUPPORT=y
4034 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
4035 +CONFIG_HARDIRQS_SW_RESEND=y
4036 +CONFIG_GENERIC_IRQ_PROBE=y
4037 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
4038 +CONFIG_GENERIC_TIME=y
4039 +CONFIG_GENERIC_CLOCKEVENTS=y
4040 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
4041 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
4042 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
4043 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
4044 +CONFIG_GENERIC_HWEIGHT=y
4045 +CONFIG_GENERIC_CALIBRATE_DELAY=y
4046 +CONFIG_GENERIC_BUG=y
4047 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
4048 +
4049 +#
4050 +# General setup
4051 +#
4052 +CONFIG_EXPERIMENTAL=y
4053 +CONFIG_BROKEN_ON_SMP=y
4054 +CONFIG_INIT_ENV_ARG_LIMIT=32
4055 +CONFIG_LOCALVERSION=""
4056 +# CONFIG_LOCALVERSION_AUTO is not set
4057 +# CONFIG_SYSVIPC is not set
4058 +# CONFIG_POSIX_MQUEUE is not set
4059 +# CONFIG_BSD_PROCESS_ACCT is not set
4060 +# CONFIG_TASKSTATS is not set
4061 +# CONFIG_USER_NS is not set
4062 +# CONFIG_PID_NS is not set
4063 +# CONFIG_AUDIT is not set
4064 +# CONFIG_IKCONFIG is not set
4065 +CONFIG_LOG_BUF_SHIFT=14
4066 +# CONFIG_CGROUPS is not set
4067 +# CONFIG_FAIR_GROUP_SCHED is not set
4068 +CONFIG_SYSFS_DEPRECATED=y
4069 +# CONFIG_RELAY is not set
4070 +# CONFIG_BLK_DEV_INITRD is not set
4071 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
4072 +CONFIG_SYSCTL=y
4073 +CONFIG_EMBEDDED=y
4074 +# CONFIG_SYSCTL_SYSCALL is not set
4075 +CONFIG_KALLSYMS=y
4076 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
4077 +CONFIG_HOTPLUG=y
4078 +CONFIG_PRINTK=y
4079 +CONFIG_BUG=y
4080 +CONFIG_ELF_CORE=y
4081 +# CONFIG_BASE_FULL is not set
4082 +# CONFIG_FUTEX is not set
4083 +# CONFIG_EPOLL is not set
4084 +# CONFIG_SIGNALFD is not set
4085 +# CONFIG_EVENTFD is not set
4086 +CONFIG_SHMEM=y
4087 +CONFIG_VM_EVENT_COUNTERS=y
4088 +# CONFIG_SLAB is not set
4089 +# CONFIG_SLUB is not set
4090 +CONFIG_SLOB=y
4091 +# CONFIG_TINY_SHMEM is not set
4092 +CONFIG_BASE_SMALL=1
4093 +# CONFIG_MODULES is not set
4094 +# CONFIG_BLOCK is not set
4095 +
4096 +#
4097 +# System Type and features
4098 +#
4099 +CONFIG_TICK_ONESHOT=y
4100 +CONFIG_NO_HZ=y
4101 +CONFIG_HIGH_RES_TIMERS=y
4102 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
4103 +CONFIG_SUBARCH_AVR32B=y
4104 +CONFIG_MMU=y
4105 +CONFIG_PERFORMANCE_COUNTERS=y
4106 +CONFIG_PLATFORM_AT32AP=y
4107 +CONFIG_CPU_AT32AP700X=y
4108 +CONFIG_CPU_AT32AP7002=y
4109 +CONFIG_BOARD_ATSTK1000=y
4110 +# CONFIG_BOARD_ATNGW100 is not set
4111 +# CONFIG_BOARD_ATSTK1002 is not set
4112 +# CONFIG_BOARD_ATSTK1003 is not set
4113 +CONFIG_BOARD_ATSTK1004=y
4114 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
4115 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
4116 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
4117 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
4118 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
4119 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
4120 +# CONFIG_BOARD_ATSTK100X_ENABLE_PSIF is not set
4121 +CONFIG_LOADER_U_BOOT=y
4122 +
4123 +#
4124 +# Atmel AVR32 AP options
4125 +#
4126 +# CONFIG_AP700X_32_BIT_SMC is not set
4127 +CONFIG_AP700X_16_BIT_SMC=y
4128 +# CONFIG_AP700X_8_BIT_SMC is not set
4129 +# CONFIG_GPIO_DEV is not set
4130 +CONFIG_LOAD_ADDRESS=0x10000000
4131 +CONFIG_ENTRY_ADDRESS=0x90000000
4132 +CONFIG_PHYS_OFFSET=0x10000000
4133 +CONFIG_PREEMPT_NONE=y
4134 +# CONFIG_PREEMPT_VOLUNTARY is not set
4135 +# CONFIG_PREEMPT is not set
4136 +# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
4137 +# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
4138 +# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
4139 +CONFIG_ARCH_FLATMEM_ENABLE=y
4140 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
4141 +# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
4142 +CONFIG_SELECT_MEMORY_MODEL=y
4143 +CONFIG_FLATMEM_MANUAL=y
4144 +# CONFIG_DISCONTIGMEM_MANUAL is not set
4145 +# CONFIG_SPARSEMEM_MANUAL is not set
4146 +CONFIG_FLATMEM=y
4147 +CONFIG_FLAT_NODE_MEM_MAP=y
4148 +# CONFIG_SPARSEMEM_STATIC is not set
4149 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
4150 +CONFIG_SPLIT_PTLOCK_CPUS=4
4151 +# CONFIG_RESOURCES_64BIT is not set
4152 +CONFIG_ZONE_DMA_FLAG=0
4153 +CONFIG_VIRT_TO_BUS=y
4154 +# CONFIG_OWNERSHIP_TRACE is not set
4155 +# CONFIG_NMI_DEBUGGING is not set
4156 +# CONFIG_DW_DMAC is not set
4157 +# CONFIG_HZ_100 is not set
4158 +CONFIG_HZ_250=y
4159 +# CONFIG_HZ_300 is not set
4160 +# CONFIG_HZ_1000 is not set
4161 +CONFIG_HZ=250
4162 +CONFIG_CMDLINE=""
4163 +
4164 +#
4165 +# Power management options
4166 +#
4167 +
4168 +#
4169 +# CPU Frequency scaling
4170 +#
4171 +CONFIG_CPU_FREQ=y
4172 +CONFIG_CPU_FREQ_TABLE=y
4173 +# CONFIG_CPU_FREQ_DEBUG is not set
4174 +# CONFIG_CPU_FREQ_STAT is not set
4175 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
4176 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
4177 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
4178 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
4179 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
4180 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
4181 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
4182 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
4183 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
4184 +CONFIG_CPU_FREQ_AT32AP=y
4185 +
4186 +#
4187 +# Bus options
4188 +#
4189 +# CONFIG_ARCH_SUPPORTS_MSI is not set
4190 +# CONFIG_PCCARD is not set
4191 +
4192 +#
4193 +# Executable file formats
4194 +#
4195 +CONFIG_BINFMT_ELF=y
4196 +# CONFIG_BINFMT_MISC is not set
4197 +
4198 +#
4199 +# Networking
4200 +#
4201 +CONFIG_NET=y
4202 +
4203 +#
4204 +# Networking options
4205 +#
4206 +CONFIG_PACKET=y
4207 +CONFIG_PACKET_MMAP=y
4208 +CONFIG_UNIX=y
4209 +# CONFIG_NET_KEY is not set
4210 +CONFIG_INET=y
4211 +# CONFIG_IP_MULTICAST is not set
4212 +# CONFIG_IP_ADVANCED_ROUTER is not set
4213 +CONFIG_IP_FIB_HASH=y
4214 +# CONFIG_IP_PNP is not set
4215 +# CONFIG_NET_IPIP is not set
4216 +# CONFIG_NET_IPGRE is not set
4217 +# CONFIG_ARPD is not set
4218 +# CONFIG_SYN_COOKIES is not set
4219 +# CONFIG_INET_AH is not set
4220 +# CONFIG_INET_ESP is not set
4221 +# CONFIG_INET_IPCOMP is not set
4222 +# CONFIG_INET_XFRM_TUNNEL is not set
4223 +# CONFIG_INET_TUNNEL is not set
4224 +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
4225 +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
4226 +# CONFIG_INET_XFRM_MODE_BEET is not set
4227 +# CONFIG_INET_LRO is not set
4228 +# CONFIG_INET_DIAG is not set
4229 +# CONFIG_TCP_CONG_ADVANCED is not set
4230 +CONFIG_TCP_CONG_CUBIC=y
4231 +CONFIG_DEFAULT_TCP_CONG="cubic"
4232 +# CONFIG_TCP_MD5SIG is not set
4233 +# CONFIG_IPV6 is not set
4234 +# CONFIG_INET6_XFRM_TUNNEL is not set
4235 +# CONFIG_INET6_TUNNEL is not set
4236 +# CONFIG_NETWORK_SECMARK is not set
4237 +# CONFIG_NETFILTER is not set
4238 +# CONFIG_IP_DCCP is not set
4239 +# CONFIG_IP_SCTP is not set
4240 +# CONFIG_TIPC is not set
4241 +# CONFIG_ATM is not set
4242 +# CONFIG_BRIDGE is not set
4243 +# CONFIG_VLAN_8021Q is not set
4244 +# CONFIG_DECNET is not set
4245 +# CONFIG_LLC2 is not set
4246 +# CONFIG_IPX is not set
4247 +# CONFIG_ATALK is not set
4248 +# CONFIG_X25 is not set
4249 +# CONFIG_LAPB is not set
4250 +# CONFIG_ECONET is not set
4251 +# CONFIG_WAN_ROUTER is not set
4252 +# CONFIG_NET_SCHED is not set
4253 +
4254 +#
4255 +# Network testing
4256 +#
4257 +# CONFIG_NET_PKTGEN is not set
4258 +# CONFIG_HAMRADIO is not set
4259 +# CONFIG_IRDA is not set
4260 +# CONFIG_BT is not set
4261 +# CONFIG_AF_RXRPC is not set
4262 +
4263 +#
4264 +# Wireless
4265 +#
4266 +# CONFIG_CFG80211 is not set
4267 +# CONFIG_WIRELESS_EXT is not set
4268 +# CONFIG_MAC80211 is not set
4269 +# CONFIG_IEEE80211 is not set
4270 +# CONFIG_RFKILL is not set
4271 +# CONFIG_NET_9P is not set
4272 +
4273 +#
4274 +# Device Drivers
4275 +#
4276 +
4277 +#
4278 +# Generic Driver Options
4279 +#
4280 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
4281 +CONFIG_STANDALONE=y
4282 +# CONFIG_PREVENT_FIRMWARE_BUILD is not set
4283 +# CONFIG_FW_LOADER is not set
4284 +# CONFIG_SYS_HYPERVISOR is not set
4285 +# CONFIG_CONNECTOR is not set
4286 +CONFIG_MTD=y
4287 +# CONFIG_MTD_DEBUG is not set
4288 +# CONFIG_MTD_CONCAT is not set
4289 +CONFIG_MTD_PARTITIONS=y
4290 +# CONFIG_MTD_REDBOOT_PARTS is not set
4291 +CONFIG_MTD_CMDLINE_PARTS=y
4292 +
4293 +#
4294 +# User Modules And Translation Layers
4295 +#
4296 +CONFIG_MTD_CHAR=y
4297 +# CONFIG_MTD_OOPS is not set
4298 +
4299 +#
4300 +# RAM/ROM/Flash chip drivers
4301 +#
4302 +CONFIG_MTD_CFI=y
4303 +# CONFIG_MTD_JEDECPROBE is not set
4304 +CONFIG_MTD_GEN_PROBE=y
4305 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
4306 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
4307 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
4308 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
4309 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
4310 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
4311 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
4312 +CONFIG_MTD_CFI_I1=y
4313 +CONFIG_MTD_CFI_I2=y
4314 +# CONFIG_MTD_CFI_I4 is not set
4315 +# CONFIG_MTD_CFI_I8 is not set
4316 +# CONFIG_MTD_CFI_INTELEXT is not set
4317 +CONFIG_MTD_CFI_AMDSTD=y
4318 +# CONFIG_MTD_CFI_STAA is not set
4319 +CONFIG_MTD_CFI_UTIL=y
4320 +# CONFIG_MTD_RAM is not set
4321 +# CONFIG_MTD_ROM is not set
4322 +# CONFIG_MTD_ABSENT is not set
4323 +
4324 +#
4325 +# Mapping drivers for chip access
4326 +#
4327 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
4328 +CONFIG_MTD_PHYSMAP=y
4329 +CONFIG_MTD_PHYSMAP_START=0x8000000
4330 +CONFIG_MTD_PHYSMAP_LEN=0x0
4331 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
4332 +# CONFIG_MTD_PLATRAM is not set
4333 +
4334 +#
4335 +# Self-contained MTD device drivers
4336 +#
4337 +# CONFIG_MTD_DATAFLASH is not set
4338 +# CONFIG_MTD_M25P80 is not set
4339 +# CONFIG_MTD_SLRAM is not set
4340 +# CONFIG_MTD_PHRAM is not set
4341 +# CONFIG_MTD_MTDRAM is not set
4342 +
4343 +#
4344 +# Disk-On-Chip Device Drivers
4345 +#
4346 +# CONFIG_MTD_DOC2000 is not set
4347 +# CONFIG_MTD_DOC2001 is not set
4348 +# CONFIG_MTD_DOC2001PLUS is not set
4349 +# CONFIG_MTD_NAND is not set
4350 +# CONFIG_MTD_ONENAND is not set
4351 +
4352 +#
4353 +# UBI - Unsorted block images
4354 +#
4355 +# CONFIG_MTD_UBI is not set
4356 +# CONFIG_PARPORT is not set
4357 +CONFIG_MISC_DEVICES=y
4358 +# CONFIG_ATMEL_PWM is not set
4359 +CONFIG_ATMEL_TCLIB=y
4360 +CONFIG_ATMEL_TCB_CLKSRC=y
4361 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
4362 +# CONFIG_EEPROM_93CX6 is not set
4363 +# CONFIG_ATMEL_SSC is not set
4364 +
4365 +#
4366 +# SCSI device support
4367 +#
4368 +# CONFIG_SCSI_DMA is not set
4369 +# CONFIG_SCSI_NETLINK is not set
4370 +# CONFIG_NETDEVICES is not set
4371 +# CONFIG_ISDN is not set
4372 +# CONFIG_PHONE is not set
4373 +
4374 +#
4375 +# Input device support
4376 +#
4377 +# CONFIG_INPUT is not set
4378 +
4379 +#
4380 +# Hardware I/O ports
4381 +#
4382 +# CONFIG_SERIO is not set
4383 +# CONFIG_GAMEPORT is not set
4384 +
4385 +#
4386 +# Character devices
4387 +#
4388 +# CONFIG_VT is not set
4389 +# CONFIG_SERIAL_NONSTANDARD is not set
4390 +
4391 +#
4392 +# Serial drivers
4393 +#
4394 +# CONFIG_SERIAL_8250 is not set
4395 +
4396 +#
4397 +# Non-8250 serial port support
4398 +#
4399 +CONFIG_SERIAL_ATMEL=y
4400 +CONFIG_SERIAL_ATMEL_CONSOLE=y
4401 +# CONFIG_SERIAL_ATMEL_PDC is not set
4402 +# CONFIG_SERIAL_ATMEL_TTYAT is not set
4403 +CONFIG_SERIAL_CORE=y
4404 +CONFIG_SERIAL_CORE_CONSOLE=y
4405 +CONFIG_UNIX98_PTYS=y
4406 +# CONFIG_LEGACY_PTYS is not set
4407 +# CONFIG_IPMI_HANDLER is not set
4408 +# CONFIG_HW_RANDOM is not set
4409 +# CONFIG_RTC is not set
4410 +# CONFIG_GEN_RTC is not set
4411 +# CONFIG_R3964 is not set
4412 +# CONFIG_TCG_TPM is not set
4413 +# CONFIG_I2C is not set
4414 +
4415 +#
4416 +# SPI support
4417 +#
4418 +CONFIG_SPI=y
4419 +CONFIG_SPI_MASTER=y
4420 +
4421 +#
4422 +# SPI Master Controller Drivers
4423 +#
4424 +CONFIG_SPI_ATMEL=y
4425 +# CONFIG_SPI_BITBANG is not set
4426 +
4427 +#
4428 +# SPI Protocol Masters
4429 +#
4430 +# CONFIG_SPI_AT25 is not set
4431 +# CONFIG_SPI_SPIDEV is not set
4432 +# CONFIG_SPI_TLE62X0 is not set
4433 +# CONFIG_W1 is not set
4434 +# CONFIG_POWER_SUPPLY is not set
4435 +# CONFIG_HWMON is not set
4436 +CONFIG_WATCHDOG=y
4437 +# CONFIG_WATCHDOG_NOWAYOUT is not set
4438 +
4439 +#
4440 +# Watchdog Device Drivers
4441 +#
4442 +# CONFIG_SOFT_WATCHDOG is not set
4443 +CONFIG_AT32AP700X_WDT=y
4444 +
4445 +#
4446 +# Sonics Silicon Backplane
4447 +#
4448 +CONFIG_SSB_POSSIBLE=y
4449 +# CONFIG_SSB is not set
4450 +
4451 +#
4452 +# Multifunction device drivers
4453 +#
4454 +# CONFIG_MFD_SM501 is not set
4455 +
4456 +#
4457 +# Multimedia devices
4458 +#
4459 +# CONFIG_VIDEO_DEV is not set
4460 +# CONFIG_DVB_CORE is not set
4461 +# CONFIG_DAB is not set
4462 +
4463 +#
4464 +# Graphics support
4465 +#
4466 +# CONFIG_VGASTATE is not set
4467 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
4468 +CONFIG_FB=y
4469 +# CONFIG_FIRMWARE_EDID is not set
4470 +# CONFIG_FB_DDC is not set
4471 +CONFIG_FB_CFB_FILLRECT=y
4472 +CONFIG_FB_CFB_COPYAREA=y
4473 +CONFIG_FB_CFB_IMAGEBLIT=y
4474 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
4475 +# CONFIG_FB_SYS_FILLRECT is not set
4476 +# CONFIG_FB_SYS_COPYAREA is not set
4477 +# CONFIG_FB_SYS_IMAGEBLIT is not set
4478 +# CONFIG_FB_SYS_FOPS is not set
4479 +CONFIG_FB_DEFERRED_IO=y
4480 +# CONFIG_FB_SVGALIB is not set
4481 +# CONFIG_FB_MACMODES is not set
4482 +# CONFIG_FB_BACKLIGHT is not set
4483 +# CONFIG_FB_MODE_HELPERS is not set
4484 +# CONFIG_FB_TILEBLITTING is not set
4485 +
4486 +#
4487 +# Frame buffer hardware drivers
4488 +#
4489 +# CONFIG_FB_S1D13XXX is not set
4490 +CONFIG_FB_ATMEL=y
4491 +# CONFIG_FB_VIRTUAL is not set
4492 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
4493 +CONFIG_LCD_CLASS_DEVICE=y
4494 +CONFIG_LCD_LTV350QV=y
4495 +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
4496 +
4497 +#
4498 +# Display device support
4499 +#
4500 +# CONFIG_DISPLAY_SUPPORT is not set
4501 +# CONFIG_LOGO is not set
4502 +
4503 +#
4504 +# Sound
4505 +#
4506 +# CONFIG_SOUND is not set
4507 +CONFIG_USB_SUPPORT=y
4508 +# CONFIG_USB_ARCH_HAS_HCD is not set
4509 +# CONFIG_USB_ARCH_HAS_OHCI is not set
4510 +# CONFIG_USB_ARCH_HAS_EHCI is not set
4511 +
4512 +#
4513 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
4514 +#
4515 +
4516 +#
4517 +# USB Gadget Support
4518 +#
4519 +CONFIG_USB_GADGET=y
4520 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
4521 +CONFIG_USB_GADGET_SELECTED=y
4522 +# CONFIG_USB_GADGET_AMD5536UDC is not set
4523 +CONFIG_USB_GADGET_ATMEL_USBA=y
4524 +CONFIG_USB_ATMEL_USBA=y
4525 +# CONFIG_USB_GADGET_FSL_USB2 is not set
4526 +# CONFIG_USB_GADGET_NET2280 is not set
4527 +# CONFIG_USB_GADGET_PXA2XX is not set
4528 +# CONFIG_USB_GADGET_M66592 is not set
4529 +# CONFIG_USB_GADGET_GOKU is not set
4530 +# CONFIG_USB_GADGET_LH7A40X is not set
4531 +# CONFIG_USB_GADGET_OMAP is not set
4532 +# CONFIG_USB_GADGET_S3C2410 is not set
4533 +# CONFIG_USB_GADGET_AT91 is not set
4534 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
4535 +CONFIG_USB_GADGET_DUALSPEED=y
4536 +# CONFIG_USB_ZERO is not set
4537 +CONFIG_USB_ETH=y
4538 +# CONFIG_USB_ETH_RNDIS is not set
4539 +# CONFIG_USB_GADGETFS is not set
4540 +# CONFIG_USB_FILE_STORAGE is not set
4541 +# CONFIG_USB_G_SERIAL is not set
4542 +# CONFIG_USB_MIDI_GADGET is not set
4543 +# CONFIG_MMC is not set
4544 +# CONFIG_NEW_LEDS is not set
4545 +CONFIG_RTC_LIB=y
4546 +CONFIG_RTC_CLASS=y
4547 +CONFIG_RTC_HCTOSYS=y
4548 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
4549 +# CONFIG_RTC_DEBUG is not set
4550 +
4551 +#
4552 +# RTC interfaces
4553 +#
4554 +CONFIG_RTC_INTF_SYSFS=y
4555 +# CONFIG_RTC_INTF_PROC is not set
4556 +CONFIG_RTC_INTF_DEV=y
4557 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
4558 +# CONFIG_RTC_DRV_TEST is not set
4559 +
4560 +#
4561 +# SPI RTC drivers
4562 +#
4563 +# CONFIG_RTC_DRV_RS5C348 is not set
4564 +# CONFIG_RTC_DRV_MAX6902 is not set
4565 +
4566 +#
4567 +# Platform RTC drivers
4568 +#
4569 +# CONFIG_RTC_DRV_DS1553 is not set
4570 +# CONFIG_RTC_DRV_STK17TA8 is not set
4571 +# CONFIG_RTC_DRV_DS1742 is not set
4572 +# CONFIG_RTC_DRV_M48T86 is not set
4573 +# CONFIG_RTC_DRV_M48T59 is not set
4574 +# CONFIG_RTC_DRV_V3020 is not set
4575 +
4576 +#
4577 +# on-CPU RTC drivers
4578 +#
4579 +CONFIG_RTC_DRV_AT32AP700X=y
4580 +
4581 +#
4582 +# Userspace I/O
4583 +#
4584 +# CONFIG_UIO is not set
4585 +
4586 +#
4587 +# File systems
4588 +#
4589 +# CONFIG_INOTIFY is not set
4590 +# CONFIG_QUOTA is not set
4591 +# CONFIG_DNOTIFY is not set
4592 +# CONFIG_AUTOFS_FS is not set
4593 +# CONFIG_AUTOFS4_FS is not set
4594 +# CONFIG_FUSE_FS is not set
4595 +
4596 +#
4597 +# Pseudo filesystems
4598 +#
4599 +CONFIG_PROC_FS=y
4600 +CONFIG_PROC_KCORE=y
4601 +CONFIG_PROC_SYSCTL=y
4602 +CONFIG_SYSFS=y
4603 +CONFIG_TMPFS=y
4604 +# CONFIG_TMPFS_POSIX_ACL is not set
4605 +# CONFIG_HUGETLB_PAGE is not set
4606 +# CONFIG_CONFIGFS_FS is not set
4607 +
4608 +#
4609 +# Miscellaneous filesystems
4610 +#
4611 +CONFIG_JFFS2_FS=y
4612 +CONFIG_JFFS2_FS_DEBUG=0
4613 +# CONFIG_JFFS2_FS_WRITEBUFFER is not set
4614 +# CONFIG_JFFS2_SUMMARY is not set
4615 +# CONFIG_JFFS2_FS_XATTR is not set
4616 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
4617 +CONFIG_JFFS2_ZLIB=y
4618 +# CONFIG_JFFS2_LZO is not set
4619 +CONFIG_JFFS2_RTIME=y
4620 +# CONFIG_JFFS2_RUBIN is not set
4621 +# CONFIG_NETWORK_FILESYSTEMS is not set
4622 +# CONFIG_NLS is not set
4623 +# CONFIG_DLM is not set
4624 +# CONFIG_INSTRUMENTATION is not set
4625 +
4626 +#
4627 +# Kernel hacking
4628 +#
4629 +# CONFIG_PRINTK_TIME is not set
4630 +CONFIG_ENABLE_WARN_DEPRECATED=y
4631 +CONFIG_ENABLE_MUST_CHECK=y
4632 +CONFIG_MAGIC_SYSRQ=y
4633 +# CONFIG_UNUSED_SYMBOLS is not set
4634 +# CONFIG_DEBUG_FS is not set
4635 +# CONFIG_HEADERS_CHECK is not set
4636 +# CONFIG_DEBUG_KERNEL is not set
4637 +# CONFIG_DEBUG_BUGVERBOSE is not set
4638 +# CONFIG_SAMPLES is not set
4639 +
4640 +#
4641 +# Security options
4642 +#
4643 +# CONFIG_KEYS is not set
4644 +# CONFIG_SECURITY is not set
4645 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
4646 +# CONFIG_CRYPTO is not set
4647 +
4648 +#
4649 +# Library routines
4650 +#
4651 +CONFIG_BITREVERSE=y
4652 +# CONFIG_CRC_CCITT is not set
4653 +# CONFIG_CRC16 is not set
4654 +# CONFIG_CRC_ITU_T is not set
4655 +CONFIG_CRC32=y
4656 +# CONFIG_CRC7 is not set
4657 +# CONFIG_LIBCRC32C is not set
4658 +CONFIG_ZLIB_INFLATE=y
4659 +CONFIG_ZLIB_DEFLATE=y
4660 +CONFIG_HAS_IOMEM=y
4661 +CONFIG_HAS_IOPORT=y
4662 +CONFIG_HAS_DMA=y
4663 Index: linux-2.6.24.7/arch/avr32/drivers/dw-dmac.c
4664 ===================================================================
4665 --- /dev/null
4666 +++ linux-2.6.24.7/arch/avr32/drivers/dw-dmac.c
4667 @@ -0,0 +1,761 @@
4668 +/*
4669 + * Driver for the Synopsys DesignWare DMA Controller
4670 + *
4671 + * Copyright (C) 2005-2006 Atmel Corporation
4672 + *
4673 + * This program is free software; you can redistribute it and/or modify
4674 + * it under the terms of the GNU General Public License version 2 as
4675 + * published by the Free Software Foundation.
4676 + */
4677 +#include <linux/clk.h>
4678 +#include <linux/device.h>
4679 +#include <linux/dma-mapping.h>
4680 +#include <linux/dmapool.h>
4681 +#include <linux/init.h>
4682 +#include <linux/interrupt.h>
4683 +#include <linux/module.h>
4684 +#include <linux/platform_device.h>
4685 +
4686 +#include <asm/dma-controller.h>
4687 +#include <asm/io.h>
4688 +
4689 +#include "dw-dmac.h"
4690 +
4691 +#define DMAC_NR_CHANNELS 3
4692 +#define DMAC_MAX_BLOCKSIZE 4095
4693 +
4694 +enum {
4695 + CH_STATE_FREE = 0,
4696 + CH_STATE_ALLOCATED,
4697 + CH_STATE_BUSY,
4698 +};
4699 +
4700 +struct dw_dma_lli {
4701 + dma_addr_t sar;
4702 + dma_addr_t dar;
4703 + dma_addr_t llp;
4704 + u32 ctllo;
4705 + u32 ctlhi;
4706 + u32 sstat;
4707 + u32 dstat;
4708 +};
4709 +
4710 +struct dw_dma_block {
4711 + struct dw_dma_lli *lli_vaddr;
4712 + dma_addr_t lli_dma_addr;
4713 +};
4714 +
4715 +struct dw_dma_channel {
4716 + unsigned int state;
4717 + int is_cyclic;
4718 + struct dma_request_sg *req_sg;
4719 + struct dma_request_cyclic *req_cyclic;
4720 + unsigned int nr_blocks;
4721 + int direction;
4722 + struct dw_dma_block *block;
4723 +};
4724 +
4725 +struct dw_dma_controller {
4726 + spinlock_t lock;
4727 + void * __iomem regs;
4728 + struct dma_pool *lli_pool;
4729 + struct clk *hclk;
4730 + struct dma_controller dma;
4731 + struct dw_dma_channel channel[DMAC_NR_CHANNELS];
4732 +};
4733 +#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
4734 +
4735 +#define dmac_writel_hi(dmac, reg, value) \
4736 + __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
4737 +#define dmac_readl_hi(dmac, reg) \
4738 + __raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
4739 +#define dmac_writel_lo(dmac, reg, value) \
4740 + __raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
4741 +#define dmac_readl_lo(dmac, reg) \
4742 + __raw_readl((dmac)->regs + DW_DMAC_##reg)
4743 +#define dmac_chan_writel_hi(dmac, chan, reg, value) \
4744 + __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
4745 + + DW_DMAC_CHAN_##reg + 4))
4746 +#define dmac_chan_readl_hi(dmac, chan, reg) \
4747 + __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
4748 +#define dmac_chan_writel_lo(dmac, chan, reg, value) \
4749 + __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
4750 +#define dmac_chan_readl_lo(dmac, chan, reg) \
4751 + __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
4752 +#define set_channel_bit(dmac, reg, chan) \
4753 + dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
4754 +#define clear_channel_bit(dmac, reg, chan) \
4755 + dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
4756 +
4757 +static int dmac_alloc_channel(struct dma_controller *_dmac)
4758 +{
4759 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
4760 + struct dw_dma_channel *chan;
4761 + unsigned long flags;
4762 + int i;
4763 +
4764 + spin_lock_irqsave(&dmac->lock, flags);
4765 + for (i = 0; i < DMAC_NR_CHANNELS; i++)
4766 + if (dmac->channel[i].state == CH_STATE_FREE)
4767 + break;
4768 +
4769 + if (i < DMAC_NR_CHANNELS) {
4770 + chan = &dmac->channel[i];
4771 + chan->state = CH_STATE_ALLOCATED;
4772 + } else {
4773 + i = -EBUSY;
4774 + }
4775 +
4776 + spin_unlock_irqrestore(&dmac->lock, flags);
4777 +
4778 + return i;
4779 +}
4780 +
4781 +static void dmac_release_channel(struct dma_controller *_dmac, int channel)
4782 +{
4783 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
4784 +
4785 + BUG_ON(channel >= DMAC_NR_CHANNELS
4786 + || dmac->channel[channel].state != CH_STATE_ALLOCATED);
4787 +
4788 + dmac->channel[channel].state = CH_STATE_FREE;
4789 +}
4790 +
4791 +static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
4792 + unsigned int nr_blocks)
4793 +{
4794 + struct dw_dma_block *block;
4795 + void *p;
4796 + unsigned int i;
4797 +
4798 + block = kmalloc(nr_blocks * sizeof(*block),
4799 + GFP_KERNEL);
4800 + if (unlikely(!block))
4801 + return NULL;
4802 +
4803 + for (i = 0; i < nr_blocks; i++) {
4804 + p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
4805 + &block[i].lli_dma_addr);
4806 + block[i].lli_vaddr = p;
4807 + if (unlikely(!p))
4808 + goto fail;
4809 + }
4810 +
4811 + return block;
4812 +
4813 +fail:
4814 + for (i = 0; i < nr_blocks; i++) {
4815 + if (!block[i].lli_vaddr)
4816 + break;
4817 + dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
4818 + block[i].lli_dma_addr);
4819 + }
4820 + kfree(block);
4821 + return NULL;
4822 +}
4823 +
4824 +static void cleanup_channel(struct dw_dma_controller *dmac,
4825 + struct dw_dma_channel *chan)
4826 +{
4827 + unsigned int i;
4828 +
4829 + if (chan->nr_blocks > 1) {
4830 + for (i = 0; i < chan->nr_blocks; i++)
4831 + dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
4832 + chan->block[i].lli_dma_addr);
4833 + kfree(chan->block);
4834 + }
4835 +
4836 + chan->state = CH_STATE_ALLOCATED;
4837 +}
4838 +
4839 +static int dmac_prepare_request_sg(struct dma_controller *_dmac,
4840 + struct dma_request_sg *req)
4841 +{
4842 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
4843 + struct dw_dma_channel *chan;
4844 + unsigned long ctlhi, ctllo, cfghi, cfglo;
4845 + unsigned long block_size;
4846 + unsigned int nr_blocks;
4847 + int ret, i, direction;
4848 + unsigned long flags;
4849 +
4850 + spin_lock_irqsave(&dmac->lock, flags);
4851 +
4852 + ret = -EINVAL;
4853 + if (req->req.channel >= DMAC_NR_CHANNELS
4854 + || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
4855 + || req->block_size > DMAC_MAX_BLOCKSIZE) {
4856 + spin_unlock_irqrestore(&dmac->lock, flags);
4857 + return -EINVAL;
4858 + }
4859 +
4860 + chan = &dmac->channel[req->req.channel];
4861 + chan->state = CH_STATE_BUSY;
4862 + chan->req_sg = req;
4863 + chan->is_cyclic = 0;
4864 +
4865 + /*
4866 + * We have marked the channel as busy, so no need to keep the
4867 + * lock as long as we only touch the channel-specific
4868 + * registers
4869 + */
4870 + spin_unlock_irqrestore(&dmac->lock, flags);
4871 +
4872 + /*
4873 + * There may be limitations in the driver and/or the DMA
4874 + * controller that prevents us from sending a whole
4875 + * scatterlist item in one go. Taking this into account,
4876 + * calculate the number of block transfers we need to set up.
4877 + *
4878 + * FIXME: Let the peripheral driver know about the maximum
4879 + * block size we support. We really don't want to use a
4880 + * different block size than what was suggested by the
4881 + * peripheral.
4882 + *
4883 + * Each block will get its own Linked List Item (LLI) below.
4884 + */
4885 + block_size = req->block_size;
4886 + nr_blocks = req->nr_blocks;
4887 + pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
4888 + block_size, nr_blocks, req->nr_sg);
4889 +
4890 + BUG_ON(nr_blocks == 0);
4891 + chan->nr_blocks = nr_blocks;
4892 +
4893 + ret = -EINVAL;
4894 + cfglo = cfghi = 0;
4895 + switch (req->direction) {
4896 + case DMA_DIR_MEM_TO_PERIPH:
4897 + direction = DMA_TO_DEVICE;
4898 + cfghi = req->periph_id << (43 - 32);
4899 + break;
4900 +
4901 + case DMA_DIR_PERIPH_TO_MEM:
4902 + direction = DMA_FROM_DEVICE;
4903 + cfghi = req->periph_id << (39 - 32);
4904 + break;
4905 + default:
4906 + goto out_unclaim_channel;
4907 + }
4908 +
4909 + chan->direction = direction;
4910 +
4911 + dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
4912 + dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
4913 +
4914 + ctlhi = block_size >> req->width;
4915 + ctllo = ((req->direction << 20)
4916 + // | (1 << 14) | (1 << 11) // source/dest burst trans len
4917 + | (req->width << 4) | (req->width << 1)
4918 + | (1 << 0)); // interrupt enable
4919 +
4920 + if (nr_blocks == 1) {
4921 + /* Only one block: No need to use block chaining */
4922 + if (direction == DMA_TO_DEVICE) {
4923 + dmac_chan_writel_lo(dmac, req->req.channel, SAR,
4924 + req->sg->dma_address);
4925 + dmac_chan_writel_lo(dmac, req->req.channel, DAR,
4926 + req->data_reg);
4927 + ctllo |= 2 << 7; // no dst increment
4928 + } else {
4929 + dmac_chan_writel_lo(dmac, req->req.channel, SAR,
4930 + req->data_reg);
4931 + dmac_chan_writel_lo(dmac, req->req.channel, DAR,
4932 + req->sg->dma_address);
4933 + ctllo |= 2 << 9; // no src increment
4934 + }
4935 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
4936 + dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
4937 + pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
4938 + } else {
4939 + struct dw_dma_lli *lli, *lli_prev = NULL;
4940 + int j = 0, offset = 0;
4941 +
4942 + ret = -ENOMEM;
4943 + chan->block = allocate_blocks(dmac, nr_blocks);
4944 + if (!chan->block)
4945 + goto out_unclaim_channel;
4946 +
4947 + if (direction == DMA_TO_DEVICE)
4948 + ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
4949 + else
4950 + ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
4951 +
4952 + /*
4953 + * Map scatterlist items to blocks. One scatterlist
4954 + * item may need more than one block for the reasons
4955 + * mentioned above.
4956 + */
4957 + for (i = 0; i < nr_blocks; i++) {
4958 + lli = chan->block[i].lli_vaddr;
4959 + if (lli_prev) {
4960 + lli_prev->llp = chan->block[i].lli_dma_addr;
4961 + pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
4962 + i - 1, chan->block[i - 1].lli_vaddr,
4963 + chan->block[i - 1].lli_dma_addr,
4964 + lli_prev->sar, lli_prev->dar, lli_prev->llp,
4965 + lli_prev->ctllo, lli_prev->ctlhi);
4966 + }
4967 + lli->llp = 0;
4968 + lli->ctllo = ctllo;
4969 + lli->ctlhi = ctlhi;
4970 + if (direction == DMA_TO_DEVICE) {
4971 + lli->sar = req->sg[j].dma_address + offset;
4972 + lli->dar = req->data_reg;
4973 + } else {
4974 + lli->sar = req->data_reg;
4975 + lli->dar = req->sg[j].dma_address + offset;
4976 + }
4977 + lli_prev = lli;
4978 +
4979 + offset += block_size;
4980 + if (offset > req->sg[j].length) {
4981 + j++;
4982 + offset = 0;
4983 + }
4984 + }
4985 +
4986 + pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
4987 + i - 1, chan->block[i - 1].lli_vaddr,
4988 + chan->block[i - 1].lli_dma_addr, lli_prev->sar,
4989 + lli_prev->dar, lli_prev->llp,
4990 + lli_prev->ctllo, lli_prev->ctlhi);
4991 +
4992 + /*
4993 + * SAR, DAR and CTL are initialized from the LLI. We
4994 + * only have to enable the LLI bits in CTL.
4995 + */
4996 + dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
4997 + dmac_chan_writel_lo(dmac, req->req.channel, LLP,
4998 + chan->block[0].lli_dma_addr);
4999 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
5000 + }
5001 +
5002 + set_channel_bit(dmac, MASK_XFER, req->req.channel);
5003 + set_channel_bit(dmac, MASK_ERROR, req->req.channel);
5004 + if (req->req.block_complete)
5005 + set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5006 + else
5007 + clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5008 +
5009 + return 0;
5010 +
5011 +out_unclaim_channel:
5012 + chan->state = CH_STATE_ALLOCATED;
5013 + return ret;
5014 +}
5015 +
5016 +static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
5017 + struct dma_request_cyclic *req)
5018 +{
5019 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5020 + struct dw_dma_channel *chan;
5021 + unsigned long ctlhi, ctllo, cfghi, cfglo;
5022 + unsigned long block_size;
5023 + int ret, i, direction;
5024 + unsigned long flags;
5025 +
5026 + spin_lock_irqsave(&dmac->lock, flags);
5027 +
5028 + block_size = (req->buffer_size/req->periods) >> req->width;
5029 +
5030 + ret = -EINVAL;
5031 + if (req->req.channel >= DMAC_NR_CHANNELS
5032 + || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
5033 + || (req->periods == 0)
5034 + || block_size > DMAC_MAX_BLOCKSIZE) {
5035 + spin_unlock_irqrestore(&dmac->lock, flags);
5036 + return -EINVAL;
5037 + }
5038 +
5039 + chan = &dmac->channel[req->req.channel];
5040 + chan->state = CH_STATE_BUSY;
5041 + chan->is_cyclic = 1;
5042 + chan->req_cyclic = req;
5043 +
5044 + /*
5045 + * We have marked the channel as busy, so no need to keep the
5046 + * lock as long as we only touch the channel-specific
5047 + * registers
5048 + */
5049 + spin_unlock_irqrestore(&dmac->lock, flags);
5050 +
5051 + /*
5052 + Setup
5053 + */
5054 + BUG_ON(req->buffer_size % req->periods);
5055 + /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
5056 +
5057 + chan->nr_blocks = req->periods;
5058 +
5059 + ret = -EINVAL;
5060 + cfglo = cfghi = 0;
5061 + switch (req->direction) {
5062 + case DMA_DIR_MEM_TO_PERIPH:
5063 + direction = DMA_TO_DEVICE;
5064 + cfghi = req->periph_id << (43 - 32);
5065 + break;
5066 +
5067 + case DMA_DIR_PERIPH_TO_MEM:
5068 + direction = DMA_FROM_DEVICE;
5069 + cfghi = req->periph_id << (39 - 32);
5070 + break;
5071 + default:
5072 + goto out_unclaim_channel;
5073 + }
5074 +
5075 + chan->direction = direction;
5076 +
5077 + dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
5078 + dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
5079 +
5080 + ctlhi = block_size;
5081 + ctllo = ((req->direction << 20)
5082 + | (req->width << 4) | (req->width << 1)
5083 + | (1 << 0)); // interrupt enable
5084 +
5085 + {
5086 + struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
5087 +
5088 + ret = -ENOMEM;
5089 + chan->block = allocate_blocks(dmac, req->periods);
5090 + if (!chan->block)
5091 + goto out_unclaim_channel;
5092 +
5093 + if (direction == DMA_TO_DEVICE)
5094 + ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
5095 + else
5096 + ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
5097 +
5098 + /*
5099 + * Set up a linked list items where each period gets
5100 + * an item. The linked list item for the last period
5101 + * points back to the star of the buffer making a
5102 + * cyclic buffer.
5103 + */
5104 + for (i = 0; i < req->periods; i++) {
5105 + lli = chan->block[i].lli_vaddr;
5106 + if (lli_prev) {
5107 + lli_prev->llp = chan->block[i].lli_dma_addr;
5108 + /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5109 + i - 1, chan->block[i - 1].lli_vaddr,
5110 + chan->block[i - 1].lli_dma_addr,
5111 + lli_prev->sar, lli_prev->dar, lli_prev->llp,
5112 + lli_prev->ctllo, lli_prev->ctlhi);*/
5113 + }
5114 + lli->llp = 0;
5115 + lli->ctllo = ctllo;
5116 + lli->ctlhi = ctlhi;
5117 + if (direction == DMA_TO_DEVICE) {
5118 + lli->sar = req->buffer_start + i*(block_size << req->width);
5119 + lli->dar = req->data_reg;
5120 + } else {
5121 + lli->sar = req->data_reg;
5122 + lli->dar = req->buffer_start + i*(block_size << req->width);
5123 + }
5124 + lli_prev = lli;
5125 + }
5126 + lli->llp = chan->block[0].lli_dma_addr;
5127 +
5128 + /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5129 + i - 1, chan->block[i - 1].lli_vaddr,
5130 + chan->block[i - 1].lli_dma_addr, lli_prev->sar,
5131 + lli_prev->dar, lli_prev->llp,
5132 + lli_prev->ctllo, lli_prev->ctlhi); */
5133 +
5134 + /*
5135 + * SAR, DAR and CTL are initialized from the LLI. We
5136 + * only have to enable the LLI bits in CTL.
5137 + */
5138 + dmac_chan_writel_lo(dmac, req->req.channel, LLP,
5139 + chan->block[0].lli_dma_addr);
5140 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
5141 + }
5142 +
5143 + clear_channel_bit(dmac, MASK_XFER, req->req.channel);
5144 + set_channel_bit(dmac, MASK_ERROR, req->req.channel);
5145 + if (req->req.block_complete)
5146 + set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5147 + else
5148 + clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5149 +
5150 + return 0;
5151 +
5152 +out_unclaim_channel:
5153 + chan->state = CH_STATE_ALLOCATED;
5154 + return ret;
5155 +}
5156 +
5157 +static int dmac_start_request(struct dma_controller *_dmac,
5158 + unsigned int channel)
5159 +{
5160 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5161 +
5162 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5163 +
5164 + set_channel_bit(dmac, CH_EN, channel);
5165 +
5166 + return 0;
5167 +}
5168 +
5169 +static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
5170 + unsigned int channel)
5171 +{
5172 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5173 + struct dw_dma_channel *chan;
5174 + dma_addr_t current_pos;
5175 +
5176 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5177 +
5178 + chan = &dmac->channel[channel];
5179 +
5180 + switch (chan->direction) {
5181 + case DMA_TO_DEVICE:
5182 + current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
5183 + break;
5184 + case DMA_FROM_DEVICE:
5185 + current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
5186 + break;
5187 + default:
5188 + return 0;
5189 + }
5190 +
5191 +
5192 + if (!current_pos) {
5193 + if (chan->is_cyclic) {
5194 + current_pos = chan->req_cyclic->buffer_start;
5195 + } else {
5196 + current_pos = chan->req_sg->sg->dma_address;
5197 + }
5198 + }
5199 +
5200 + return current_pos;
5201 +}
5202 +
5203 +
5204 +static int dmac_stop_request(struct dma_controller *_dmac,
5205 + unsigned int channel)
5206 +{
5207 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5208 + struct dw_dma_channel *chan;
5209 +
5210 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5211 +
5212 + chan = &dmac->channel[channel];
5213 + pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
5214 + chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
5215 + dmac_chan_readl_lo(dmac, channel, DAR),
5216 + dmac_chan_readl_lo(dmac, channel, LLP),
5217 + dmac_chan_readl_hi(dmac, channel, CTL),
5218 + dmac_chan_readl_lo(dmac, channel, CTL));
5219 +
5220 + if (chan->state == CH_STATE_BUSY) {
5221 + clear_channel_bit(dmac, CH_EN, channel);
5222 + cleanup_channel(dmac, &dmac->channel[channel]);
5223 + }
5224 +
5225 + return 0;
5226 +}
5227 +
5228 +
5229 +static void dmac_block_complete(struct dw_dma_controller *dmac)
5230 +{
5231 + struct dw_dma_channel *chan;
5232 + unsigned long status, chanid;
5233 +
5234 + status = dmac_readl_lo(dmac, STATUS_BLOCK);
5235 +
5236 + while (status) {
5237 + struct dma_request *req;
5238 + chanid = __ffs(status);
5239 + chan = &dmac->channel[chanid];
5240 +
5241 + if (chan->is_cyclic) {
5242 + BUG_ON(!chan->req_cyclic
5243 + || !chan->req_cyclic->req.block_complete);
5244 + req = &chan->req_cyclic->req;
5245 + } else {
5246 + BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
5247 + req = &chan->req_sg->req;
5248 + }
5249 + dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
5250 + req->block_complete(req);
5251 + status = dmac_readl_lo(dmac, STATUS_BLOCK);
5252 + }
5253 +}
5254 +
5255 +static void dmac_xfer_complete(struct dw_dma_controller *dmac)
5256 +{
5257 + struct dw_dma_channel *chan;
5258 + struct dma_request *req;
5259 + unsigned long status, chanid;
5260 +
5261 + status = dmac_readl_lo(dmac, STATUS_XFER);
5262 +
5263 + while (status) {
5264 + chanid = __ffs(status);
5265 + chan = &dmac->channel[chanid];
5266 +
5267 + dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
5268 +
5269 + req = &chan->req_sg->req;
5270 + BUG_ON(!req);
5271 + cleanup_channel(dmac, chan);
5272 + if (req->xfer_complete)
5273 + req->xfer_complete(req);
5274 +
5275 + status = dmac_readl_lo(dmac, STATUS_XFER);
5276 + }
5277 +}
5278 +
5279 +static void dmac_error(struct dw_dma_controller *dmac)
5280 +{
5281 + struct dw_dma_channel *chan;
5282 + unsigned long status, chanid;
5283 +
5284 + status = dmac_readl_lo(dmac, STATUS_ERROR);
5285 +
5286 + while (status) {
5287 + struct dma_request *req;
5288 +
5289 + chanid = __ffs(status);
5290 + chan = &dmac->channel[chanid];
5291 +
5292 + dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
5293 + clear_channel_bit(dmac, CH_EN, chanid);
5294 +
5295 + if (chan->is_cyclic) {
5296 + BUG_ON(!chan->req_cyclic);
5297 + req = &chan->req_cyclic->req;
5298 + } else {
5299 + BUG_ON(!chan->req_sg);
5300 + req = &chan->req_sg->req;
5301 + }
5302 +
5303 + cleanup_channel(dmac, chan);
5304 + if (req->error)
5305 + req->error(req);
5306 +
5307 + status = dmac_readl_lo(dmac, STATUS_XFER);
5308 + }
5309 +}
5310 +
5311 +static irqreturn_t dmac_interrupt(int irq, void *dev_id)
5312 +{
5313 + struct dw_dma_controller *dmac = dev_id;
5314 + unsigned long status;
5315 + int ret = IRQ_NONE;
5316 +
5317 + spin_lock(&dmac->lock);
5318 +
5319 + status = dmac_readl_lo(dmac, STATUS_INT);
5320 +
5321 + while (status) {
5322 + ret = IRQ_HANDLED;
5323 + if (status & 0x10)
5324 + dmac_error(dmac);
5325 + if (status & 0x02)
5326 + dmac_block_complete(dmac);
5327 + if (status & 0x01)
5328 + dmac_xfer_complete(dmac);
5329 +
5330 + status = dmac_readl_lo(dmac, STATUS_INT);
5331 + }
5332 +
5333 + spin_unlock(&dmac->lock);
5334 + return ret;
5335 +}
5336 +
5337 +static int __devinit dmac_probe(struct platform_device *pdev)
5338 +{
5339 + struct dw_dma_controller *dmac;
5340 + struct resource *regs;
5341 + int ret;
5342 +
5343 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
5344 + if (!regs)
5345 + return -ENXIO;
5346 +
5347 + dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
5348 + if (!dmac)
5349 + return -ENOMEM;
5350 + memset(dmac, 0, sizeof(*dmac));
5351 +
5352 + dmac->hclk = clk_get(&pdev->dev, "hclk");
5353 + if (IS_ERR(dmac->hclk)) {
5354 + ret = PTR_ERR(dmac->hclk);
5355 + goto out_free_dmac;
5356 + }
5357 + clk_enable(dmac->hclk);
5358 +
5359 + ret = -ENOMEM;
5360 + dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
5361 + sizeof(struct dw_dma_lli), 4, 0);
5362 + if (!dmac->lli_pool)
5363 + goto out_disable_clk;
5364 +
5365 + spin_lock_init(&dmac->lock);
5366 + dmac->dma.dev = &pdev->dev;
5367 + dmac->dma.alloc_channel = dmac_alloc_channel;
5368 + dmac->dma.release_channel = dmac_release_channel;
5369 + dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
5370 + dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
5371 + dmac->dma.start_request = dmac_start_request;
5372 + dmac->dma.stop_request = dmac_stop_request;
5373 + dmac->dma.get_current_pos = dmac_get_current_pos;
5374 +
5375 + dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
5376 + if (!dmac->regs)
5377 + goto out_free_pool;
5378 +
5379 + ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
5380 + IRQF_SAMPLE_RANDOM, pdev->name, dmac);
5381 + if (ret)
5382 + goto out_unmap_regs;
5383 +
5384 + /* Enable the DMA controller */
5385 + dmac_writel_lo(dmac, CFG, 1);
5386 +
5387 + register_dma_controller(&dmac->dma);
5388 +
5389 + printk(KERN_INFO
5390 + "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
5391 + dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
5392 +
5393 + return 0;
5394 +
5395 +out_unmap_regs:
5396 + iounmap(dmac->regs);
5397 +out_free_pool:
5398 + dma_pool_destroy(dmac->lli_pool);
5399 +out_disable_clk:
5400 + clk_disable(dmac->hclk);
5401 + clk_put(dmac->hclk);
5402 +out_free_dmac:
5403 + kfree(dmac);
5404 + return ret;
5405 +}
5406 +
5407 +static struct platform_driver dmac_driver = {
5408 + .probe = dmac_probe,
5409 + .driver = {
5410 + .name = "dmaca",
5411 + },
5412 +};
5413 +
5414 +static int __init dmac_init(void)
5415 +{
5416 + return platform_driver_register(&dmac_driver);
5417 +}
5418 +subsys_initcall(dmac_init);
5419 +
5420 +static void __exit dmac_exit(void)
5421 +{
5422 + platform_driver_unregister(&dmac_driver);
5423 +}
5424 +module_exit(dmac_exit);
5425 +
5426 +MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
5427 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
5428 +MODULE_LICENSE("GPL");
5429 Index: linux-2.6.24.7/arch/avr32/drivers/dw-dmac.h
5430 ===================================================================
5431 --- /dev/null
5432 +++ linux-2.6.24.7/arch/avr32/drivers/dw-dmac.h
5433 @@ -0,0 +1,42 @@
5434 +/*
5435 + * Driver for the Synopsys DesignWare DMA Controller
5436 + *
5437 + * Copyright (C) 2005-2006 Atmel Corporation
5438 + *
5439 + * This program is free software; you can redistribute it and/or modify
5440 + * it under the terms of the GNU General Public License version 2 as
5441 + * published by the Free Software Foundation.
5442 + */
5443 +#ifndef __AVR32_DW_DMAC_H__
5444 +#define __AVR32_DW_DMAC_H__
5445 +
5446 +#define DW_DMAC_CFG 0x398
5447 +#define DW_DMAC_CH_EN 0x3a0
5448 +
5449 +#define DW_DMAC_STATUS_XFER 0x2e8
5450 +#define DW_DMAC_STATUS_BLOCK 0x2f0
5451 +#define DW_DMAC_STATUS_ERROR 0x308
5452 +
5453 +#define DW_DMAC_MASK_XFER 0x310
5454 +#define DW_DMAC_MASK_BLOCK 0x318
5455 +#define DW_DMAC_MASK_ERROR 0x330
5456 +
5457 +#define DW_DMAC_CLEAR_XFER 0x338
5458 +#define DW_DMAC_CLEAR_BLOCK 0x340
5459 +#define DW_DMAC_CLEAR_ERROR 0x358
5460 +
5461 +#define DW_DMAC_STATUS_INT 0x360
5462 +
5463 +#define DW_DMAC_CHAN_SAR 0x000
5464 +#define DW_DMAC_CHAN_DAR 0x008
5465 +#define DW_DMAC_CHAN_LLP 0x010
5466 +#define DW_DMAC_CHAN_CTL 0x018
5467 +#define DW_DMAC_CHAN_SSTAT 0x020
5468 +#define DW_DMAC_CHAN_DSTAT 0x028
5469 +#define DW_DMAC_CHAN_SSTATAR 0x030
5470 +#define DW_DMAC_CHAN_DSTATAR 0x038
5471 +#define DW_DMAC_CHAN_CFG 0x040
5472 +#define DW_DMAC_CHAN_SGR 0x048
5473 +#define DW_DMAC_CHAN_DSR 0x050
5474 +
5475 +#endif /* __AVR32_DW_DMAC_H__ */
5476 Index: linux-2.6.24.7/arch/avr32/drivers/Makefile
5477 ===================================================================
5478 --- /dev/null
5479 +++ linux-2.6.24.7/arch/avr32/drivers/Makefile
5480 @@ -0,0 +1 @@
5481 +obj-$(CONFIG_DW_DMAC) += dw-dmac.o
5482 Index: linux-2.6.24.7/arch/avr32/Kconfig
5483 ===================================================================
5484 --- linux-2.6.24.7.orig/arch/avr32/Kconfig
5485 +++ linux-2.6.24.7/arch/avr32/Kconfig
5486 @@ -45,6 +45,9 @@ config RWSEM_GENERIC_SPINLOCK
5487 config GENERIC_TIME
5488 def_bool y
5489
5490 +config GENERIC_CLOCKEVENTS
5491 + def_bool y
5492 +
5493 config RWSEM_XCHGADD_ALGORITHM
5494 def_bool n
5495
5496 @@ -54,6 +57,9 @@ config ARCH_HAS_ILOG2_U32
5497 config ARCH_HAS_ILOG2_U64
5498 def_bool n
5499
5500 +config ARCH_SUPPORTS_OPROFILE
5501 + def_bool y
5502 +
5503 config GENERIC_HWEIGHT
5504 def_bool y
5505
5506 @@ -68,6 +74,8 @@ source "init/Kconfig"
5507
5508 menu "System Type and features"
5509
5510 +source "kernel/time/Kconfig"
5511 +
5512 config SUBARCH_AVR32B
5513 bool
5514 config MMU
5515 @@ -81,19 +89,23 @@ config PLATFORM_AT32AP
5516 select MMU
5517 select PERFORMANCE_COUNTERS
5518
5519 -choice
5520 - prompt "AVR32 CPU type"
5521 - default CPU_AT32AP7000
5522 +#
5523 +# CPU types
5524 +#
5525
5526 -config CPU_AT32AP7000
5527 - bool "AT32AP7000"
5528 +# AP7000 derivatives
5529 +config CPU_AT32AP700X
5530 + bool
5531 select PLATFORM_AT32AP
5532 -endchoice
5533 -
5534 -#
5535 -# CPU Daughterboards for ATSTK1000
5536 -config BOARD_ATSTK1002
5537 +config CPU_AT32AP7000
5538 + bool
5539 + select CPU_AT32AP700X
5540 +config CPU_AT32AP7001
5541 + bool
5542 + select CPU_AT32AP700X
5543 +config CPU_AT32AP7002
5544 bool
5545 + select CPU_AT32AP700X
5546
5547 choice
5548 prompt "AVR32 board type"
5549 @@ -101,15 +113,18 @@ choice
5550
5551 config BOARD_ATSTK1000
5552 bool "ATSTK1000 evaluation board"
5553 - select BOARD_ATSTK1002 if CPU_AT32AP7000
5554
5555 config BOARD_ATNGW100
5556 bool "ATNGW100 Network Gateway"
5557 + select CPU_AT32AP7000
5558 endchoice
5559
5560 if BOARD_ATSTK1000
5561 source "arch/avr32/boards/atstk1000/Kconfig"
5562 endif
5563 +if BOARD_ATNGW100
5564 +source "arch/avr32/boards/atngw100/Kconfig"
5565 +endif
5566
5567 choice
5568 prompt "Boot loader type"
5569 @@ -123,15 +138,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
5570
5571 config LOAD_ADDRESS
5572 hex
5573 - default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
5574 + default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
5575
5576 config ENTRY_ADDRESS
5577 hex
5578 - default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
5579 + default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
5580
5581 config PHYS_OFFSET
5582 hex
5583 - default 0x10000000 if CPU_AT32AP7000=y
5584 + default 0x10000000 if CPU_AT32AP700X=y
5585
5586 source "kernel/Kconfig.preempt"
5587
5588 @@ -163,6 +178,20 @@ config OWNERSHIP_TRACE
5589 enabling Nexus-compliant debuggers to keep track of the PID of the
5590 currently executing task.
5591
5592 +config NMI_DEBUGGING
5593 + bool "NMI Debugging"
5594 + default n
5595 + help
5596 + Say Y here and pass the nmi_debug command-line parameter to
5597 + the kernel to turn on NMI debugging. Depending on the value
5598 + of the nmi_debug option, various pieces of information will
5599 + be dumped to the console when a Non-Maskable Interrupt
5600 + happens.
5601 +
5602 +config DW_DMAC
5603 + tristate "Synopsys DesignWare DMA Controller support"
5604 + default y if CPU_AT32AP7000
5605 +
5606 # FPU emulation goes here
5607
5608 source "kernel/Kconfig.hz"
5609 @@ -219,6 +248,8 @@ source "drivers/Kconfig"
5610
5611 source "fs/Kconfig"
5612
5613 +source "kernel/Kconfig.instrumentation"
5614 +
5615 source "arch/avr32/Kconfig.debug"
5616
5617 source "security/Kconfig"
5618 Index: linux-2.6.24.7/arch/avr32/Kconfig.debug
5619 ===================================================================
5620 --- linux-2.6.24.7.orig/arch/avr32/Kconfig.debug
5621 +++ linux-2.6.24.7/arch/avr32/Kconfig.debug
5622 @@ -6,14 +6,4 @@ config TRACE_IRQFLAGS_SUPPORT
5623
5624 source "lib/Kconfig.debug"
5625
5626 -config KPROBES
5627 - bool "Kprobes"
5628 - depends on DEBUG_KERNEL
5629 - help
5630 - Kprobes allows you to trap at almost any kernel address and
5631 - execute a callback function. register_kprobe() establishes
5632 - a probepoint and specifies the callback. Kprobes is useful
5633 - for kernel debugging, non-intrusive instrumentation and testing.
5634 - If in doubt, say "N".
5635 -
5636 endmenu
5637 Index: linux-2.6.24.7/arch/avr32/kernel/cpu.c
5638 ===================================================================
5639 --- linux-2.6.24.7.orig/arch/avr32/kernel/cpu.c
5640 +++ linux-2.6.24.7/arch/avr32/kernel/cpu.c
5641 @@ -13,6 +13,7 @@
5642 #include <linux/percpu.h>
5643 #include <linux/param.h>
5644 #include <linux/errno.h>
5645 +#include <linux/clk.h>
5646
5647 #include <asm/setup.h>
5648 #include <asm/sysreg.h>
5649 @@ -187,9 +188,20 @@ static int __init topology_init(void)
5650
5651 subsys_initcall(topology_init);
5652
5653 +struct chip_id_map {
5654 + u16 mid;
5655 + u16 pn;
5656 + const char *name;
5657 +};
5658 +
5659 +static const struct chip_id_map chip_names[] = {
5660 + { .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" },
5661 +};
5662 +#define NR_CHIP_NAMES ARRAY_SIZE(chip_names)
5663 +
5664 static const char *cpu_names[] = {
5665 "Morgan",
5666 - "AP7000",
5667 + "AP7",
5668 };
5669 #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
5670
5671 @@ -206,12 +218,32 @@ static const char *mmu_types[] = {
5672 "MPU"
5673 };
5674
5675 +static const char *cpu_feature_flags[] = {
5676 + "rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu",
5677 +};
5678 +
5679 +static const char *get_chip_name(struct avr32_cpuinfo *cpu)
5680 +{
5681 + unsigned int i;
5682 + unsigned int mid = avr32_get_manufacturer_id(cpu);
5683 + unsigned int pn = avr32_get_product_number(cpu);
5684 +
5685 + for (i = 0; i < NR_CHIP_NAMES; i++) {
5686 + if (chip_names[i].mid == mid && chip_names[i].pn == pn)
5687 + return chip_names[i].name;
5688 + }
5689 +
5690 + return "(unknown)";
5691 +}
5692 +
5693 void __init setup_processor(void)
5694 {
5695 unsigned long config0, config1;
5696 unsigned long features;
5697 unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
5698 + unsigned device_id;
5699 unsigned tmp;
5700 + unsigned i;
5701
5702 config0 = sysreg_read(CONFIG0);
5703 config1 = sysreg_read(CONFIG1);
5704 @@ -221,11 +253,14 @@ void __init setup_processor(void)
5705 arch_rev = SYSREG_BFEXT(AR, config0);
5706 mmu_type = SYSREG_BFEXT(MMUT, config0);
5707
5708 + device_id = ocd_read(DID);
5709 +
5710 boot_cpu_data.arch_type = arch_id;
5711 boot_cpu_data.cpu_type = cpu_id;
5712 boot_cpu_data.arch_revision = arch_rev;
5713 boot_cpu_data.cpu_revision = cpu_rev;
5714 boot_cpu_data.tlb_config = mmu_type;
5715 + boot_cpu_data.device_id = device_id;
5716
5717 tmp = SYSREG_BFEXT(ILSZ, config1);
5718 if (tmp) {
5719 @@ -247,41 +282,34 @@ void __init setup_processor(void)
5720 return;
5721 }
5722
5723 - printk ("CPU: %s [%02x] revision %d (%s revision %d)\n",
5724 + printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data),
5725 + avr32_get_chip_revision(&boot_cpu_data) + 'A');
5726 + printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n",
5727 cpu_names[cpu_id], cpu_id, cpu_rev,
5728 arch_names[arch_id], arch_rev);
5729 printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
5730
5731 printk ("CPU: features:");
5732 features = 0;
5733 - if (config0 & SYSREG_BIT(CONFIG0_R)) {
5734 + if (config0 & SYSREG_BIT(CONFIG0_R))
5735 features |= AVR32_FEATURE_RMW;
5736 - printk(" rmw");
5737 - }
5738 - if (config0 & SYSREG_BIT(CONFIG0_D)) {
5739 + if (config0 & SYSREG_BIT(CONFIG0_D))
5740 features |= AVR32_FEATURE_DSP;
5741 - printk(" dsp");
5742 - }
5743 - if (config0 & SYSREG_BIT(CONFIG0_S)) {
5744 + if (config0 & SYSREG_BIT(CONFIG0_S))
5745 features |= AVR32_FEATURE_SIMD;
5746 - printk(" simd");
5747 - }
5748 - if (config0 & SYSREG_BIT(CONFIG0_O)) {
5749 + if (config0 & SYSREG_BIT(CONFIG0_O))
5750 features |= AVR32_FEATURE_OCD;
5751 - printk(" ocd");
5752 - }
5753 - if (config0 & SYSREG_BIT(CONFIG0_P)) {
5754 + if (config0 & SYSREG_BIT(CONFIG0_P))
5755 features |= AVR32_FEATURE_PCTR;
5756 - printk(" perfctr");
5757 - }
5758 - if (config0 & SYSREG_BIT(CONFIG0_J)) {
5759 + if (config0 & SYSREG_BIT(CONFIG0_J))
5760 features |= AVR32_FEATURE_JAVA;
5761 - printk(" java");
5762 - }
5763 - if (config0 & SYSREG_BIT(CONFIG0_F)) {
5764 + if (config0 & SYSREG_BIT(CONFIG0_F))
5765 features |= AVR32_FEATURE_FPU;
5766 - printk(" fpu");
5767 - }
5768 +
5769 + for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
5770 + if (features & (1 << i))
5771 + printk(" %s", cpu_feature_flags[i]);
5772 +
5773 printk("\n");
5774 boot_cpu_data.features = features;
5775 }
5776 @@ -291,6 +319,8 @@ static int c_show(struct seq_file *m, vo
5777 {
5778 unsigned int icache_size, dcache_size;
5779 unsigned int cpu = smp_processor_id();
5780 + unsigned int freq;
5781 + unsigned int i;
5782
5783 icache_size = boot_cpu_data.icache.ways *
5784 boot_cpu_data.icache.sets *
5785 @@ -301,15 +331,21 @@ static int c_show(struct seq_file *m, vo
5786
5787 seq_printf(m, "processor\t: %d\n", cpu);
5788
5789 + seq_printf(m, "chip type\t: %s revision %c\n",
5790 + get_chip_name(&boot_cpu_data),
5791 + avr32_get_chip_revision(&boot_cpu_data) + 'A');
5792 if (boot_cpu_data.arch_type < NR_ARCH_NAMES)
5793 - seq_printf(m, "cpu family\t: %s revision %d\n",
5794 + seq_printf(m, "cpu arch\t: %s revision %d\n",
5795 arch_names[boot_cpu_data.arch_type],
5796 boot_cpu_data.arch_revision);
5797 if (boot_cpu_data.cpu_type < NR_CPU_NAMES)
5798 - seq_printf(m, "cpu type\t: %s revision %d\n",
5799 + seq_printf(m, "cpu core\t: %s revision %d\n",
5800 cpu_names[boot_cpu_data.cpu_type],
5801 boot_cpu_data.cpu_revision);
5802
5803 + freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000;
5804 + seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000);
5805 +
5806 seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
5807 icache_size >> 10,
5808 boot_cpu_data.icache.ways,
5809 @@ -320,7 +356,13 @@ static int c_show(struct seq_file *m, vo
5810 boot_cpu_data.dcache.ways,
5811 boot_cpu_data.dcache.sets,
5812 boot_cpu_data.dcache.linesz);
5813 - seq_printf(m, "bogomips\t: %lu.%02lu\n",
5814 +
5815 + seq_printf(m, "features\t:");
5816 + for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
5817 + if (boot_cpu_data.features & (1 << i))
5818 + seq_printf(m, " %s", cpu_feature_flags[i]);
5819 +
5820 + seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
5821 boot_cpu_data.loops_per_jiffy / (500000/HZ),
5822 (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100);
5823
5824 @@ -343,7 +385,7 @@ static void c_stop(struct seq_file *m, v
5825
5826 }
5827
5828 -struct seq_operations cpuinfo_op = {
5829 +const struct seq_operations cpuinfo_op = {
5830 .start = c_start,
5831 .next = c_next,
5832 .stop = c_stop,
5833 Index: linux-2.6.24.7/arch/avr32/kernel/dma-controller.c
5834 ===================================================================
5835 --- /dev/null
5836 +++ linux-2.6.24.7/arch/avr32/kernel/dma-controller.c
5837 @@ -0,0 +1,34 @@
5838 +/*
5839 + * Preliminary DMA controller framework for AVR32
5840 + *
5841 + * Copyright (C) 2005-2006 Atmel Corporation
5842 + *
5843 + * This program is free software; you can redistribute it and/or modify
5844 + * it under the terms of the GNU General Public License version 2 as
5845 + * published by the Free Software Foundation.
5846 + */
5847 +#include <asm/dma-controller.h>
5848 +
5849 +static LIST_HEAD(controllers);
5850 +
5851 +int register_dma_controller(struct dma_controller *dmac)
5852 +{
5853 + static int next_id;
5854 +
5855 + dmac->id = next_id++;
5856 + list_add_tail(&dmac->list, &controllers);
5857 +
5858 + return 0;
5859 +}
5860 +EXPORT_SYMBOL(register_dma_controller);
5861 +
5862 +struct dma_controller *find_dma_controller(int id)
5863 +{
5864 + struct dma_controller *dmac;
5865 +
5866 + list_for_each_entry(dmac, &controllers, list)
5867 + if (dmac->id == id)
5868 + return dmac;
5869 + return NULL;
5870 +}
5871 +EXPORT_SYMBOL(find_dma_controller);
5872 Index: linux-2.6.24.7/arch/avr32/kernel/entry-avr32b.S
5873 ===================================================================
5874 --- linux-2.6.24.7.orig/arch/avr32/kernel/entry-avr32b.S
5875 +++ linux-2.6.24.7/arch/avr32/kernel/entry-avr32b.S
5876 @@ -741,26 +741,6 @@ irq_level\level:
5877
5878 .section .irq.text,"ax",@progbits
5879
5880 -.global cpu_idle_sleep
5881 -cpu_idle_sleep:
5882 - mask_interrupts
5883 - get_thread_info r8
5884 - ld.w r9, r8[TI_flags]
5885 - bld r9, TIF_NEED_RESCHED
5886 - brcs cpu_idle_enable_int_and_exit
5887 - sbr r9, TIF_CPU_GOING_TO_SLEEP
5888 - st.w r8[TI_flags], r9
5889 - unmask_interrupts
5890 - sleep 0
5891 -cpu_idle_skip_sleep:
5892 - mask_interrupts
5893 - ld.w r9, r8[TI_flags]
5894 - cbr r9, TIF_CPU_GOING_TO_SLEEP
5895 - st.w r8[TI_flags], r9
5896 -cpu_idle_enable_int_and_exit:
5897 - unmask_interrupts
5898 - retal r12
5899 -
5900 .global irq_level0
5901 .global irq_level1
5902 .global irq_level2
5903 Index: linux-2.6.24.7/arch/avr32/kernel/irq.c
5904 ===================================================================
5905 --- linux-2.6.24.7.orig/arch/avr32/kernel/irq.c
5906 +++ linux-2.6.24.7/arch/avr32/kernel/irq.c
5907 @@ -25,6 +25,17 @@ void ack_bad_irq(unsigned int irq)
5908 printk("unexpected IRQ %u\n", irq);
5909 }
5910
5911 +/* May be overridden by platform code */
5912 +int __weak nmi_enable(void)
5913 +{
5914 + return -ENOSYS;
5915 +}
5916 +
5917 +void __weak nmi_disable(void)
5918 +{
5919 +
5920 +}
5921 +
5922 #ifdef CONFIG_PROC_FS
5923 int show_interrupts(struct seq_file *p, void *v)
5924 {
5925 Index: linux-2.6.24.7/arch/avr32/kernel/kprobes.c
5926 ===================================================================
5927 --- linux-2.6.24.7.orig/arch/avr32/kernel/kprobes.c
5928 +++ linux-2.6.24.7/arch/avr32/kernel/kprobes.c
5929 @@ -48,6 +48,7 @@ int __kprobes arch_prepare_kprobe(struct
5930 void __kprobes arch_arm_kprobe(struct kprobe *p)
5931 {
5932 pr_debug("arming kprobe at %p\n", p->addr);
5933 + ocd_enable(NULL);
5934 *p->addr = BREAKPOINT_INSTRUCTION;
5935 flush_icache_range((unsigned long)p->addr,
5936 (unsigned long)p->addr + sizeof(kprobe_opcode_t));
5937 @@ -56,6 +57,7 @@ void __kprobes arch_arm_kprobe(struct kp
5938 void __kprobes arch_disarm_kprobe(struct kprobe *p)
5939 {
5940 pr_debug("disarming kprobe at %p\n", p->addr);
5941 + ocd_disable(NULL);
5942 *p->addr = p->opcode;
5943 flush_icache_range((unsigned long)p->addr,
5944 (unsigned long)p->addr + sizeof(kprobe_opcode_t));
5945 @@ -260,9 +262,6 @@ int __kprobes longjmp_break_handler(stru
5946
5947 int __init arch_init_kprobes(void)
5948 {
5949 - printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
5950 - ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
5951 -
5952 /* TODO: Register kretprobe trampoline */
5953 return 0;
5954 }
5955 Index: linux-2.6.24.7/arch/avr32/kernel/Makefile
5956 ===================================================================
5957 --- linux-2.6.24.7.orig/arch/avr32/kernel/Makefile
5958 +++ linux-2.6.24.7/arch/avr32/kernel/Makefile
5959 @@ -6,9 +6,11 @@ extra-y := head.o vmlinux.lds
5960
5961 obj-$(CONFIG_SUBARCH_AVR32B) += entry-avr32b.o
5962 obj-y += syscall_table.o syscall-stubs.o irq.o
5963 -obj-y += setup.o traps.o semaphore.o ptrace.o
5964 +obj-y += setup.o traps.o semaphore.o ocd.o ptrace.o
5965 obj-y += signal.o sys_avr32.o process.o time.o
5966 obj-y += init_task.o switch_to.o cpu.o
5967 +obj-y += dma-controller.o
5968 obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o
5969 obj-$(CONFIG_KPROBES) += kprobes.o
5970 obj-$(CONFIG_STACKTRACE) += stacktrace.o
5971 +obj-$(CONFIG_NMI_DEBUGGING) += nmi_debug.o
5972 Index: linux-2.6.24.7/arch/avr32/kernel/nmi_debug.c
5973 ===================================================================
5974 --- /dev/null
5975 +++ linux-2.6.24.7/arch/avr32/kernel/nmi_debug.c
5976 @@ -0,0 +1,82 @@
5977 +/*
5978 + * Copyright (C) 2007 Atmel Corporation
5979 + *
5980 + * This program is free software; you can redistribute it and/or modify
5981 + * it under the terms of the GNU General Public License version 2 as
5982 + * published by the Free Software Foundation.
5983 + */
5984 +#include <linux/delay.h>
5985 +#include <linux/kdebug.h>
5986 +#include <linux/notifier.h>
5987 +#include <linux/sched.h>
5988 +
5989 +#include <asm/irq.h>
5990 +
5991 +enum nmi_action {
5992 + NMI_SHOW_STATE = 1 << 0,
5993 + NMI_SHOW_REGS = 1 << 1,
5994 + NMI_DIE = 1 << 2,
5995 + NMI_DEBOUNCE = 1 << 3,
5996 +};
5997 +
5998 +static unsigned long nmi_actions;
5999 +
6000 +static int nmi_debug_notify(struct notifier_block *self,
6001 + unsigned long val, void *data)
6002 +{
6003 + struct die_args *args = data;
6004 +
6005 + if (likely(val != DIE_NMI))
6006 + return NOTIFY_DONE;
6007 +
6008 + if (nmi_actions & NMI_SHOW_STATE)
6009 + show_state();
6010 + if (nmi_actions & NMI_SHOW_REGS)
6011 + show_regs(args->regs);
6012 + if (nmi_actions & NMI_DEBOUNCE)
6013 + mdelay(10);
6014 + if (nmi_actions & NMI_DIE)
6015 + return NOTIFY_BAD;
6016 +
6017 + return NOTIFY_OK;
6018 +}
6019 +
6020 +static struct notifier_block nmi_debug_nb = {
6021 + .notifier_call = nmi_debug_notify,
6022 +};
6023 +
6024 +static int __init nmi_debug_setup(char *str)
6025 +{
6026 + char *p, *sep;
6027 +
6028 + register_die_notifier(&nmi_debug_nb);
6029 + if (nmi_enable()) {
6030 + printk(KERN_WARNING "Unable to enable NMI.\n");
6031 + return 0;
6032 + }
6033 +
6034 + if (*str != '=')
6035 + return 0;
6036 +
6037 + for (p = str + 1; *p; p = sep + 1) {
6038 + sep = strchr(p, ',');
6039 + if (sep)
6040 + *sep = 0;
6041 + if (strcmp(p, "state") == 0)
6042 + nmi_actions |= NMI_SHOW_STATE;
6043 + else if (strcmp(p, "regs") == 0)
6044 + nmi_actions |= NMI_SHOW_REGS;
6045 + else if (strcmp(p, "debounce") == 0)
6046 + nmi_actions |= NMI_DEBOUNCE;
6047 + else if (strcmp(p, "die") == 0)
6048 + nmi_actions |= NMI_DIE;
6049 + else
6050 + printk(KERN_WARNING "NMI: Unrecognized action `%s'\n",
6051 + p);
6052 + if (!sep)
6053 + break;
6054 + }
6055 +
6056 + return 0;
6057 +}
6058 +__setup("nmi_debug", nmi_debug_setup);
6059 Index: linux-2.6.24.7/arch/avr32/kernel/ocd.c
6060 ===================================================================
6061 --- /dev/null
6062 +++ linux-2.6.24.7/arch/avr32/kernel/ocd.c
6063 @@ -0,0 +1,163 @@
6064 +/*
6065 + * Copyright (C) 2007 Atmel Corporation
6066 + *
6067 + * This program is free software; you can redistribute it and/or modify
6068 + * it under the terms of the GNU General Public License version 2 as
6069 + * published by the Free Software Foundation.
6070 + */
6071 +#include <linux/init.h>
6072 +#include <linux/sched.h>
6073 +#include <linux/spinlock.h>
6074 +
6075 +#include <asm/ocd.h>
6076 +
6077 +static long ocd_count;
6078 +static spinlock_t ocd_lock;
6079 +
6080 +/**
6081 + * ocd_enable - enable on-chip debugging
6082 + * @child: task to be debugged
6083 + *
6084 + * If @child is non-NULL, ocd_enable() first checks if debugging has
6085 + * already been enabled for @child, and if it has, does nothing.
6086 + *
6087 + * If @child is NULL (e.g. when debugging the kernel), or debugging
6088 + * has not already been enabled for it, ocd_enable() increments the
6089 + * reference count and enables the debugging hardware.
6090 + */
6091 +void ocd_enable(struct task_struct *child)
6092 +{
6093 + u32 dc;
6094 +
6095 + if (child)
6096 + pr_debug("ocd_enable: child=%s [%u]\n",
6097 + child->comm, child->pid);
6098 + else
6099 + pr_debug("ocd_enable (no child)\n");
6100 +
6101 + if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) {
6102 + spin_lock(&ocd_lock);
6103 + ocd_count++;
6104 + dc = ocd_read(DC);
6105 + dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT);
6106 + ocd_write(DC, dc);
6107 + spin_unlock(&ocd_lock);
6108 + }
6109 +}
6110 +
6111 +/**
6112 + * ocd_disable - disable on-chip debugging
6113 + * @child: task that was being debugged, but isn't anymore
6114 + *
6115 + * If @child is non-NULL, ocd_disable() checks if debugging is enabled
6116 + * for @child, and if it isn't, does nothing.
6117 + *
6118 + * If @child is NULL (e.g. when debugging the kernel), or debugging is
6119 + * enabled, ocd_disable() decrements the reference count, and if it
6120 + * reaches zero, disables the debugging hardware.
6121 + */
6122 +void ocd_disable(struct task_struct *child)
6123 +{
6124 + u32 dc;
6125 +
6126 + if (!child)
6127 + pr_debug("ocd_disable (no child)\n");
6128 + else if (test_tsk_thread_flag(child, TIF_DEBUG))
6129 + pr_debug("ocd_disable: child=%s [%u]\n",
6130 + child->comm, child->pid);
6131 +
6132 + if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) {
6133 + spin_lock(&ocd_lock);
6134 + ocd_count--;
6135 +
6136 + WARN_ON(ocd_count < 0);
6137 +
6138 + if (ocd_count <= 0) {
6139 + dc = ocd_read(DC);
6140 + dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
6141 + ocd_write(DC, dc);
6142 + }
6143 + spin_unlock(&ocd_lock);
6144 + }
6145 +}
6146 +
6147 +#ifdef CONFIG_DEBUG_FS
6148 +#include <linux/debugfs.h>
6149 +#include <linux/module.h>
6150 +
6151 +static struct dentry *ocd_debugfs_root;
6152 +static struct dentry *ocd_debugfs_DC;
6153 +static struct dentry *ocd_debugfs_DS;
6154 +static struct dentry *ocd_debugfs_count;
6155 +
6156 +static u64 ocd_DC_get(void *data)
6157 +{
6158 + return ocd_read(DC);
6159 +}
6160 +static void ocd_DC_set(void *data, u64 val)
6161 +{
6162 + ocd_write(DC, val);
6163 +}
6164 +DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n");
6165 +
6166 +static u64 ocd_DS_get(void *data)
6167 +{
6168 + return ocd_read(DS);
6169 +}
6170 +DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n");
6171 +
6172 +static u64 ocd_count_get(void *data)
6173 +{
6174 + return ocd_count;
6175 +}
6176 +DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n");
6177 +
6178 +static void ocd_debugfs_init(void)
6179 +{
6180 + struct dentry *root;
6181 +
6182 + root = debugfs_create_dir("ocd", NULL);
6183 + if (IS_ERR(root) || !root)
6184 + goto err_root;
6185 + ocd_debugfs_root = root;
6186 +
6187 + ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR,
6188 + root, NULL, &fops_DC);
6189 + if (!ocd_debugfs_DC)
6190 + goto err_DC;
6191 +
6192 + ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root,
6193 + NULL, &fops_DS);
6194 + if (!ocd_debugfs_DS)
6195 + goto err_DS;
6196 +
6197 + ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root,
6198 + NULL, &fops_count);
6199 + if (!ocd_debugfs_count)
6200 + goto err_count;
6201 +
6202 + return;
6203 +
6204 +err_count:
6205 + debugfs_remove(ocd_debugfs_DS);
6206 +err_DS:
6207 + debugfs_remove(ocd_debugfs_DC);
6208 +err_DC:
6209 + debugfs_remove(ocd_debugfs_root);
6210 +err_root:
6211 + printk(KERN_WARNING "OCD: Failed to create debugfs entries\n");
6212 +}
6213 +#else
6214 +static inline void ocd_debugfs_init(void)
6215 +{
6216 +
6217 +}
6218 +#endif
6219 +
6220 +static int __init ocd_init(void)
6221 +{
6222 + spin_lock_init(&ocd_lock);
6223 + ocd_debugfs_init();
6224 + return 0;
6225 +}
6226 +arch_initcall(ocd_init);
6227 Index: linux-2.6.24.7/arch/avr32/kernel/process.c
6228 ===================================================================
6229 --- linux-2.6.24.7.orig/arch/avr32/kernel/process.c
6230 +++ linux-2.6.24.7/arch/avr32/kernel/process.c
6231 @@ -11,17 +11,18 @@
6232 #include <linux/fs.h>
6233 #include <linux/ptrace.h>
6234 #include <linux/reboot.h>
6235 +#include <linux/tick.h>
6236 #include <linux/uaccess.h>
6237 #include <linux/unistd.h>
6238
6239 #include <asm/sysreg.h>
6240 #include <asm/ocd.h>
6241
6242 +#include <asm/arch/pm.h>
6243 +
6244 void (*pm_power_off)(void) = NULL;
6245 EXPORT_SYMBOL(pm_power_off);
6246
6247 -extern void cpu_idle_sleep(void);
6248 -
6249 /*
6250 * This file handles the architecture-dependent parts of process handling..
6251 */
6252 @@ -30,8 +31,10 @@ void cpu_idle(void)
6253 {
6254 /* endless idle loop with no priority at all */
6255 while (1) {
6256 + tick_nohz_stop_sched_tick();
6257 while (!need_resched())
6258 cpu_idle_sleep();
6259 + tick_nohz_restart_sched_tick();
6260 preempt_enable_no_resched();
6261 schedule();
6262 preempt_disable();
6263 @@ -103,7 +106,7 @@ EXPORT_SYMBOL(kernel_thread);
6264 */
6265 void exit_thread(void)
6266 {
6267 - /* nothing to do */
6268 + ocd_disable(current);
6269 }
6270
6271 void flush_thread(void)
6272 @@ -345,6 +348,10 @@ int copy_thread(int nr, unsigned long cl
6273 p->thread.cpu_context.ksp = (unsigned long)childregs;
6274 p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
6275
6276 + clear_tsk_thread_flag(p, TIF_DEBUG);
6277 + if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
6278 + ocd_enable(p);
6279 +
6280 return 0;
6281 }
6282
6283 Index: linux-2.6.24.7/arch/avr32/kernel/ptrace.c
6284 ===================================================================
6285 --- linux-2.6.24.7.orig/arch/avr32/kernel/ptrace.c
6286 +++ linux-2.6.24.7/arch/avr32/kernel/ptrace.c
6287 @@ -58,6 +58,7 @@ void ptrace_disable(struct task_struct *
6288 {
6289 clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
6290 clear_tsk_thread_flag(child, TIF_BREAKPOINT);
6291 + ocd_disable(child);
6292 }
6293
6294 /*
6295 @@ -144,10 +145,6 @@ long arch_ptrace(struct task_struct *chi
6296 {
6297 int ret;
6298
6299 - pr_debug("ptrace: Enabling monitor mode...\n");
6300 - ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT)
6301 - | (1 << OCD_DC_DBE_BIT));
6302 -
6303 switch (request) {
6304 /* Read the word at location addr in the child process */
6305 case PTRACE_PEEKTEXT:
6306 Index: linux-2.6.24.7/arch/avr32/kernel/setup.c
6307 ===================================================================
6308 --- linux-2.6.24.7.orig/arch/avr32/kernel/setup.c
6309 +++ linux-2.6.24.7/arch/avr32/kernel/setup.c
6310 @@ -273,6 +273,8 @@ static int __init early_parse_fbmem(char
6311 printk(KERN_WARNING
6312 "Failed to allocate framebuffer memory\n");
6313 fbmem_size = 0;
6314 + } else {
6315 + memset(__va(fbmem_start), 0, fbmem_size);
6316 }
6317 }
6318
6319 Index: linux-2.6.24.7/arch/avr32/kernel/signal.c
6320 ===================================================================
6321 --- linux-2.6.24.7.orig/arch/avr32/kernel/signal.c
6322 +++ linux-2.6.24.7/arch/avr32/kernel/signal.c
6323 @@ -270,19 +270,12 @@ int do_signal(struct pt_regs *regs, sigs
6324 if (!user_mode(regs))
6325 return 0;
6326
6327 - if (try_to_freeze()) {
6328 - signr = 0;
6329 - if (!signal_pending(current))
6330 - goto no_signal;
6331 - }
6332 -
6333 if (test_thread_flag(TIF_RESTORE_SIGMASK))
6334 oldset = &current->saved_sigmask;
6335 else if (!oldset)
6336 oldset = &current->blocked;
6337
6338 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
6339 -no_signal:
6340 if (syscall) {
6341 switch (regs->r12) {
6342 case -ERESTART_RESTARTBLOCK:
6343 Index: linux-2.6.24.7/arch/avr32/kernel/time.c
6344 ===================================================================
6345 --- linux-2.6.24.7.orig/arch/avr32/kernel/time.c
6346 +++ linux-2.6.24.7/arch/avr32/kernel/time.c
6347 @@ -1,16 +1,12 @@
6348 /*
6349 * Copyright (C) 2004-2007 Atmel Corporation
6350 *
6351 - * Based on MIPS implementation arch/mips/kernel/time.c
6352 - * Copyright 2001 MontaVista Software Inc.
6353 - *
6354 * This program is free software; you can redistribute it and/or modify
6355 * it under the terms of the GNU General Public License version 2 as
6356 * published by the Free Software Foundation.
6357 */
6358 -
6359 #include <linux/clk.h>
6360 -#include <linux/clocksource.h>
6361 +#include <linux/clockchips.h>
6362 #include <linux/time.h>
6363 #include <linux/module.h>
6364 #include <linux/interrupt.h>
6365 @@ -27,207 +23,133 @@
6366 #include <asm/io.h>
6367 #include <asm/sections.h>
6368
6369 -/* how many counter cycles in a jiffy? */
6370 -static u32 cycles_per_jiffy;
6371 +#include <asm/arch/pm.h>
6372
6373 -/* the count value for the next timer interrupt */
6374 -static u32 expirelo;
6375
6376 -cycle_t __weak read_cycle_count(void)
6377 +static cycle_t read_cycle_count(void)
6378 {
6379 return (cycle_t)sysreg_read(COUNT);
6380 }
6381
6382 -struct clocksource __weak clocksource_avr32 = {
6383 - .name = "avr32",
6384 - .rating = 350,
6385 +/*
6386 + * The architectural cycle count registers are a fine clocksource unless
6387 + * the system idle loop use sleep states like "idle": the CPU cycles
6388 + * measured by COUNT (and COMPARE) don't happen during sleep states.
6389 + * Their duration also changes if cpufreq changes the CPU clock rate.
6390 + * So we rate the clocksource using COUNT as very low quality.
6391 + */
6392 +static struct clocksource counter = {
6393 + .name = "avr32_counter",
6394 + .rating = 50,
6395 .read = read_cycle_count,
6396 .mask = CLOCKSOURCE_MASK(32),
6397 .shift = 16,
6398 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
6399 };
6400
6401 -irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
6402 -
6403 -struct irqaction timer_irqaction = {
6404 - .handler = timer_interrupt,
6405 - .flags = IRQF_DISABLED,
6406 - .name = "timer",
6407 -};
6408 -
6409 -/*
6410 - * By default we provide the null RTC ops
6411 - */
6412 -static unsigned long null_rtc_get_time(void)
6413 +static irqreturn_t timer_interrupt(int irq, void *dev_id)
6414 {
6415 - return mktime(2007, 1, 1, 0, 0, 0);
6416 -}
6417 -
6418 -static int null_rtc_set_time(unsigned long sec)
6419 -{
6420 - return 0;
6421 -}
6422 + struct clock_event_device *evdev = dev_id;
6423
6424 -static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
6425 -static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
6426 -
6427 -static void avr32_timer_ack(void)
6428 -{
6429 - u32 count;
6430 -
6431 - /* Ack this timer interrupt and set the next one */
6432 - expirelo += cycles_per_jiffy;
6433 - /* setting COMPARE to 0 stops the COUNT-COMPARE */
6434 - if (expirelo == 0) {
6435 - sysreg_write(COMPARE, expirelo + 1);
6436 - } else {
6437 - sysreg_write(COMPARE, expirelo);
6438 - }
6439 + /*
6440 + * Disable the interrupt until the clockevent subsystem
6441 + * reprograms it.
6442 + */
6443 + sysreg_write(COMPARE, 0);
6444
6445 - /* Check to see if we have missed any timer interrupts */
6446 - count = sysreg_read(COUNT);
6447 - if ((count - expirelo) < 0x7fffffff) {
6448 - expirelo = count + cycles_per_jiffy;
6449 - sysreg_write(COMPARE, expirelo);
6450 - }
6451 + evdev->event_handler(evdev);
6452 + return IRQ_HANDLED;
6453 }
6454
6455 -int __weak avr32_hpt_init(void)
6456 -{
6457 - int ret;
6458 - unsigned long mult, shift, count_hz;
6459 -
6460 - count_hz = clk_get_rate(boot_cpu_data.clk);
6461 - shift = clocksource_avr32.shift;
6462 - mult = clocksource_hz2mult(count_hz, shift);
6463 - clocksource_avr32.mult = mult;
6464 -
6465 - {
6466 - u64 tmp;
6467 -
6468 - tmp = TICK_NSEC;
6469 - tmp <<= shift;
6470 - tmp += mult / 2;
6471 - do_div(tmp, mult);
6472 -
6473 - cycles_per_jiffy = tmp;
6474 - }
6475 +static struct irqaction timer_irqaction = {
6476 + .handler = timer_interrupt,
6477 + .flags = IRQF_TIMER | IRQF_DISABLED,
6478 + .name = "avr32_comparator",
6479 +};
6480
6481 - ret = setup_irq(0, &timer_irqaction);
6482 - if (ret) {
6483 - pr_debug("timer: could not request IRQ 0: %d\n", ret);
6484 - return -ENODEV;
6485 - }
6486 +static int comparator_next_event(unsigned long delta,
6487 + struct clock_event_device *evdev)
6488 +{
6489 + unsigned long flags;
6490
6491 - printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
6492 - "%lu.%03lu MHz\n",
6493 - ((count_hz + 500) / 1000) / 1000,
6494 - ((count_hz + 500) / 1000) % 1000);
6495 + raw_local_irq_save(flags);
6496
6497 - return 0;
6498 -}
6499 + /* The time to read COUNT then update COMPARE must be less
6500 + * than the min_delta_ns value for this clockevent source.
6501 + */
6502 + sysreg_write(COMPARE, (sysreg_read(COUNT) + delta) ? : 1);
6503
6504 -/*
6505 - * Taken from MIPS c0_hpt_timer_init().
6506 - *
6507 - * The reason COUNT is written twice is probably to make sure we don't get any
6508 - * timer interrupts while we are messing with the counter.
6509 - */
6510 -int __weak avr32_hpt_start(void)
6511 -{
6512 - u32 count = sysreg_read(COUNT);
6513 - expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
6514 - sysreg_write(COUNT, expirelo - cycles_per_jiffy);
6515 - sysreg_write(COMPARE, expirelo);
6516 - sysreg_write(COUNT, count);
6517 + raw_local_irq_restore(flags);
6518
6519 return 0;
6520 }
6521
6522 -/*
6523 - * local_timer_interrupt() does profiling and process accounting on a
6524 - * per-CPU basis.
6525 - *
6526 - * In UP mode, it is invoked from the (global) timer_interrupt.
6527 - */
6528 -void local_timer_interrupt(int irq, void *dev_id)
6529 +static void comparator_mode(enum clock_event_mode mode,
6530 + struct clock_event_device *evdev)
6531 {
6532 - if (current->pid)
6533 - profile_tick(CPU_PROFILING);
6534 - update_process_times(user_mode(get_irq_regs()));
6535 + switch (mode) {
6536 + case CLOCK_EVT_MODE_ONESHOT:
6537 + pr_debug("%s: start\n", evdev->name);
6538 + /* FALLTHROUGH */
6539 + case CLOCK_EVT_MODE_RESUME:
6540 + cpu_disable_idle_sleep();
6541 + break;
6542 + case CLOCK_EVT_MODE_UNUSED:
6543 + case CLOCK_EVT_MODE_SHUTDOWN:
6544 + sysreg_write(COMPARE, 0);
6545 + pr_debug("%s: stop\n", evdev->name);
6546 + cpu_enable_idle_sleep();
6547 + break;
6548 + default:
6549 + BUG();
6550 + }
6551 }
6552
6553 -irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
6554 -{
6555 - /* ack timer interrupt and try to set next interrupt */
6556 - avr32_timer_ack();
6557 -
6558 - /*
6559 - * Call the generic timer interrupt handler
6560 - */
6561 - write_seqlock(&xtime_lock);
6562 - do_timer(1);
6563 - write_sequnlock(&xtime_lock);
6564 -
6565 - /*
6566 - * In UP mode, we call local_timer_interrupt() to do profiling
6567 - * and process accounting.
6568 - *
6569 - * SMP is not supported yet.
6570 - */
6571 - local_timer_interrupt(irq, dev_id);
6572 -
6573 - return IRQ_HANDLED;
6574 -}
6575 +static struct clock_event_device comparator = {
6576 + .name = "avr32_comparator",
6577 + .features = CLOCK_EVT_FEAT_ONESHOT,
6578 + .shift = 16,
6579 + .rating = 50,
6580 + .cpumask = CPU_MASK_CPU0,
6581 + .set_next_event = comparator_next_event,
6582 + .set_mode = comparator_mode,
6583 +};
6584
6585 void __init time_init(void)
6586 {
6587 + unsigned long counter_hz;
6588 int ret;
6589
6590 - /*
6591 - * Make sure we don't get any COMPARE interrupts before we can
6592 - * handle them.
6593 - */
6594 - sysreg_write(COMPARE, 0);
6595 -
6596 - xtime.tv_sec = rtc_get_time();
6597 + xtime.tv_sec = mktime(2007, 1, 1, 0, 0, 0);
6598 xtime.tv_nsec = 0;
6599
6600 set_normalized_timespec(&wall_to_monotonic,
6601 -xtime.tv_sec, -xtime.tv_nsec);
6602
6603 - ret = avr32_hpt_init();
6604 - if (ret) {
6605 - pr_debug("timer: failed setup: %d\n", ret);
6606 - return;
6607 - }
6608 + /* figure rate for counter */
6609 + counter_hz = clk_get_rate(boot_cpu_data.clk);
6610 + counter.mult = clocksource_hz2mult(counter_hz, counter.shift);
6611
6612 - ret = clocksource_register(&clocksource_avr32);
6613 + ret = clocksource_register(&counter);
6614 if (ret)
6615 pr_debug("timer: could not register clocksource: %d\n", ret);
6616
6617 - ret = avr32_hpt_start();
6618 - if (ret) {
6619 - pr_debug("timer: failed starting: %d\n", ret);
6620 - return;
6621 - }
6622 -}
6623 + /* setup COMPARE clockevent */
6624 + comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
6625 + comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
6626 + comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;
6627
6628 -static struct sysdev_class timer_class = {
6629 - set_kset_name("timer"),
6630 -};
6631 + sysreg_write(COMPARE, 0);
6632 + timer_irqaction.dev_id = &comparator;
6633
6634 -static struct sys_device timer_device = {
6635 - .id = 0,
6636 - .cls = &timer_class,
6637 -};
6638 + ret = setup_irq(0, &timer_irqaction);
6639 + if (ret)
6640 + pr_debug("timer: could not request IRQ 0: %d\n", ret);
6641 + else {
6642 + clockevents_register_device(&comparator);
6643
6644 -static int __init init_timer_sysfs(void)
6645 -{
6646 - int err = sysdev_class_register(&timer_class);
6647 - if (!err)
6648 - err = sysdev_register(&timer_device);
6649 - return err;
6650 + pr_info("%s: irq 0, %lu.%03lu MHz\n", comparator.name,
6651 + ((counter_hz + 500) / 1000) / 1000,
6652 + ((counter_hz + 500) / 1000) % 1000);
6653 + }
6654 }
6655 -
6656 -device_initcall(init_timer_sysfs);
6657 Index: linux-2.6.24.7/arch/avr32/kernel/traps.c
6658 ===================================================================
6659 --- linux-2.6.24.7.orig/arch/avr32/kernel/traps.c
6660 +++ linux-2.6.24.7/arch/avr32/kernel/traps.c
6661 @@ -9,6 +9,7 @@
6662 #include <linux/bug.h>
6663 #include <linux/init.h>
6664 #include <linux/kallsyms.h>
6665 +#include <linux/kdebug.h>
6666 #include <linux/module.h>
6667 #include <linux/notifier.h>
6668 #include <linux/sched.h>
6669 @@ -107,9 +108,23 @@ void _exception(long signr, struct pt_re
6670
6671 asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
6672 {
6673 - printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
6674 - show_regs_log_lvl(regs, KERN_ALERT);
6675 - show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
6676 + int ret;
6677 +
6678 + nmi_enter();
6679 +
6680 + ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT);
6681 + switch (ret) {
6682 + case NOTIFY_OK:
6683 + case NOTIFY_STOP:
6684 + return;
6685 + case NOTIFY_BAD:
6686 + die("Fatal Non-Maskable Interrupt", regs, SIGINT);
6687 + default:
6688 + break;
6689 + }
6690 +
6691 + printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
6692 + nmi_disable();
6693 }
6694
6695 asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
6696 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/at32ap7000.c
6697 ===================================================================
6698 --- linux-2.6.24.7.orig/arch/avr32/mach-at32ap/at32ap7000.c
6699 +++ /dev/null
6700 @@ -1,1730 +0,0 @@
6701 -/*
6702 - * Copyright (C) 2005-2006 Atmel Corporation
6703 - *
6704 - * This program is free software; you can redistribute it and/or modify
6705 - * it under the terms of the GNU General Public License version 2 as
6706 - * published by the Free Software Foundation.
6707 - */
6708 -#include <linux/clk.h>
6709 -#include <linux/fb.h>
6710 -#include <linux/init.h>
6711 -#include <linux/platform_device.h>
6712 -#include <linux/dma-mapping.h>
6713 -#include <linux/spi/spi.h>
6714 -
6715 -#include <asm/io.h>
6716 -
6717 -#include <asm/arch/at32ap7000.h>
6718 -#include <asm/arch/board.h>
6719 -#include <asm/arch/portmux.h>
6720 -
6721 -#include <video/atmel_lcdc.h>
6722 -
6723 -#include "clock.h"
6724 -#include "hmatrix.h"
6725 -#include "pio.h"
6726 -#include "pm.h"
6727 -
6728 -
6729 -#define PBMEM(base) \
6730 - { \
6731 - .start = base, \
6732 - .end = base + 0x3ff, \
6733 - .flags = IORESOURCE_MEM, \
6734 - }
6735 -#define IRQ(num) \
6736 - { \
6737 - .start = num, \
6738 - .end = num, \
6739 - .flags = IORESOURCE_IRQ, \
6740 - }
6741 -#define NAMED_IRQ(num, _name) \
6742 - { \
6743 - .start = num, \
6744 - .end = num, \
6745 - .name = _name, \
6746 - .flags = IORESOURCE_IRQ, \
6747 - }
6748 -
6749 -/* REVISIT these assume *every* device supports DMA, but several
6750 - * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
6751 - */
6752 -#define DEFINE_DEV(_name, _id) \
6753 -static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
6754 -static struct platform_device _name##_id##_device = { \
6755 - .name = #_name, \
6756 - .id = _id, \
6757 - .dev = { \
6758 - .dma_mask = &_name##_id##_dma_mask, \
6759 - .coherent_dma_mask = DMA_32BIT_MASK, \
6760 - }, \
6761 - .resource = _name##_id##_resource, \
6762 - .num_resources = ARRAY_SIZE(_name##_id##_resource), \
6763 -}
6764 -#define DEFINE_DEV_DATA(_name, _id) \
6765 -static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
6766 -static struct platform_device _name##_id##_device = { \
6767 - .name = #_name, \
6768 - .id = _id, \
6769 - .dev = { \
6770 - .dma_mask = &_name##_id##_dma_mask, \
6771 - .platform_data = &_name##_id##_data, \
6772 - .coherent_dma_mask = DMA_32BIT_MASK, \
6773 - }, \
6774 - .resource = _name##_id##_resource, \
6775 - .num_resources = ARRAY_SIZE(_name##_id##_resource), \
6776 -}
6777 -
6778 -#define select_peripheral(pin, periph, flags) \
6779 - at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
6780 -
6781 -#define DEV_CLK(_name, devname, bus, _index) \
6782 -static struct clk devname##_##_name = { \
6783 - .name = #_name, \
6784 - .dev = &devname##_device.dev, \
6785 - .parent = &bus##_clk, \
6786 - .mode = bus##_clk_mode, \
6787 - .get_rate = bus##_clk_get_rate, \
6788 - .index = _index, \
6789 -}
6790 -
6791 -static DEFINE_SPINLOCK(pm_lock);
6792 -
6793 -unsigned long at32ap7000_osc_rates[3] = {
6794 - [0] = 32768,
6795 - /* FIXME: these are ATSTK1002-specific */
6796 - [1] = 20000000,
6797 - [2] = 12000000,
6798 -};
6799 -
6800 -static unsigned long osc_get_rate(struct clk *clk)
6801 -{
6802 - return at32ap7000_osc_rates[clk->index];
6803 -}
6804 -
6805 -static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
6806 -{
6807 - unsigned long div, mul, rate;
6808 -
6809 - if (!(control & PM_BIT(PLLEN)))
6810 - return 0;
6811 -
6812 - div = PM_BFEXT(PLLDIV, control) + 1;
6813 - mul = PM_BFEXT(PLLMUL, control) + 1;
6814 -
6815 - rate = clk->parent->get_rate(clk->parent);
6816 - rate = (rate + div / 2) / div;
6817 - rate *= mul;
6818 -
6819 - return rate;
6820 -}
6821 -
6822 -static unsigned long pll0_get_rate(struct clk *clk)
6823 -{
6824 - u32 control;
6825 -
6826 - control = pm_readl(PLL0);
6827 -
6828 - return pll_get_rate(clk, control);
6829 -}
6830 -
6831 -static unsigned long pll1_get_rate(struct clk *clk)
6832 -{
6833 - u32 control;
6834 -
6835 - control = pm_readl(PLL1);
6836 -
6837 - return pll_get_rate(clk, control);
6838 -}
6839 -
6840 -/*
6841 - * The AT32AP7000 has five primary clock sources: One 32kHz
6842 - * oscillator, two crystal oscillators and two PLLs.
6843 - */
6844 -static struct clk osc32k = {
6845 - .name = "osc32k",
6846 - .get_rate = osc_get_rate,
6847 - .users = 1,
6848 - .index = 0,
6849 -};
6850 -static struct clk osc0 = {
6851 - .name = "osc0",
6852 - .get_rate = osc_get_rate,
6853 - .users = 1,
6854 - .index = 1,
6855 -};
6856 -static struct clk osc1 = {
6857 - .name = "osc1",
6858 - .get_rate = osc_get_rate,
6859 - .index = 2,
6860 -};
6861 -static struct clk pll0 = {
6862 - .name = "pll0",
6863 - .get_rate = pll0_get_rate,
6864 - .parent = &osc0,
6865 -};
6866 -static struct clk pll1 = {
6867 - .name = "pll1",
6868 - .get_rate = pll1_get_rate,
6869 - .parent = &osc0,
6870 -};
6871 -
6872 -/*
6873 - * The main clock can be either osc0 or pll0. The boot loader may
6874 - * have chosen one for us, so we don't really know which one until we
6875 - * have a look at the SM.
6876 - */
6877 -static struct clk *main_clock;
6878 -
6879 -/*
6880 - * Synchronous clocks are generated from the main clock. The clocks
6881 - * must satisfy the constraint
6882 - * fCPU >= fHSB >= fPB
6883 - * i.e. each clock must not be faster than its parent.
6884 - */
6885 -static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
6886 -{
6887 - return main_clock->get_rate(main_clock) >> shift;
6888 -};
6889 -
6890 -static void cpu_clk_mode(struct clk *clk, int enabled)
6891 -{
6892 - unsigned long flags;
6893 - u32 mask;
6894 -
6895 - spin_lock_irqsave(&pm_lock, flags);
6896 - mask = pm_readl(CPU_MASK);
6897 - if (enabled)
6898 - mask |= 1 << clk->index;
6899 - else
6900 - mask &= ~(1 << clk->index);
6901 - pm_writel(CPU_MASK, mask);
6902 - spin_unlock_irqrestore(&pm_lock, flags);
6903 -}
6904 -
6905 -static unsigned long cpu_clk_get_rate(struct clk *clk)
6906 -{
6907 - unsigned long cksel, shift = 0;
6908 -
6909 - cksel = pm_readl(CKSEL);
6910 - if (cksel & PM_BIT(CPUDIV))
6911 - shift = PM_BFEXT(CPUSEL, cksel) + 1;
6912 -
6913 - return bus_clk_get_rate(clk, shift);
6914 -}
6915 -
6916 -static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
6917 -{
6918 - u32 control;
6919 - unsigned long parent_rate, child_div, actual_rate, div;
6920 -
6921 - parent_rate = clk->parent->get_rate(clk->parent);
6922 - control = pm_readl(CKSEL);
6923 -
6924 - if (control & PM_BIT(HSBDIV))
6925 - child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
6926 - else
6927 - child_div = 1;
6928 -
6929 - if (rate > 3 * (parent_rate / 4) || child_div == 1) {
6930 - actual_rate = parent_rate;
6931 - control &= ~PM_BIT(CPUDIV);
6932 - } else {
6933 - unsigned int cpusel;
6934 - div = (parent_rate + rate / 2) / rate;
6935 - if (div > child_div)
6936 - div = child_div;
6937 - cpusel = (div > 1) ? (fls(div) - 2) : 0;
6938 - control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
6939 - actual_rate = parent_rate / (1 << (cpusel + 1));
6940 - }
6941 -
6942 - pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
6943 - clk->name, rate, actual_rate);
6944 -
6945 - if (apply)
6946 - pm_writel(CKSEL, control);
6947 -
6948 - return actual_rate;
6949 -}
6950 -
6951 -static void hsb_clk_mode(struct clk *clk, int enabled)
6952 -{
6953 - unsigned long flags;
6954 - u32 mask;
6955 -
6956 - spin_lock_irqsave(&pm_lock, flags);
6957 - mask = pm_readl(HSB_MASK);
6958 - if (enabled)
6959 - mask |= 1 << clk->index;
6960 - else
6961 - mask &= ~(1 << clk->index);
6962 - pm_writel(HSB_MASK, mask);
6963 - spin_unlock_irqrestore(&pm_lock, flags);
6964 -}
6965 -
6966 -static unsigned long hsb_clk_get_rate(struct clk *clk)
6967 -{
6968 - unsigned long cksel, shift = 0;
6969 -
6970 - cksel = pm_readl(CKSEL);
6971 - if (cksel & PM_BIT(HSBDIV))
6972 - shift = PM_BFEXT(HSBSEL, cksel) + 1;
6973 -
6974 - return bus_clk_get_rate(clk, shift);
6975 -}
6976 -
6977 -static void pba_clk_mode(struct clk *clk, int enabled)
6978 -{
6979 - unsigned long flags;
6980 - u32 mask;
6981 -
6982 - spin_lock_irqsave(&pm_lock, flags);
6983 - mask = pm_readl(PBA_MASK);
6984 - if (enabled)
6985 - mask |= 1 << clk->index;
6986 - else
6987 - mask &= ~(1 << clk->index);
6988 - pm_writel(PBA_MASK, mask);
6989 - spin_unlock_irqrestore(&pm_lock, flags);
6990 -}
6991 -
6992 -static unsigned long pba_clk_get_rate(struct clk *clk)
6993 -{
6994 - unsigned long cksel, shift = 0;
6995 -
6996 - cksel = pm_readl(CKSEL);
6997 - if (cksel & PM_BIT(PBADIV))
6998 - shift = PM_BFEXT(PBASEL, cksel) + 1;
6999 -
7000 - return bus_clk_get_rate(clk, shift);
7001 -}
7002 -
7003 -static void pbb_clk_mode(struct clk *clk, int enabled)
7004 -{
7005 - unsigned long flags;
7006 - u32 mask;
7007 -
7008 - spin_lock_irqsave(&pm_lock, flags);
7009 - mask = pm_readl(PBB_MASK);
7010 - if (enabled)
7011 - mask |= 1 << clk->index;
7012 - else
7013 - mask &= ~(1 << clk->index);
7014 - pm_writel(PBB_MASK, mask);
7015 - spin_unlock_irqrestore(&pm_lock, flags);
7016 -}
7017 -
7018 -static unsigned long pbb_clk_get_rate(struct clk *clk)
7019 -{
7020 - unsigned long cksel, shift = 0;
7021 -
7022 - cksel = pm_readl(CKSEL);
7023 - if (cksel & PM_BIT(PBBDIV))
7024 - shift = PM_BFEXT(PBBSEL, cksel) + 1;
7025 -
7026 - return bus_clk_get_rate(clk, shift);
7027 -}
7028 -
7029 -static struct clk cpu_clk = {
7030 - .name = "cpu",
7031 - .get_rate = cpu_clk_get_rate,
7032 - .set_rate = cpu_clk_set_rate,
7033 - .users = 1,
7034 -};
7035 -static struct clk hsb_clk = {
7036 - .name = "hsb",
7037 - .parent = &cpu_clk,
7038 - .get_rate = hsb_clk_get_rate,
7039 -};
7040 -static struct clk pba_clk = {
7041 - .name = "pba",
7042 - .parent = &hsb_clk,
7043 - .mode = hsb_clk_mode,
7044 - .get_rate = pba_clk_get_rate,
7045 - .index = 1,
7046 -};
7047 -static struct clk pbb_clk = {
7048 - .name = "pbb",
7049 - .parent = &hsb_clk,
7050 - .mode = hsb_clk_mode,
7051 - .get_rate = pbb_clk_get_rate,
7052 - .users = 1,
7053 - .index = 2,
7054 -};
7055 -
7056 -/* --------------------------------------------------------------------
7057 - * Generic Clock operations
7058 - * -------------------------------------------------------------------- */
7059 -
7060 -static void genclk_mode(struct clk *clk, int enabled)
7061 -{
7062 - u32 control;
7063 -
7064 - control = pm_readl(GCCTRL(clk->index));
7065 - if (enabled)
7066 - control |= PM_BIT(CEN);
7067 - else
7068 - control &= ~PM_BIT(CEN);
7069 - pm_writel(GCCTRL(clk->index), control);
7070 -}
7071 -
7072 -static unsigned long genclk_get_rate(struct clk *clk)
7073 -{
7074 - u32 control;
7075 - unsigned long div = 1;
7076 -
7077 - control = pm_readl(GCCTRL(clk->index));
7078 - if (control & PM_BIT(DIVEN))
7079 - div = 2 * (PM_BFEXT(DIV, control) + 1);
7080 -
7081 - return clk->parent->get_rate(clk->parent) / div;
7082 -}
7083 -
7084 -static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
7085 -{
7086 - u32 control;
7087 - unsigned long parent_rate, actual_rate, div;
7088 -
7089 - parent_rate = clk->parent->get_rate(clk->parent);
7090 - control = pm_readl(GCCTRL(clk->index));
7091 -
7092 - if (rate > 3 * parent_rate / 4) {
7093 - actual_rate = parent_rate;
7094 - control &= ~PM_BIT(DIVEN);
7095 - } else {
7096 - div = (parent_rate + rate) / (2 * rate) - 1;
7097 - control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
7098 - actual_rate = parent_rate / (2 * (div + 1));
7099 - }
7100 -
7101 - dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
7102 - clk->name, rate, actual_rate);
7103 -
7104 - if (apply)
7105 - pm_writel(GCCTRL(clk->index), control);
7106 -
7107 - return actual_rate;
7108 -}
7109 -
7110 -int genclk_set_parent(struct clk *clk, struct clk *parent)
7111 -{
7112 - u32 control;
7113 -
7114 - dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
7115 - clk->name, parent->name, clk->parent->name);
7116 -
7117 - control = pm_readl(GCCTRL(clk->index));
7118 -
7119 - if (parent == &osc1 || parent == &pll1)
7120 - control |= PM_BIT(OSCSEL);
7121 - else if (parent == &osc0 || parent == &pll0)
7122 - control &= ~PM_BIT(OSCSEL);
7123 - else
7124 - return -EINVAL;
7125 -
7126 - if (parent == &pll0 || parent == &pll1)
7127 - control |= PM_BIT(PLLSEL);
7128 - else
7129 - control &= ~PM_BIT(PLLSEL);
7130 -
7131 - pm_writel(GCCTRL(clk->index), control);
7132 - clk->parent = parent;
7133 -
7134 - return 0;
7135 -}
7136 -
7137 -static void __init genclk_init_parent(struct clk *clk)
7138 -{
7139 - u32 control;
7140 - struct clk *parent;
7141 -
7142 - BUG_ON(clk->index > 7);
7143 -
7144 - control = pm_readl(GCCTRL(clk->index));
7145 - if (control & PM_BIT(OSCSEL))
7146 - parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
7147 - else
7148 - parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
7149 -
7150 - clk->parent = parent;
7151 -}
7152 -
7153 -/* --------------------------------------------------------------------
7154 - * System peripherals
7155 - * -------------------------------------------------------------------- */
7156 -static struct resource at32_pm0_resource[] = {
7157 - {
7158 - .start = 0xfff00000,
7159 - .end = 0xfff0007f,
7160 - .flags = IORESOURCE_MEM,
7161 - },
7162 - IRQ(20),
7163 -};
7164 -
7165 -static struct resource at32ap700x_rtc0_resource[] = {
7166 - {
7167 - .start = 0xfff00080,
7168 - .end = 0xfff000af,
7169 - .flags = IORESOURCE_MEM,
7170 - },
7171 - IRQ(21),
7172 -};
7173 -
7174 -static struct resource at32_wdt0_resource[] = {
7175 - {
7176 - .start = 0xfff000b0,
7177 - .end = 0xfff000cf,
7178 - .flags = IORESOURCE_MEM,
7179 - },
7180 -};
7181 -
7182 -static struct resource at32_eic0_resource[] = {
7183 - {
7184 - .start = 0xfff00100,
7185 - .end = 0xfff0013f,
7186 - .flags = IORESOURCE_MEM,
7187 - },
7188 - IRQ(19),
7189 -};
7190 -
7191 -DEFINE_DEV(at32_pm, 0);
7192 -DEFINE_DEV(at32ap700x_rtc, 0);
7193 -DEFINE_DEV(at32_wdt, 0);
7194 -DEFINE_DEV(at32_eic, 0);
7195 -
7196 -/*
7197 - * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
7198 - * is always running.
7199 - */
7200 -static struct clk at32_pm_pclk = {
7201 - .name = "pclk",
7202 - .dev = &at32_pm0_device.dev,
7203 - .parent = &pbb_clk,
7204 - .mode = pbb_clk_mode,
7205 - .get_rate = pbb_clk_get_rate,
7206 - .users = 1,
7207 - .index = 0,
7208 -};
7209 -
7210 -static struct resource intc0_resource[] = {
7211 - PBMEM(0xfff00400),
7212 -};
7213 -struct platform_device at32_intc0_device = {
7214 - .name = "intc",
7215 - .id = 0,
7216 - .resource = intc0_resource,
7217 - .num_resources = ARRAY_SIZE(intc0_resource),
7218 -};
7219 -DEV_CLK(pclk, at32_intc0, pbb, 1);
7220 -
7221 -static struct clk ebi_clk = {
7222 - .name = "ebi",
7223 - .parent = &hsb_clk,
7224 - .mode = hsb_clk_mode,
7225 - .get_rate = hsb_clk_get_rate,
7226 - .users = 1,
7227 -};
7228 -static struct clk hramc_clk = {
7229 - .name = "hramc",
7230 - .parent = &hsb_clk,
7231 - .mode = hsb_clk_mode,
7232 - .get_rate = hsb_clk_get_rate,
7233 - .users = 1,
7234 - .index = 3,
7235 -};
7236 -
7237 -static struct resource smc0_resource[] = {
7238 - PBMEM(0xfff03400),
7239 -};
7240 -DEFINE_DEV(smc, 0);
7241 -DEV_CLK(pclk, smc0, pbb, 13);
7242 -DEV_CLK(mck, smc0, hsb, 0);
7243 -
7244 -static struct platform_device pdc_device = {
7245 - .name = "pdc",
7246 - .id = 0,
7247 -};
7248 -DEV_CLK(hclk, pdc, hsb, 4);
7249 -DEV_CLK(pclk, pdc, pba, 16);
7250 -
7251 -static struct clk pico_clk = {
7252 - .name = "pico",
7253 - .parent = &cpu_clk,
7254 - .mode = cpu_clk_mode,
7255 - .get_rate = cpu_clk_get_rate,
7256 - .users = 1,
7257 -};
7258 -
7259 -static struct resource dmaca0_resource[] = {
7260 - {
7261 - .start = 0xff200000,
7262 - .end = 0xff20ffff,
7263 - .flags = IORESOURCE_MEM,
7264 - },
7265 - IRQ(2),
7266 -};
7267 -DEFINE_DEV(dmaca, 0);
7268 -DEV_CLK(hclk, dmaca0, hsb, 10);
7269 -
7270 -/* --------------------------------------------------------------------
7271 - * HMATRIX
7272 - * -------------------------------------------------------------------- */
7273 -
7274 -static struct clk hmatrix_clk = {
7275 - .name = "hmatrix_clk",
7276 - .parent = &pbb_clk,
7277 - .mode = pbb_clk_mode,
7278 - .get_rate = pbb_clk_get_rate,
7279 - .index = 2,
7280 - .users = 1,
7281 -};
7282 -#define HMATRIX_BASE ((void __iomem *)0xfff00800)
7283 -
7284 -#define hmatrix_readl(reg) \
7285 - __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
7286 -#define hmatrix_writel(reg,value) \
7287 - __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
7288 -
7289 -/*
7290 - * Set bits in the HMATRIX Special Function Register (SFR) used by the
7291 - * External Bus Interface (EBI). This can be used to enable special
7292 - * features like CompactFlash support, NAND Flash support, etc. on
7293 - * certain chipselects.
7294 - */
7295 -static inline void set_ebi_sfr_bits(u32 mask)
7296 -{
7297 - u32 sfr;
7298 -
7299 - clk_enable(&hmatrix_clk);
7300 - sfr = hmatrix_readl(SFR4);
7301 - sfr |= mask;
7302 - hmatrix_writel(SFR4, sfr);
7303 - clk_disable(&hmatrix_clk);
7304 -}
7305 -
7306 -/* --------------------------------------------------------------------
7307 - * System Timer/Counter (TC)
7308 - * -------------------------------------------------------------------- */
7309 -static struct resource at32_systc0_resource[] = {
7310 - PBMEM(0xfff00c00),
7311 - IRQ(22),
7312 -};
7313 -struct platform_device at32_systc0_device = {
7314 - .name = "systc",
7315 - .id = 0,
7316 - .resource = at32_systc0_resource,
7317 - .num_resources = ARRAY_SIZE(at32_systc0_resource),
7318 -};
7319 -DEV_CLK(pclk, at32_systc0, pbb, 3);
7320 -
7321 -/* --------------------------------------------------------------------
7322 - * PIO
7323 - * -------------------------------------------------------------------- */
7324 -
7325 -static struct resource pio0_resource[] = {
7326 - PBMEM(0xffe02800),
7327 - IRQ(13),
7328 -};
7329 -DEFINE_DEV(pio, 0);
7330 -DEV_CLK(mck, pio0, pba, 10);
7331 -
7332 -static struct resource pio1_resource[] = {
7333 - PBMEM(0xffe02c00),
7334 - IRQ(14),
7335 -};
7336 -DEFINE_DEV(pio, 1);
7337 -DEV_CLK(mck, pio1, pba, 11);
7338 -
7339 -static struct resource pio2_resource[] = {
7340 - PBMEM(0xffe03000),
7341 - IRQ(15),
7342 -};
7343 -DEFINE_DEV(pio, 2);
7344 -DEV_CLK(mck, pio2, pba, 12);
7345 -
7346 -static struct resource pio3_resource[] = {
7347 - PBMEM(0xffe03400),
7348 - IRQ(16),
7349 -};
7350 -DEFINE_DEV(pio, 3);
7351 -DEV_CLK(mck, pio3, pba, 13);
7352 -
7353 -static struct resource pio4_resource[] = {
7354 - PBMEM(0xffe03800),
7355 - IRQ(17),
7356 -};
7357 -DEFINE_DEV(pio, 4);
7358 -DEV_CLK(mck, pio4, pba, 14);
7359 -
7360 -void __init at32_add_system_devices(void)
7361 -{
7362 - platform_device_register(&at32_pm0_device);
7363 - platform_device_register(&at32_intc0_device);
7364 - platform_device_register(&at32ap700x_rtc0_device);
7365 - platform_device_register(&at32_wdt0_device);
7366 - platform_device_register(&at32_eic0_device);
7367 - platform_device_register(&smc0_device);
7368 - platform_device_register(&pdc_device);
7369 - platform_device_register(&dmaca0_device);
7370 -
7371 - platform_device_register(&at32_systc0_device);
7372 -
7373 - platform_device_register(&pio0_device);
7374 - platform_device_register(&pio1_device);
7375 - platform_device_register(&pio2_device);
7376 - platform_device_register(&pio3_device);
7377 - platform_device_register(&pio4_device);
7378 -}
7379 -
7380 -/* --------------------------------------------------------------------
7381 - * USART
7382 - * -------------------------------------------------------------------- */
7383 -
7384 -static struct atmel_uart_data atmel_usart0_data = {
7385 - .use_dma_tx = 1,
7386 - .use_dma_rx = 1,
7387 -};
7388 -static struct resource atmel_usart0_resource[] = {
7389 - PBMEM(0xffe00c00),
7390 - IRQ(6),
7391 -};
7392 -DEFINE_DEV_DATA(atmel_usart, 0);
7393 -DEV_CLK(usart, atmel_usart0, pba, 3);
7394 -
7395 -static struct atmel_uart_data atmel_usart1_data = {
7396 - .use_dma_tx = 1,
7397 - .use_dma_rx = 1,
7398 -};
7399 -static struct resource atmel_usart1_resource[] = {
7400 - PBMEM(0xffe01000),
7401 - IRQ(7),
7402 -};
7403 -DEFINE_DEV_DATA(atmel_usart, 1);
7404 -DEV_CLK(usart, atmel_usart1, pba, 4);
7405 -
7406 -static struct atmel_uart_data atmel_usart2_data = {
7407 - .use_dma_tx = 1,
7408 - .use_dma_rx = 1,
7409 -};
7410 -static struct resource atmel_usart2_resource[] = {
7411 - PBMEM(0xffe01400),
7412 - IRQ(8),
7413 -};
7414 -DEFINE_DEV_DATA(atmel_usart, 2);
7415 -DEV_CLK(usart, atmel_usart2, pba, 5);
7416 -
7417 -static struct atmel_uart_data atmel_usart3_data = {
7418 - .use_dma_tx = 1,
7419 - .use_dma_rx = 1,
7420 -};
7421 -static struct resource atmel_usart3_resource[] = {
7422 - PBMEM(0xffe01800),
7423 - IRQ(9),
7424 -};
7425 -DEFINE_DEV_DATA(atmel_usart, 3);
7426 -DEV_CLK(usart, atmel_usart3, pba, 6);
7427 -
7428 -static inline void configure_usart0_pins(void)
7429 -{
7430 - select_peripheral(PA(8), PERIPH_B, 0); /* RXD */
7431 - select_peripheral(PA(9), PERIPH_B, 0); /* TXD */
7432 -}
7433 -
7434 -static inline void configure_usart1_pins(void)
7435 -{
7436 - select_peripheral(PA(17), PERIPH_A, 0); /* RXD */
7437 - select_peripheral(PA(18), PERIPH_A, 0); /* TXD */
7438 -}
7439 -
7440 -static inline void configure_usart2_pins(void)
7441 -{
7442 - select_peripheral(PB(26), PERIPH_B, 0); /* RXD */
7443 - select_peripheral(PB(27), PERIPH_B, 0); /* TXD */
7444 -}
7445 -
7446 -static inline void configure_usart3_pins(void)
7447 -{
7448 - select_peripheral(PB(18), PERIPH_B, 0); /* RXD */
7449 - select_peripheral(PB(17), PERIPH_B, 0); /* TXD */
7450 -}
7451 -
7452 -static struct platform_device *__initdata at32_usarts[4];
7453 -
7454 -void __init at32_map_usart(unsigned int hw_id, unsigned int line)
7455 -{
7456 - struct platform_device *pdev;
7457 -
7458 - switch (hw_id) {
7459 - case 0:
7460 - pdev = &atmel_usart0_device;
7461 - configure_usart0_pins();
7462 - break;
7463 - case 1:
7464 - pdev = &atmel_usart1_device;
7465 - configure_usart1_pins();
7466 - break;
7467 - case 2:
7468 - pdev = &atmel_usart2_device;
7469 - configure_usart2_pins();
7470 - break;
7471 - case 3:
7472 - pdev = &atmel_usart3_device;
7473 - configure_usart3_pins();
7474 - break;
7475 - default:
7476 - return;
7477 - }
7478 -
7479 - if (PXSEG(pdev->resource[0].start) == P4SEG) {
7480 - /* Addresses in the P4 segment are permanently mapped 1:1 */
7481 - struct atmel_uart_data *data = pdev->dev.platform_data;
7482 - data->regs = (void __iomem *)pdev->resource[0].start;
7483 - }
7484 -
7485 - pdev->id = line;
7486 - at32_usarts[line] = pdev;
7487 -}
7488 -
7489 -struct platform_device *__init at32_add_device_usart(unsigned int id)
7490 -{
7491 - platform_device_register(at32_usarts[id]);
7492 - return at32_usarts[id];
7493 -}
7494 -
7495 -struct platform_device *atmel_default_console_device;
7496 -
7497 -void __init at32_setup_serial_console(unsigned int usart_id)
7498 -{
7499 - atmel_default_console_device = at32_usarts[usart_id];
7500 -}
7501 -
7502 -/* --------------------------------------------------------------------
7503 - * Ethernet
7504 - * -------------------------------------------------------------------- */
7505 -
7506 -static struct eth_platform_data macb0_data;
7507 -static struct resource macb0_resource[] = {
7508 - PBMEM(0xfff01800),
7509 - IRQ(25),
7510 -};
7511 -DEFINE_DEV_DATA(macb, 0);
7512 -DEV_CLK(hclk, macb0, hsb, 8);
7513 -DEV_CLK(pclk, macb0, pbb, 6);
7514 -
7515 -static struct eth_platform_data macb1_data;
7516 -static struct resource macb1_resource[] = {
7517 - PBMEM(0xfff01c00),
7518 - IRQ(26),
7519 -};
7520 -DEFINE_DEV_DATA(macb, 1);
7521 -DEV_CLK(hclk, macb1, hsb, 9);
7522 -DEV_CLK(pclk, macb1, pbb, 7);
7523 -
7524 -struct platform_device *__init
7525 -at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
7526 -{
7527 - struct platform_device *pdev;
7528 -
7529 - switch (id) {
7530 - case 0:
7531 - pdev = &macb0_device;
7532 -
7533 - select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */
7534 - select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */
7535 - select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */
7536 - select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */
7537 - select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */
7538 - select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */
7539 - select_peripheral(PC(13), PERIPH_A, 0); /* RXER */
7540 - select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */
7541 - select_peripheral(PC(16), PERIPH_A, 0); /* MDC */
7542 - select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */
7543 -
7544 - if (!data->is_rmii) {
7545 - select_peripheral(PC(0), PERIPH_A, 0); /* COL */
7546 - select_peripheral(PC(1), PERIPH_A, 0); /* CRS */
7547 - select_peripheral(PC(2), PERIPH_A, 0); /* TXER */
7548 - select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */
7549 - select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */
7550 - select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */
7551 - select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */
7552 - select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */
7553 - select_peripheral(PC(18), PERIPH_A, 0); /* SPD */
7554 - }
7555 - break;
7556 -
7557 - case 1:
7558 - pdev = &macb1_device;
7559 -
7560 - select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */
7561 - select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */
7562 - select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */
7563 - select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */
7564 - select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */
7565 - select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */
7566 - select_peripheral(PD(5), PERIPH_B, 0); /* RXER */
7567 - select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */
7568 - select_peripheral(PD(3), PERIPH_B, 0); /* MDC */
7569 - select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */
7570 -
7571 - if (!data->is_rmii) {
7572 - select_peripheral(PC(19), PERIPH_B, 0); /* COL */
7573 - select_peripheral(PC(23), PERIPH_B, 0); /* CRS */
7574 - select_peripheral(PC(26), PERIPH_B, 0); /* TXER */
7575 - select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */
7576 - select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */
7577 - select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */
7578 - select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */
7579 - select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */
7580 - select_peripheral(PD(15), PERIPH_B, 0); /* SPD */
7581 - }
7582 - break;
7583 -
7584 - default:
7585 - return NULL;
7586 - }
7587 -
7588 - memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
7589 - platform_device_register(pdev);
7590 -
7591 - return pdev;
7592 -}
7593 -
7594 -/* --------------------------------------------------------------------
7595 - * SPI
7596 - * -------------------------------------------------------------------- */
7597 -static struct resource atmel_spi0_resource[] = {
7598 - PBMEM(0xffe00000),
7599 - IRQ(3),
7600 -};
7601 -DEFINE_DEV(atmel_spi, 0);
7602 -DEV_CLK(spi_clk, atmel_spi0, pba, 0);
7603 -
7604 -static struct resource atmel_spi1_resource[] = {
7605 - PBMEM(0xffe00400),
7606 - IRQ(4),
7607 -};
7608 -DEFINE_DEV(atmel_spi, 1);
7609 -DEV_CLK(spi_clk, atmel_spi1, pba, 1);
7610 -
7611 -static void __init
7612 -at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
7613 - unsigned int n, const u8 *pins)
7614 -{
7615 - unsigned int pin, mode;
7616 -
7617 - for (; n; n--, b++) {
7618 - b->bus_num = bus_num;
7619 - if (b->chip_select >= 4)
7620 - continue;
7621 - pin = (unsigned)b->controller_data;
7622 - if (!pin) {
7623 - pin = pins[b->chip_select];
7624 - b->controller_data = (void *)pin;
7625 - }
7626 - mode = AT32_GPIOF_OUTPUT;
7627 - if (!(b->mode & SPI_CS_HIGH))
7628 - mode |= AT32_GPIOF_HIGH;
7629 - at32_select_gpio(pin, mode);
7630 - }
7631 -}
7632 -
7633 -struct platform_device *__init
7634 -at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
7635 -{
7636 - /*
7637 - * Manage the chipselects as GPIOs, normally using the same pins
7638 - * the SPI controller expects; but boards can use other pins.
7639 - */
7640 - static u8 __initdata spi0_pins[] =
7641 - { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
7642 - GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
7643 - static u8 __initdata spi1_pins[] =
7644 - { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
7645 - GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
7646 - struct platform_device *pdev;
7647 -
7648 - switch (id) {
7649 - case 0:
7650 - pdev = &atmel_spi0_device;
7651 - select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
7652 - select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
7653 - select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
7654 - at32_spi_setup_slaves(0, b, n, spi0_pins);
7655 - break;
7656 -
7657 - case 1:
7658 - pdev = &atmel_spi1_device;
7659 - select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
7660 - select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
7661 - select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
7662 - at32_spi_setup_slaves(1, b, n, spi1_pins);
7663 - break;
7664 -
7665 - default:
7666 - return NULL;
7667 - }
7668 -
7669 - spi_register_board_info(b, n);
7670 - platform_device_register(pdev);
7671 - return pdev;
7672 -}
7673 -
7674 -/* --------------------------------------------------------------------
7675 - * TWI
7676 - * -------------------------------------------------------------------- */
7677 -static struct resource atmel_twi0_resource[] __initdata = {
7678 - PBMEM(0xffe00800),
7679 - IRQ(5),
7680 -};
7681 -static struct clk atmel_twi0_pclk = {
7682 - .name = "twi_pclk",
7683 - .parent = &pba_clk,
7684 - .mode = pba_clk_mode,
7685 - .get_rate = pba_clk_get_rate,
7686 - .index = 2,
7687 -};
7688 -
7689 -struct platform_device *__init at32_add_device_twi(unsigned int id)
7690 -{
7691 - struct platform_device *pdev;
7692 -
7693 - if (id != 0)
7694 - return NULL;
7695 -
7696 - pdev = platform_device_alloc("atmel_twi", id);
7697 - if (!pdev)
7698 - return NULL;
7699 -
7700 - if (platform_device_add_resources(pdev, atmel_twi0_resource,
7701 - ARRAY_SIZE(atmel_twi0_resource)))
7702 - goto err_add_resources;
7703 -
7704 - select_peripheral(PA(6), PERIPH_A, 0); /* SDA */
7705 - select_peripheral(PA(7), PERIPH_A, 0); /* SDL */
7706 -
7707 - atmel_twi0_pclk.dev = &pdev->dev;
7708 -
7709 - platform_device_add(pdev);
7710 - return pdev;
7711 -
7712 -err_add_resources:
7713 - platform_device_put(pdev);
7714 - return NULL;
7715 -}
7716 -
7717 -/* --------------------------------------------------------------------
7718 - * MMC
7719 - * -------------------------------------------------------------------- */
7720 -static struct resource atmel_mci0_resource[] __initdata = {
7721 - PBMEM(0xfff02400),
7722 - IRQ(28),
7723 -};
7724 -static struct clk atmel_mci0_pclk = {
7725 - .name = "mci_clk",
7726 - .parent = &pbb_clk,
7727 - .mode = pbb_clk_mode,
7728 - .get_rate = pbb_clk_get_rate,
7729 - .index = 9,
7730 -};
7731 -
7732 -struct platform_device *__init at32_add_device_mci(unsigned int id)
7733 -{
7734 - struct platform_device *pdev;
7735 -
7736 - if (id != 0)
7737 - return NULL;
7738 -
7739 - pdev = platform_device_alloc("atmel_mci", id);
7740 - if (!pdev)
7741 - return NULL;
7742 -
7743 - if (platform_device_add_resources(pdev, atmel_mci0_resource,
7744 - ARRAY_SIZE(atmel_mci0_resource)))
7745 - goto err_add_resources;
7746 -
7747 - select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
7748 - select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
7749 - select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
7750 - select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
7751 - select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
7752 - select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
7753 -
7754 - atmel_mci0_pclk.dev = &pdev->dev;
7755 -
7756 - platform_device_add(pdev);
7757 - return pdev;
7758 -
7759 -err_add_resources:
7760 - platform_device_put(pdev);
7761 - return NULL;
7762 -}
7763 -
7764 -/* --------------------------------------------------------------------
7765 - * LCDC
7766 - * -------------------------------------------------------------------- */
7767 -static struct atmel_lcdfb_info atmel_lcdfb0_data;
7768 -static struct resource atmel_lcdfb0_resource[] = {
7769 - {
7770 - .start = 0xff000000,
7771 - .end = 0xff000fff,
7772 - .flags = IORESOURCE_MEM,
7773 - },
7774 - IRQ(1),
7775 - {
7776 - /* Placeholder for pre-allocated fb memory */
7777 - .start = 0x00000000,
7778 - .end = 0x00000000,
7779 - .flags = 0,
7780 - },
7781 -};
7782 -DEFINE_DEV_DATA(atmel_lcdfb, 0);
7783 -DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
7784 -static struct clk atmel_lcdfb0_pixclk = {
7785 - .name = "lcdc_clk",
7786 - .dev = &atmel_lcdfb0_device.dev,
7787 - .mode = genclk_mode,
7788 - .get_rate = genclk_get_rate,
7789 - .set_rate = genclk_set_rate,
7790 - .set_parent = genclk_set_parent,
7791 - .index = 7,
7792 -};
7793 -
7794 -struct platform_device *__init
7795 -at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
7796 - unsigned long fbmem_start, unsigned long fbmem_len)
7797 -{
7798 - struct platform_device *pdev;
7799 - struct atmel_lcdfb_info *info;
7800 - struct fb_monspecs *monspecs;
7801 - struct fb_videomode *modedb;
7802 - unsigned int modedb_size;
7803 -
7804 - /*
7805 - * Do a deep copy of the fb data, monspecs and modedb. Make
7806 - * sure all allocations are done before setting up the
7807 - * portmux.
7808 - */
7809 - monspecs = kmemdup(data->default_monspecs,
7810 - sizeof(struct fb_monspecs), GFP_KERNEL);
7811 - if (!monspecs)
7812 - return NULL;
7813 -
7814 - modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
7815 - modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
7816 - if (!modedb)
7817 - goto err_dup_modedb;
7818 - monspecs->modedb = modedb;
7819 -
7820 - switch (id) {
7821 - case 0:
7822 - pdev = &atmel_lcdfb0_device;
7823 - select_peripheral(PC(19), PERIPH_A, 0); /* CC */
7824 - select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
7825 - select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
7826 - select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
7827 - select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */
7828 - select_peripheral(PC(24), PERIPH_A, 0); /* MODE */
7829 - select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
7830 - select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */
7831 - select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */
7832 - select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */
7833 - select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */
7834 - select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */
7835 - select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
7836 - select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
7837 - select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
7838 - select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
7839 - select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
7840 - select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
7841 - select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
7842 - select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
7843 - select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
7844 - select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
7845 - select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
7846 - select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
7847 - select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
7848 - select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
7849 - select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
7850 - select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
7851 - select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
7852 - select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
7853 - select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
7854 -
7855 - clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
7856 - clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
7857 - break;
7858 -
7859 - default:
7860 - goto err_invalid_id;
7861 - }
7862 -
7863 - if (fbmem_len) {
7864 - pdev->resource[2].start = fbmem_start;
7865 - pdev->resource[2].end = fbmem_start + fbmem_len - 1;
7866 - pdev->resource[2].flags = IORESOURCE_MEM;
7867 - }
7868 -
7869 - info = pdev->dev.platform_data;
7870 - memcpy(info, data, sizeof(struct atmel_lcdfb_info));
7871 - info->default_monspecs = monspecs;
7872 -
7873 - platform_device_register(pdev);
7874 - return pdev;
7875 -
7876 -err_invalid_id:
7877 - kfree(modedb);
7878 -err_dup_modedb:
7879 - kfree(monspecs);
7880 - return NULL;
7881 -}
7882 -
7883 -/* --------------------------------------------------------------------
7884 - * SSC
7885 - * -------------------------------------------------------------------- */
7886 -static struct resource ssc0_resource[] = {
7887 - PBMEM(0xffe01c00),
7888 - IRQ(10),
7889 -};
7890 -DEFINE_DEV(ssc, 0);
7891 -DEV_CLK(pclk, ssc0, pba, 7);
7892 -
7893 -static struct resource ssc1_resource[] = {
7894 - PBMEM(0xffe02000),
7895 - IRQ(11),
7896 -};
7897 -DEFINE_DEV(ssc, 1);
7898 -DEV_CLK(pclk, ssc1, pba, 8);
7899 -
7900 -static struct resource ssc2_resource[] = {
7901 - PBMEM(0xffe02400),
7902 - IRQ(12),
7903 -};
7904 -DEFINE_DEV(ssc, 2);
7905 -DEV_CLK(pclk, ssc2, pba, 9);
7906 -
7907 -struct platform_device *__init
7908 -at32_add_device_ssc(unsigned int id, unsigned int flags)
7909 -{
7910 - struct platform_device *pdev;
7911 -
7912 - switch (id) {
7913 - case 0:
7914 - pdev = &ssc0_device;
7915 - if (flags & ATMEL_SSC_RF)
7916 - select_peripheral(PA(21), PERIPH_A, 0); /* RF */
7917 - if (flags & ATMEL_SSC_RK)
7918 - select_peripheral(PA(22), PERIPH_A, 0); /* RK */
7919 - if (flags & ATMEL_SSC_TK)
7920 - select_peripheral(PA(23), PERIPH_A, 0); /* TK */
7921 - if (flags & ATMEL_SSC_TF)
7922 - select_peripheral(PA(24), PERIPH_A, 0); /* TF */
7923 - if (flags & ATMEL_SSC_TD)
7924 - select_peripheral(PA(25), PERIPH_A, 0); /* TD */
7925 - if (flags & ATMEL_SSC_RD)
7926 - select_peripheral(PA(26), PERIPH_A, 0); /* RD */
7927 - break;
7928 - case 1:
7929 - pdev = &ssc1_device;
7930 - if (flags & ATMEL_SSC_RF)
7931 - select_peripheral(PA(0), PERIPH_B, 0); /* RF */
7932 - if (flags & ATMEL_SSC_RK)
7933 - select_peripheral(PA(1), PERIPH_B, 0); /* RK */
7934 - if (flags & ATMEL_SSC_TK)
7935 - select_peripheral(PA(2), PERIPH_B, 0); /* TK */
7936 - if (flags & ATMEL_SSC_TF)
7937 - select_peripheral(PA(3), PERIPH_B, 0); /* TF */
7938 - if (flags & ATMEL_SSC_TD)
7939 - select_peripheral(PA(4), PERIPH_B, 0); /* TD */
7940 - if (flags & ATMEL_SSC_RD)
7941 - select_peripheral(PA(5), PERIPH_B, 0); /* RD */
7942 - break;
7943 - case 2:
7944 - pdev = &ssc2_device;
7945 - if (flags & ATMEL_SSC_TD)
7946 - select_peripheral(PB(13), PERIPH_A, 0); /* TD */
7947 - if (flags & ATMEL_SSC_RD)
7948 - select_peripheral(PB(14), PERIPH_A, 0); /* RD */
7949 - if (flags & ATMEL_SSC_TK)
7950 - select_peripheral(PB(15), PERIPH_A, 0); /* TK */
7951 - if (flags & ATMEL_SSC_TF)
7952 - select_peripheral(PB(16), PERIPH_A, 0); /* TF */
7953 - if (flags & ATMEL_SSC_RF)
7954 - select_peripheral(PB(17), PERIPH_A, 0); /* RF */
7955 - if (flags & ATMEL_SSC_RK)
7956 - select_peripheral(PB(18), PERIPH_A, 0); /* RK */
7957 - break;
7958 - default:
7959 - return NULL;
7960 - }
7961 -
7962 - platform_device_register(pdev);
7963 - return pdev;
7964 -}
7965 -
7966 -/* --------------------------------------------------------------------
7967 - * USB Device Controller
7968 - * -------------------------------------------------------------------- */
7969 -static struct resource usba0_resource[] __initdata = {
7970 - {
7971 - .start = 0xff300000,
7972 - .end = 0xff3fffff,
7973 - .flags = IORESOURCE_MEM,
7974 - }, {
7975 - .start = 0xfff03000,
7976 - .end = 0xfff033ff,
7977 - .flags = IORESOURCE_MEM,
7978 - },
7979 - IRQ(31),
7980 -};
7981 -static struct clk usba0_pclk = {
7982 - .name = "pclk",
7983 - .parent = &pbb_clk,
7984 - .mode = pbb_clk_mode,
7985 - .get_rate = pbb_clk_get_rate,
7986 - .index = 12,
7987 -};
7988 -static struct clk usba0_hclk = {
7989 - .name = "hclk",
7990 - .parent = &hsb_clk,
7991 - .mode = hsb_clk_mode,
7992 - .get_rate = hsb_clk_get_rate,
7993 - .index = 6,
7994 -};
7995 -
7996 -struct platform_device *__init
7997 -at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
7998 -{
7999 - struct platform_device *pdev;
8000 -
8001 - if (id != 0)
8002 - return NULL;
8003 -
8004 - pdev = platform_device_alloc("atmel_usba_udc", 0);
8005 - if (!pdev)
8006 - return NULL;
8007 -
8008 - if (platform_device_add_resources(pdev, usba0_resource,
8009 - ARRAY_SIZE(usba0_resource)))
8010 - goto out_free_pdev;
8011 -
8012 - if (data) {
8013 - if (platform_device_add_data(pdev, data, sizeof(*data)))
8014 - goto out_free_pdev;
8015 -
8016 - if (data->vbus_pin != GPIO_PIN_NONE)
8017 - at32_select_gpio(data->vbus_pin, 0);
8018 - }
8019 -
8020 - usba0_pclk.dev = &pdev->dev;
8021 - usba0_hclk.dev = &pdev->dev;
8022 -
8023 - platform_device_add(pdev);
8024 -
8025 - return pdev;
8026 -
8027 -out_free_pdev:
8028 - platform_device_put(pdev);
8029 - return NULL;
8030 -}
8031 -
8032 -/* --------------------------------------------------------------------
8033 - * IDE / CompactFlash
8034 - * -------------------------------------------------------------------- */
8035 -static struct resource at32_smc_cs4_resource[] __initdata = {
8036 - {
8037 - .start = 0x04000000,
8038 - .end = 0x07ffffff,
8039 - .flags = IORESOURCE_MEM,
8040 - },
8041 - IRQ(~0UL), /* Magic IRQ will be overridden */
8042 -};
8043 -static struct resource at32_smc_cs5_resource[] __initdata = {
8044 - {
8045 - .start = 0x20000000,
8046 - .end = 0x23ffffff,
8047 - .flags = IORESOURCE_MEM,
8048 - },
8049 - IRQ(~0UL), /* Magic IRQ will be overridden */
8050 -};
8051 -
8052 -static int __init at32_init_ide_or_cf(struct platform_device *pdev,
8053 - unsigned int cs, unsigned int extint)
8054 -{
8055 - static unsigned int extint_pin_map[4] __initdata = {
8056 - GPIO_PIN_PB(25),
8057 - GPIO_PIN_PB(26),
8058 - GPIO_PIN_PB(27),
8059 - GPIO_PIN_PB(28),
8060 - };
8061 - static bool common_pins_initialized __initdata = false;
8062 - unsigned int extint_pin;
8063 - int ret;
8064 -
8065 - if (extint >= ARRAY_SIZE(extint_pin_map))
8066 - return -EINVAL;
8067 - extint_pin = extint_pin_map[extint];
8068 -
8069 - switch (cs) {
8070 - case 4:
8071 - ret = platform_device_add_resources(pdev,
8072 - at32_smc_cs4_resource,
8073 - ARRAY_SIZE(at32_smc_cs4_resource));
8074 - if (ret)
8075 - return ret;
8076 -
8077 - select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */
8078 - set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
8079 - break;
8080 - case 5:
8081 - ret = platform_device_add_resources(pdev,
8082 - at32_smc_cs5_resource,
8083 - ARRAY_SIZE(at32_smc_cs5_resource));
8084 - if (ret)
8085 - return ret;
8086 -
8087 - select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */
8088 - set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
8089 - break;
8090 - default:
8091 - return -EINVAL;
8092 - }
8093 -
8094 - if (!common_pins_initialized) {
8095 - select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */
8096 - select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */
8097 - select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */
8098 - select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */
8099 - common_pins_initialized = true;
8100 - }
8101 -
8102 - at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
8103 -
8104 - pdev->resource[1].start = EIM_IRQ_BASE + extint;
8105 - pdev->resource[1].end = pdev->resource[1].start;
8106 -
8107 - return 0;
8108 -}
8109 -
8110 -struct platform_device *__init
8111 -at32_add_device_ide(unsigned int id, unsigned int extint,
8112 - struct ide_platform_data *data)
8113 -{
8114 - struct platform_device *pdev;
8115 -
8116 - pdev = platform_device_alloc("at32_ide", id);
8117 - if (!pdev)
8118 - goto fail;
8119 -
8120 - if (platform_device_add_data(pdev, data,
8121 - sizeof(struct ide_platform_data)))
8122 - goto fail;
8123 -
8124 - if (at32_init_ide_or_cf(pdev, data->cs, extint))
8125 - goto fail;
8126 -
8127 - platform_device_add(pdev);
8128 - return pdev;
8129 -
8130 -fail:
8131 - platform_device_put(pdev);
8132 - return NULL;
8133 -}
8134 -
8135 -struct platform_device *__init
8136 -at32_add_device_cf(unsigned int id, unsigned int extint,
8137 - struct cf_platform_data *data)
8138 -{
8139 - struct platform_device *pdev;
8140 -
8141 - pdev = platform_device_alloc("at32_cf", id);
8142 - if (!pdev)
8143 - goto fail;
8144 -
8145 - if (platform_device_add_data(pdev, data,
8146 - sizeof(struct cf_platform_data)))
8147 - goto fail;
8148 -
8149 - if (at32_init_ide_or_cf(pdev, data->cs, extint))
8150 - goto fail;
8151 -
8152 - if (data->detect_pin != GPIO_PIN_NONE)
8153 - at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
8154 - if (data->reset_pin != GPIO_PIN_NONE)
8155 - at32_select_gpio(data->reset_pin, 0);
8156 - if (data->vcc_pin != GPIO_PIN_NONE)
8157 - at32_select_gpio(data->vcc_pin, 0);
8158 - /* READY is used as extint, so we can't select it as gpio */
8159 -
8160 - platform_device_add(pdev);
8161 - return pdev;
8162 -
8163 -fail:
8164 - platform_device_put(pdev);
8165 - return NULL;
8166 -}
8167 -
8168 -/* --------------------------------------------------------------------
8169 - * AC97C
8170 - * -------------------------------------------------------------------- */
8171 -static struct resource atmel_ac97c0_resource[] __initdata = {
8172 - PBMEM(0xfff02800),
8173 - IRQ(29),
8174 -};
8175 -static struct clk atmel_ac97c0_pclk = {
8176 - .name = "pclk",
8177 - .parent = &pbb_clk,
8178 - .mode = pbb_clk_mode,
8179 - .get_rate = pbb_clk_get_rate,
8180 - .index = 10,
8181 -};
8182 -
8183 -struct platform_device *__init at32_add_device_ac97c(unsigned int id)
8184 -{
8185 - struct platform_device *pdev;
8186 -
8187 - if (id != 0)
8188 - return NULL;
8189 -
8190 - pdev = platform_device_alloc("atmel_ac97c", id);
8191 - if (!pdev)
8192 - return NULL;
8193 -
8194 - if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
8195 - ARRAY_SIZE(atmel_ac97c0_resource)))
8196 - goto err_add_resources;
8197 -
8198 - select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
8199 - select_peripheral(PB(21), PERIPH_B, 0); /* SDO */
8200 - select_peripheral(PB(22), PERIPH_B, 0); /* SDI */
8201 - select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
8202 -
8203 - atmel_ac97c0_pclk.dev = &pdev->dev;
8204 -
8205 - platform_device_add(pdev);
8206 - return pdev;
8207 -
8208 -err_add_resources:
8209 - platform_device_put(pdev);
8210 - return NULL;
8211 -}
8212 -
8213 -/* --------------------------------------------------------------------
8214 - * ABDAC
8215 - * -------------------------------------------------------------------- */
8216 -static struct resource abdac0_resource[] __initdata = {
8217 - PBMEM(0xfff02000),
8218 - IRQ(27),
8219 -};
8220 -static struct clk abdac0_pclk = {
8221 - .name = "pclk",
8222 - .parent = &pbb_clk,
8223 - .mode = pbb_clk_mode,
8224 - .get_rate = pbb_clk_get_rate,
8225 - .index = 8,
8226 -};
8227 -static struct clk abdac0_sample_clk = {
8228 - .name = "sample_clk",
8229 - .mode = genclk_mode,
8230 - .get_rate = genclk_get_rate,
8231 - .set_rate = genclk_set_rate,
8232 - .set_parent = genclk_set_parent,
8233 - .index = 6,
8234 -};
8235 -
8236 -struct platform_device *__init at32_add_device_abdac(unsigned int id)
8237 -{
8238 - struct platform_device *pdev;
8239 -
8240 - if (id != 0)
8241 - return NULL;
8242 -
8243 - pdev = platform_device_alloc("abdac", id);
8244 - if (!pdev)
8245 - return NULL;
8246 -
8247 - if (platform_device_add_resources(pdev, abdac0_resource,
8248 - ARRAY_SIZE(abdac0_resource)))
8249 - goto err_add_resources;
8250 -
8251 - select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */
8252 - select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */
8253 - select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */
8254 - select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */
8255 -
8256 - abdac0_pclk.dev = &pdev->dev;
8257 - abdac0_sample_clk.dev = &pdev->dev;
8258 -
8259 - platform_device_add(pdev);
8260 - return pdev;
8261 -
8262 -err_add_resources:
8263 - platform_device_put(pdev);
8264 - return NULL;
8265 -}
8266 -
8267 -/* --------------------------------------------------------------------
8268 - * GCLK
8269 - * -------------------------------------------------------------------- */
8270 -static struct clk gclk0 = {
8271 - .name = "gclk0",
8272 - .mode = genclk_mode,
8273 - .get_rate = genclk_get_rate,
8274 - .set_rate = genclk_set_rate,
8275 - .set_parent = genclk_set_parent,
8276 - .index = 0,
8277 -};
8278 -static struct clk gclk1 = {
8279 - .name = "gclk1",
8280 - .mode = genclk_mode,
8281 - .get_rate = genclk_get_rate,
8282 - .set_rate = genclk_set_rate,
8283 - .set_parent = genclk_set_parent,
8284 - .index = 1,
8285 -};
8286 -static struct clk gclk2 = {
8287 - .name = "gclk2",
8288 - .mode = genclk_mode,
8289 - .get_rate = genclk_get_rate,
8290 - .set_rate = genclk_set_rate,
8291 - .set_parent = genclk_set_parent,
8292 - .index = 2,
8293 -};
8294 -static struct clk gclk3 = {
8295 - .name = "gclk3",
8296 - .mode = genclk_mode,
8297 - .get_rate = genclk_get_rate,
8298 - .set_rate = genclk_set_rate,
8299 - .set_parent = genclk_set_parent,
8300 - .index = 3,
8301 -};
8302 -static struct clk gclk4 = {
8303 - .name = "gclk4",
8304 - .mode = genclk_mode,
8305 - .get_rate = genclk_get_rate,
8306 - .set_rate = genclk_set_rate,
8307 - .set_parent = genclk_set_parent,
8308 - .index = 4,
8309 -};
8310 -
8311 -struct clk *at32_clock_list[] = {
8312 - &osc32k,
8313 - &osc0,
8314 - &osc1,
8315 - &pll0,
8316 - &pll1,
8317 - &cpu_clk,
8318 - &hsb_clk,
8319 - &pba_clk,
8320 - &pbb_clk,
8321 - &at32_pm_pclk,
8322 - &at32_intc0_pclk,
8323 - &hmatrix_clk,
8324 - &ebi_clk,
8325 - &hramc_clk,
8326 - &smc0_pclk,
8327 - &smc0_mck,
8328 - &pdc_hclk,
8329 - &pdc_pclk,
8330 - &dmaca0_hclk,
8331 - &pico_clk,
8332 - &pio0_mck,
8333 - &pio1_mck,
8334 - &pio2_mck,
8335 - &pio3_mck,
8336 - &pio4_mck,
8337 - &at32_systc0_pclk,
8338 - &atmel_usart0_usart,
8339 - &atmel_usart1_usart,
8340 - &atmel_usart2_usart,
8341 - &atmel_usart3_usart,
8342 - &macb0_hclk,
8343 - &macb0_pclk,
8344 - &macb1_hclk,
8345 - &macb1_pclk,
8346 - &atmel_spi0_spi_clk,
8347 - &atmel_spi1_spi_clk,
8348 - &atmel_twi0_pclk,
8349 - &atmel_mci0_pclk,
8350 - &atmel_lcdfb0_hck1,
8351 - &atmel_lcdfb0_pixclk,
8352 - &ssc0_pclk,
8353 - &ssc1_pclk,
8354 - &ssc2_pclk,
8355 - &usba0_hclk,
8356 - &usba0_pclk,
8357 - &atmel_ac97c0_pclk,
8358 - &abdac0_pclk,
8359 - &abdac0_sample_clk,
8360 - &gclk0,
8361 - &gclk1,
8362 - &gclk2,
8363 - &gclk3,
8364 - &gclk4,
8365 -};
8366 -unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
8367 -
8368 -void __init at32_portmux_init(void)
8369 -{
8370 - at32_init_pio(&pio0_device);
8371 - at32_init_pio(&pio1_device);
8372 - at32_init_pio(&pio2_device);
8373 - at32_init_pio(&pio3_device);
8374 - at32_init_pio(&pio4_device);
8375 -}
8376 -
8377 -void __init at32_clock_init(void)
8378 -{
8379 - u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
8380 - int i;
8381 -
8382 - if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
8383 - main_clock = &pll0;
8384 - cpu_clk.parent = &pll0;
8385 - } else {
8386 - main_clock = &osc0;
8387 - cpu_clk.parent = &osc0;
8388 - }
8389 -
8390 - if (pm_readl(PLL0) & PM_BIT(PLLOSC))
8391 - pll0.parent = &osc1;
8392 - if (pm_readl(PLL1) & PM_BIT(PLLOSC))
8393 - pll1.parent = &osc1;
8394 -
8395 - genclk_init_parent(&gclk0);
8396 - genclk_init_parent(&gclk1);
8397 - genclk_init_parent(&gclk2);
8398 - genclk_init_parent(&gclk3);
8399 - genclk_init_parent(&gclk4);
8400 - genclk_init_parent(&atmel_lcdfb0_pixclk);
8401 - genclk_init_parent(&abdac0_sample_clk);
8402 -
8403 - /*
8404 - * Turn on all clocks that have at least one user already, and
8405 - * turn off everything else. We only do this for module
8406 - * clocks, and even though it isn't particularly pretty to
8407 - * check the address of the mode function, it should do the
8408 - * trick...
8409 - */
8410 - for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
8411 - struct clk *clk = at32_clock_list[i];
8412 -
8413 - if (clk->users == 0)
8414 - continue;
8415 -
8416 - if (clk->mode == &cpu_clk_mode)
8417 - cpu_mask |= 1 << clk->index;
8418 - else if (clk->mode == &hsb_clk_mode)
8419 - hsb_mask |= 1 << clk->index;
8420 - else if (clk->mode == &pba_clk_mode)
8421 - pba_mask |= 1 << clk->index;
8422 - else if (clk->mode == &pbb_clk_mode)
8423 - pbb_mask |= 1 << clk->index;
8424 - }
8425 -
8426 - pm_writel(CPU_MASK, cpu_mask);
8427 - pm_writel(HSB_MASK, hsb_mask);
8428 - pm_writel(PBA_MASK, pba_mask);
8429 - pm_writel(PBB_MASK, pbb_mask);
8430 -}
8431 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/at32ap700x.c
8432 ===================================================================
8433 --- /dev/null
8434 +++ linux-2.6.24.7/arch/avr32/mach-at32ap/at32ap700x.c
8435 @@ -0,0 +1,1944 @@
8436 +/*
8437 + * Copyright (C) 2005-2006 Atmel Corporation
8438 + *
8439 + * This program is free software; you can redistribute it and/or modify
8440 + * it under the terms of the GNU General Public License version 2 as
8441 + * published by the Free Software Foundation.
8442 + */
8443 +#include <linux/clk.h>
8444 +#include <linux/fb.h>
8445 +#include <linux/init.h>
8446 +#include <linux/platform_device.h>
8447 +#include <linux/dma-mapping.h>
8448 +#include <linux/spi/spi.h>
8449 +#include <linux/usb/atmel_usba_udc.h>
8450 +
8451 +#include <asm/io.h>
8452 +#include <asm/irq.h>
8453 +
8454 +#include <asm/arch/at32ap700x.h>
8455 +#include <asm/arch/board.h>
8456 +#include <asm/arch/portmux.h>
8457 +
8458 +#include <video/atmel_lcdc.h>
8459 +
8460 +#include "clock.h"
8461 +#include "hmatrix.h"
8462 +#include "pio.h"
8463 +#include "pm.h"
8464 +
8465 +
8466 +#define PBMEM(base) \
8467 + { \
8468 + .start = base, \
8469 + .end = base + 0x3ff, \
8470 + .flags = IORESOURCE_MEM, \
8471 + }
8472 +#define IRQ(num) \
8473 + { \
8474 + .start = num, \
8475 + .end = num, \
8476 + .flags = IORESOURCE_IRQ, \
8477 + }
8478 +#define NAMED_IRQ(num, _name) \
8479 + { \
8480 + .start = num, \
8481 + .end = num, \
8482 + .name = _name, \
8483 + .flags = IORESOURCE_IRQ, \
8484 + }
8485 +
8486 +/* REVISIT these assume *every* device supports DMA, but several
8487 + * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
8488 + */
8489 +#define DEFINE_DEV(_name, _id) \
8490 +static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
8491 +static struct platform_device _name##_id##_device = { \
8492 + .name = #_name, \
8493 + .id = _id, \
8494 + .dev = { \
8495 + .dma_mask = &_name##_id##_dma_mask, \
8496 + .coherent_dma_mask = DMA_32BIT_MASK, \
8497 + }, \
8498 + .resource = _name##_id##_resource, \
8499 + .num_resources = ARRAY_SIZE(_name##_id##_resource), \
8500 +}
8501 +#define DEFINE_DEV_DATA(_name, _id) \
8502 +static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
8503 +static struct platform_device _name##_id##_device = { \
8504 + .name = #_name, \
8505 + .id = _id, \
8506 + .dev = { \
8507 + .dma_mask = &_name##_id##_dma_mask, \
8508 + .platform_data = &_name##_id##_data, \
8509 + .coherent_dma_mask = DMA_32BIT_MASK, \
8510 + }, \
8511 + .resource = _name##_id##_resource, \
8512 + .num_resources = ARRAY_SIZE(_name##_id##_resource), \
8513 +}
8514 +
8515 +#define select_peripheral(pin, periph, flags) \
8516 + at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
8517 +
8518 +#define DEV_CLK(_name, devname, bus, _index) \
8519 +static struct clk devname##_##_name = { \
8520 + .name = #_name, \
8521 + .dev = &devname##_device.dev, \
8522 + .parent = &bus##_clk, \
8523 + .mode = bus##_clk_mode, \
8524 + .get_rate = bus##_clk_get_rate, \
8525 + .index = _index, \
8526 +}
8527 +
8528 +static DEFINE_SPINLOCK(pm_lock);
8529 +
8530 +unsigned long at32ap7000_osc_rates[3] = {
8531 + [0] = 32768,
8532 + /* FIXME: these are ATSTK1002-specific */
8533 + [1] = 20000000,
8534 + [2] = 12000000,
8535 +};
8536 +
8537 +static unsigned long osc_get_rate(struct clk *clk)
8538 +{
8539 + return at32ap7000_osc_rates[clk->index];
8540 +}
8541 +
8542 +static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
8543 +{
8544 + unsigned long div, mul, rate;
8545 +
8546 + if (!(control & PM_BIT(PLLEN)))
8547 + return 0;
8548 +
8549 + div = PM_BFEXT(PLLDIV, control) + 1;
8550 + mul = PM_BFEXT(PLLMUL, control) + 1;
8551 +
8552 + rate = clk->parent->get_rate(clk->parent);
8553 + rate = (rate + div / 2) / div;
8554 + rate *= mul;
8555 +
8556 + return rate;
8557 +}
8558 +
8559 +static unsigned long pll0_get_rate(struct clk *clk)
8560 +{
8561 + u32 control;
8562 +
8563 + control = pm_readl(PLL0);
8564 +
8565 + return pll_get_rate(clk, control);
8566 +}
8567 +
8568 +static unsigned long pll1_get_rate(struct clk *clk)
8569 +{
8570 + u32 control;
8571 +
8572 + control = pm_readl(PLL1);
8573 +
8574 + return pll_get_rate(clk, control);
8575 +}
8576 +
8577 +/*
8578 + * The AT32AP7000 has five primary clock sources: One 32kHz
8579 + * oscillator, two crystal oscillators and two PLLs.
8580 + */
8581 +static struct clk osc32k = {
8582 + .name = "osc32k",
8583 + .get_rate = osc_get_rate,
8584 + .users = 1,
8585 + .index = 0,
8586 +};
8587 +static struct clk osc0 = {
8588 + .name = "osc0",
8589 + .get_rate = osc_get_rate,
8590 + .users = 1,
8591 + .index = 1,
8592 +};
8593 +static struct clk osc1 = {
8594 + .name = "osc1",
8595 + .get_rate = osc_get_rate,
8596 + .index = 2,
8597 +};
8598 +static struct clk pll0 = {
8599 + .name = "pll0",
8600 + .get_rate = pll0_get_rate,
8601 + .parent = &osc0,
8602 +};
8603 +static struct clk pll1 = {
8604 + .name = "pll1",
8605 + .get_rate = pll1_get_rate,
8606 + .parent = &osc0,
8607 +};
8608 +
8609 +/*
8610 + * The main clock can be either osc0 or pll0. The boot loader may
8611 + * have chosen one for us, so we don't really know which one until we
8612 + * have a look at the SM.
8613 + */
8614 +static struct clk *main_clock;
8615 +
8616 +/*
8617 + * Synchronous clocks are generated from the main clock. The clocks
8618 + * must satisfy the constraint
8619 + * fCPU >= fHSB >= fPB
8620 + * i.e. each clock must not be faster than its parent.
8621 + */
8622 +static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
8623 +{
8624 + return main_clock->get_rate(main_clock) >> shift;
8625 +};
8626 +
8627 +static void cpu_clk_mode(struct clk *clk, int enabled)
8628 +{
8629 + unsigned long flags;
8630 + u32 mask;
8631 +
8632 + spin_lock_irqsave(&pm_lock, flags);
8633 + mask = pm_readl(CPU_MASK);
8634 + if (enabled)
8635 + mask |= 1 << clk->index;
8636 + else
8637 + mask &= ~(1 << clk->index);
8638 + pm_writel(CPU_MASK, mask);
8639 + spin_unlock_irqrestore(&pm_lock, flags);
8640 +}
8641 +
8642 +static unsigned long cpu_clk_get_rate(struct clk *clk)
8643 +{
8644 + unsigned long cksel, shift = 0;
8645 +
8646 + cksel = pm_readl(CKSEL);
8647 + if (cksel & PM_BIT(CPUDIV))
8648 + shift = PM_BFEXT(CPUSEL, cksel) + 1;
8649 +
8650 + return bus_clk_get_rate(clk, shift);
8651 +}
8652 +
8653 +static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
8654 +{
8655 + u32 control;
8656 + unsigned long parent_rate, child_div, actual_rate, div;
8657 +
8658 + parent_rate = clk->parent->get_rate(clk->parent);
8659 + control = pm_readl(CKSEL);
8660 +
8661 + if (control & PM_BIT(HSBDIV))
8662 + child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
8663 + else
8664 + child_div = 1;
8665 +
8666 + if (rate > 3 * (parent_rate / 4) || child_div == 1) {
8667 + actual_rate = parent_rate;
8668 + control &= ~PM_BIT(CPUDIV);
8669 + } else {
8670 + unsigned int cpusel;
8671 + div = (parent_rate + rate / 2) / rate;
8672 + if (div > child_div)
8673 + div = child_div;
8674 + cpusel = (div > 1) ? (fls(div) - 2) : 0;
8675 + control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
8676 + actual_rate = parent_rate / (1 << (cpusel + 1));
8677 + }
8678 +
8679 + pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
8680 + clk->name, rate, actual_rate);
8681 +
8682 + if (apply)
8683 + pm_writel(CKSEL, control);
8684 +
8685 + return actual_rate;
8686 +}
8687 +
8688 +static void hsb_clk_mode(struct clk *clk, int enabled)
8689 +{
8690 + unsigned long flags;
8691 + u32 mask;
8692 +
8693 + spin_lock_irqsave(&pm_lock, flags);
8694 + mask = pm_readl(HSB_MASK);
8695 + if (enabled)
8696 + mask |= 1 << clk->index;
8697 + else
8698 + mask &= ~(1 << clk->index);
8699 + pm_writel(HSB_MASK, mask);
8700 + spin_unlock_irqrestore(&pm_lock, flags);
8701 +}
8702 +
8703 +static unsigned long hsb_clk_get_rate(struct clk *clk)
8704 +{
8705 + unsigned long cksel, shift = 0;
8706 +
8707 + cksel = pm_readl(CKSEL);
8708 + if (cksel & PM_BIT(HSBDIV))
8709 + shift = PM_BFEXT(HSBSEL, cksel) + 1;
8710 +
8711 + return bus_clk_get_rate(clk, shift);
8712 +}
8713 +
8714 +static void pba_clk_mode(struct clk *clk, int enabled)
8715 +{
8716 + unsigned long flags;
8717 + u32 mask;
8718 +
8719 + spin_lock_irqsave(&pm_lock, flags);
8720 + mask = pm_readl(PBA_MASK);
8721 + if (enabled)
8722 + mask |= 1 << clk->index;
8723 + else
8724 + mask &= ~(1 << clk->index);
8725 + pm_writel(PBA_MASK, mask);
8726 + spin_unlock_irqrestore(&pm_lock, flags);
8727 +}
8728 +
8729 +static unsigned long pba_clk_get_rate(struct clk *clk)
8730 +{
8731 + unsigned long cksel, shift = 0;
8732 +
8733 + cksel = pm_readl(CKSEL);
8734 + if (cksel & PM_BIT(PBADIV))
8735 + shift = PM_BFEXT(PBASEL, cksel) + 1;
8736 +
8737 + return bus_clk_get_rate(clk, shift);
8738 +}
8739 +
8740 +static void pbb_clk_mode(struct clk *clk, int enabled)
8741 +{
8742 + unsigned long flags;
8743 + u32 mask;
8744 +
8745 + spin_lock_irqsave(&pm_lock, flags);
8746 + mask = pm_readl(PBB_MASK);
8747 + if (enabled)
8748 + mask |= 1 << clk->index;
8749 + else
8750 + mask &= ~(1 << clk->index);
8751 + pm_writel(PBB_MASK, mask);
8752 + spin_unlock_irqrestore(&pm_lock, flags);
8753 +}
8754 +
8755 +static unsigned long pbb_clk_get_rate(struct clk *clk)
8756 +{
8757 + unsigned long cksel, shift = 0;
8758 +
8759 + cksel = pm_readl(CKSEL);
8760 + if (cksel & PM_BIT(PBBDIV))
8761 + shift = PM_BFEXT(PBBSEL, cksel) + 1;
8762 +
8763 + return bus_clk_get_rate(clk, shift);
8764 +}
8765 +
8766 +static struct clk cpu_clk = {
8767 + .name = "cpu",
8768 + .get_rate = cpu_clk_get_rate,
8769 + .set_rate = cpu_clk_set_rate,
8770 + .users = 1,
8771 +};
8772 +static struct clk hsb_clk = {
8773 + .name = "hsb",
8774 + .parent = &cpu_clk,
8775 + .get_rate = hsb_clk_get_rate,
8776 +};
8777 +static struct clk pba_clk = {
8778 + .name = "pba",
8779 + .parent = &hsb_clk,
8780 + .mode = hsb_clk_mode,
8781 + .get_rate = pba_clk_get_rate,
8782 + .index = 1,
8783 +};
8784 +static struct clk pbb_clk = {
8785 + .name = "pbb",
8786 + .parent = &hsb_clk,
8787 + .mode = hsb_clk_mode,
8788 + .get_rate = pbb_clk_get_rate,
8789 + .users = 1,
8790 + .index = 2,
8791 +};
8792 +
8793 +/* --------------------------------------------------------------------
8794 + * Generic Clock operations
8795 + * -------------------------------------------------------------------- */
8796 +
8797 +static void genclk_mode(struct clk *clk, int enabled)
8798 +{
8799 + u32 control;
8800 +
8801 + control = pm_readl(GCCTRL(clk->index));
8802 + if (enabled)
8803 + control |= PM_BIT(CEN);
8804 + else
8805 + control &= ~PM_BIT(CEN);
8806 + pm_writel(GCCTRL(clk->index), control);
8807 +}
8808 +
8809 +static unsigned long genclk_get_rate(struct clk *clk)
8810 +{
8811 + u32 control;
8812 + unsigned long div = 1;
8813 +
8814 + control = pm_readl(GCCTRL(clk->index));
8815 + if (control & PM_BIT(DIVEN))
8816 + div = 2 * (PM_BFEXT(DIV, control) + 1);
8817 +
8818 + return clk->parent->get_rate(clk->parent) / div;
8819 +}
8820 +
8821 +static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
8822 +{
8823 + u32 control;
8824 + unsigned long parent_rate, actual_rate, div;
8825 +
8826 + parent_rate = clk->parent->get_rate(clk->parent);
8827 + control = pm_readl(GCCTRL(clk->index));
8828 +
8829 + if (rate > 3 * parent_rate / 4) {
8830 + actual_rate = parent_rate;
8831 + control &= ~PM_BIT(DIVEN);
8832 + } else {
8833 + div = (parent_rate + rate) / (2 * rate) - 1;
8834 + control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
8835 + actual_rate = parent_rate / (2 * (div + 1));
8836 + }
8837 +
8838 + dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
8839 + clk->name, rate, actual_rate);
8840 +
8841 + if (apply)
8842 + pm_writel(GCCTRL(clk->index), control);
8843 +
8844 + return actual_rate;
8845 +}
8846 +
8847 +int genclk_set_parent(struct clk *clk, struct clk *parent)
8848 +{
8849 + u32 control;
8850 +
8851 + dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
8852 + clk->name, parent->name, clk->parent->name);
8853 +
8854 + control = pm_readl(GCCTRL(clk->index));
8855 +
8856 + if (parent == &osc1 || parent == &pll1)
8857 + control |= PM_BIT(OSCSEL);
8858 + else if (parent == &osc0 || parent == &pll0)
8859 + control &= ~PM_BIT(OSCSEL);
8860 + else
8861 + return -EINVAL;
8862 +
8863 + if (parent == &pll0 || parent == &pll1)
8864 + control |= PM_BIT(PLLSEL);
8865 + else
8866 + control &= ~PM_BIT(PLLSEL);
8867 +
8868 + pm_writel(GCCTRL(clk->index), control);
8869 + clk->parent = parent;
8870 +
8871 + return 0;
8872 +}
8873 +
8874 +static void __init genclk_init_parent(struct clk *clk)
8875 +{
8876 + u32 control;
8877 + struct clk *parent;
8878 +
8879 + BUG_ON(clk->index > 7);
8880 +
8881 + control = pm_readl(GCCTRL(clk->index));
8882 + if (control & PM_BIT(OSCSEL))
8883 + parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
8884 + else
8885 + parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
8886 +
8887 + clk->parent = parent;
8888 +}
8889 +
8890 +/* --------------------------------------------------------------------
8891 + * System peripherals
8892 + * -------------------------------------------------------------------- */
8893 +static struct resource at32_pm0_resource[] = {
8894 + {
8895 + .start = 0xfff00000,
8896 + .end = 0xfff0007f,
8897 + .flags = IORESOURCE_MEM,
8898 + },
8899 + IRQ(20),
8900 +};
8901 +
8902 +static struct resource at32ap700x_rtc0_resource[] = {
8903 + {
8904 + .start = 0xfff00080,
8905 + .end = 0xfff000af,
8906 + .flags = IORESOURCE_MEM,
8907 + },
8908 + IRQ(21),
8909 +};
8910 +
8911 +static struct resource at32_wdt0_resource[] = {
8912 + {
8913 + .start = 0xfff000b0,
8914 + .end = 0xfff000cf,
8915 + .flags = IORESOURCE_MEM,
8916 + },
8917 +};
8918 +
8919 +static struct resource at32_eic0_resource[] = {
8920 + {
8921 + .start = 0xfff00100,
8922 + .end = 0xfff0013f,
8923 + .flags = IORESOURCE_MEM,
8924 + },
8925 + IRQ(19),
8926 +};
8927 +
8928 +DEFINE_DEV(at32_pm, 0);
8929 +DEFINE_DEV(at32ap700x_rtc, 0);
8930 +DEFINE_DEV(at32_wdt, 0);
8931 +DEFINE_DEV(at32_eic, 0);
8932 +
8933 +/*
8934 + * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
8935 + * is always running.
8936 + */
8937 +static struct clk at32_pm_pclk = {
8938 + .name = "pclk",
8939 + .dev = &at32_pm0_device.dev,
8940 + .parent = &pbb_clk,
8941 + .mode = pbb_clk_mode,
8942 + .get_rate = pbb_clk_get_rate,
8943 + .users = 1,
8944 + .index = 0,
8945 +};
8946 +
8947 +static struct resource intc0_resource[] = {
8948 + PBMEM(0xfff00400),
8949 +};
8950 +struct platform_device at32_intc0_device = {
8951 + .name = "intc",
8952 + .id = 0,
8953 + .resource = intc0_resource,
8954 + .num_resources = ARRAY_SIZE(intc0_resource),
8955 +};
8956 +DEV_CLK(pclk, at32_intc0, pbb, 1);
8957 +
8958 +static struct clk ebi_clk = {
8959 + .name = "ebi",
8960 + .parent = &hsb_clk,
8961 + .mode = hsb_clk_mode,
8962 + .get_rate = hsb_clk_get_rate,
8963 + .users = 1,
8964 +};
8965 +static struct clk hramc_clk = {
8966 + .name = "hramc",
8967 + .parent = &hsb_clk,
8968 + .mode = hsb_clk_mode,
8969 + .get_rate = hsb_clk_get_rate,
8970 + .users = 1,
8971 + .index = 3,
8972 +};
8973 +
8974 +static struct resource smc0_resource[] = {
8975 + PBMEM(0xfff03400),
8976 +};
8977 +DEFINE_DEV(smc, 0);
8978 +DEV_CLK(pclk, smc0, pbb, 13);
8979 +DEV_CLK(mck, smc0, hsb, 0);
8980 +
8981 +static struct platform_device pdc_device = {
8982 + .name = "pdc",
8983 + .id = 0,
8984 +};
8985 +DEV_CLK(hclk, pdc, hsb, 4);
8986 +DEV_CLK(pclk, pdc, pba, 16);
8987 +
8988 +static struct clk pico_clk = {
8989 + .name = "pico",
8990 + .parent = &cpu_clk,
8991 + .mode = cpu_clk_mode,
8992 + .get_rate = cpu_clk_get_rate,
8993 + .users = 1,
8994 +};
8995 +
8996 +static struct resource dmaca0_resource[] = {
8997 + {
8998 + .start = 0xff200000,
8999 + .end = 0xff20ffff,
9000 + .flags = IORESOURCE_MEM,
9001 + },
9002 + IRQ(2),
9003 +};
9004 +DEFINE_DEV(dmaca, 0);
9005 +DEV_CLK(hclk, dmaca0, hsb, 10);
9006 +
9007 +/* --------------------------------------------------------------------
9008 + * HMATRIX
9009 + * -------------------------------------------------------------------- */
9010 +
9011 +static struct clk hmatrix_clk = {
9012 + .name = "hmatrix_clk",
9013 + .parent = &pbb_clk,
9014 + .mode = pbb_clk_mode,
9015 + .get_rate = pbb_clk_get_rate,
9016 + .index = 2,
9017 + .users = 1,
9018 +};
9019 +#define HMATRIX_BASE ((void __iomem *)0xfff00800)
9020 +
9021 +#define hmatrix_readl(reg) \
9022 + __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
9023 +#define hmatrix_writel(reg,value) \
9024 + __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
9025 +
9026 +/*
9027 + * Set bits in the HMATRIX Special Function Register (SFR) used by the
9028 + * External Bus Interface (EBI). This can be used to enable special
9029 + * features like CompactFlash support, NAND Flash support, etc. on
9030 + * certain chipselects.
9031 + */
9032 +static inline void set_ebi_sfr_bits(u32 mask)
9033 +{
9034 + u32 sfr;
9035 +
9036 + clk_enable(&hmatrix_clk);
9037 + sfr = hmatrix_readl(SFR4);
9038 + sfr |= mask;
9039 + hmatrix_writel(SFR4, sfr);
9040 + clk_disable(&hmatrix_clk);
9041 +}
9042 +
9043 +/* --------------------------------------------------------------------
9044 + * Timer/Counter (TC)
9045 + * -------------------------------------------------------------------- */
9046 +
9047 +static struct resource at32_tcb0_resource[] = {
9048 + PBMEM(0xfff00c00),
9049 + IRQ(22),
9050 +};
9051 +static struct platform_device at32_tcb0_device = {
9052 + .name = "atmel_tcb",
9053 + .id = 0,
9054 + .resource = at32_tcb0_resource,
9055 + .num_resources = ARRAY_SIZE(at32_tcb0_resource),
9056 +};
9057 +DEV_CLK(t0_clk, at32_tcb0, pbb, 3);
9058 +
9059 +static struct resource at32_tcb1_resource[] = {
9060 + PBMEM(0xfff01000),
9061 + IRQ(23),
9062 +};
9063 +static struct platform_device at32_tcb1_device = {
9064 + .name = "atmel_tcb",
9065 + .id = 1,
9066 + .resource = at32_tcb1_resource,
9067 + .num_resources = ARRAY_SIZE(at32_tcb1_resource),
9068 +};
9069 +DEV_CLK(t0_clk, at32_tcb1, pbb, 4);
9070 +
9071 +/* --------------------------------------------------------------------
9072 + * PIO
9073 + * -------------------------------------------------------------------- */
9074 +
9075 +static struct resource pio0_resource[] = {
9076 + PBMEM(0xffe02800),
9077 + IRQ(13),
9078 +};
9079 +DEFINE_DEV(pio, 0);
9080 +DEV_CLK(mck, pio0, pba, 10);
9081 +
9082 +static struct resource pio1_resource[] = {
9083 + PBMEM(0xffe02c00),
9084 + IRQ(14),
9085 +};
9086 +DEFINE_DEV(pio, 1);
9087 +DEV_CLK(mck, pio1, pba, 11);
9088 +
9089 +static struct resource pio2_resource[] = {
9090 + PBMEM(0xffe03000),
9091 + IRQ(15),
9092 +};
9093 +DEFINE_DEV(pio, 2);
9094 +DEV_CLK(mck, pio2, pba, 12);
9095 +
9096 +static struct resource pio3_resource[] = {
9097 + PBMEM(0xffe03400),
9098 + IRQ(16),
9099 +};
9100 +DEFINE_DEV(pio, 3);
9101 +DEV_CLK(mck, pio3, pba, 13);
9102 +
9103 +static struct resource pio4_resource[] = {
9104 + PBMEM(0xffe03800),
9105 + IRQ(17),
9106 +};
9107 +DEFINE_DEV(pio, 4);
9108 +DEV_CLK(mck, pio4, pba, 14);
9109 +
9110 +void __init at32_add_system_devices(void)
9111 +{
9112 + platform_device_register(&at32_pm0_device);
9113 + platform_device_register(&at32_intc0_device);
9114 + platform_device_register(&at32ap700x_rtc0_device);
9115 + platform_device_register(&at32_wdt0_device);
9116 + platform_device_register(&at32_eic0_device);
9117 + platform_device_register(&smc0_device);
9118 + platform_device_register(&pdc_device);
9119 + platform_device_register(&dmaca0_device);
9120 +
9121 + platform_device_register(&at32_tcb0_device);
9122 + platform_device_register(&at32_tcb1_device);
9123 +
9124 + platform_device_register(&pio0_device);
9125 + platform_device_register(&pio1_device);
9126 + platform_device_register(&pio2_device);
9127 + platform_device_register(&pio3_device);
9128 + platform_device_register(&pio4_device);
9129 +}
9130 +
9131 +/* --------------------------------------------------------------------
9132 + * PSIF
9133 + * -------------------------------------------------------------------- */
9134 +static struct resource atmel_psif0_resource[] __initdata = {
9135 + {
9136 + .start = 0xffe03c00,
9137 + .end = 0xffe03cff,
9138 + .flags = IORESOURCE_MEM,
9139 + },
9140 + IRQ(18),
9141 +};
9142 +static struct clk atmel_psif0_pclk = {
9143 + .name = "pclk",
9144 + .parent = &pba_clk,
9145 + .mode = pba_clk_mode,
9146 + .get_rate = pba_clk_get_rate,
9147 + .index = 15,
9148 +};
9149 +
9150 +static struct resource atmel_psif1_resource[] __initdata = {
9151 + {
9152 + .start = 0xffe03d00,
9153 + .end = 0xffe03dff,
9154 + .flags = IORESOURCE_MEM,
9155 + },
9156 + IRQ(18),
9157 +};
9158 +static struct clk atmel_psif1_pclk = {
9159 + .name = "pclk",
9160 + .parent = &pba_clk,
9161 + .mode = pba_clk_mode,
9162 + .get_rate = pba_clk_get_rate,
9163 + .index = 15,
9164 +};
9165 +
9166 +struct platform_device *__init at32_add_device_psif(unsigned int id)
9167 +{
9168 + struct platform_device *pdev;
9169 +
9170 + if (!(id == 0 || id == 1))
9171 + return NULL;
9172 +
9173 + pdev = platform_device_alloc("atmel_psif", id);
9174 + if (!pdev)
9175 + return NULL;
9176 +
9177 + switch (id) {
9178 + case 0:
9179 + if (platform_device_add_resources(pdev, atmel_psif0_resource,
9180 + ARRAY_SIZE(atmel_psif0_resource)))
9181 + goto err_add_resources;
9182 + atmel_psif0_pclk.dev = &pdev->dev;
9183 + select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */
9184 + select_peripheral(PA(9), PERIPH_A, 0); /* DATA */
9185 + break;
9186 + case 1:
9187 + if (platform_device_add_resources(pdev, atmel_psif1_resource,
9188 + ARRAY_SIZE(atmel_psif1_resource)))
9189 + goto err_add_resources;
9190 + atmel_psif1_pclk.dev = &pdev->dev;
9191 + select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */
9192 + select_peripheral(PB(12), PERIPH_A, 0); /* DATA */
9193 + break;
9194 + default:
9195 + return NULL;
9196 + }
9197 +
9198 + platform_device_add(pdev);
9199 + return pdev;
9200 +
9201 +err_add_resources:
9202 + platform_device_put(pdev);
9203 + return NULL;
9204 +}
9205 +
9206 +/* --------------------------------------------------------------------
9207 + * USART
9208 + * -------------------------------------------------------------------- */
9209 +
9210 +static struct atmel_uart_data atmel_usart0_data = {
9211 + .use_dma_tx = 1,
9212 + .use_dma_rx = 1,
9213 +};
9214 +static struct resource atmel_usart0_resource[] = {
9215 + PBMEM(0xffe00c00),
9216 + IRQ(6),
9217 +};
9218 +DEFINE_DEV_DATA(atmel_usart, 0);
9219 +DEV_CLK(usart, atmel_usart0, pba, 3);
9220 +
9221 +static struct atmel_uart_data atmel_usart1_data = {
9222 + .use_dma_tx = 1,
9223 + .use_dma_rx = 1,
9224 +};
9225 +static struct resource atmel_usart1_resource[] = {
9226 + PBMEM(0xffe01000),
9227 + IRQ(7),
9228 +};
9229 +DEFINE_DEV_DATA(atmel_usart, 1);
9230 +DEV_CLK(usart, atmel_usart1, pba, 4);
9231 +
9232 +static struct atmel_uart_data atmel_usart2_data = {
9233 + .use_dma_tx = 1,
9234 + .use_dma_rx = 1,
9235 +};
9236 +static struct resource atmel_usart2_resource[] = {
9237 + PBMEM(0xffe01400),
9238 + IRQ(8),
9239 +};
9240 +DEFINE_DEV_DATA(atmel_usart, 2);
9241 +DEV_CLK(usart, atmel_usart2, pba, 5);
9242 +
9243 +static struct atmel_uart_data atmel_usart3_data = {
9244 + .use_dma_tx = 1,
9245 + .use_dma_rx = 1,
9246 +};
9247 +static struct resource atmel_usart3_resource[] = {
9248 + PBMEM(0xffe01800),
9249 + IRQ(9),
9250 +};
9251 +DEFINE_DEV_DATA(atmel_usart, 3);
9252 +DEV_CLK(usart, atmel_usart3, pba, 6);
9253 +
9254 +static inline void configure_usart0_pins(void)
9255 +{
9256 + select_peripheral(PA(8), PERIPH_B, 0); /* RXD */
9257 + select_peripheral(PA(9), PERIPH_B, 0); /* TXD */
9258 +}
9259 +
9260 +static inline void configure_usart1_pins(void)
9261 +{
9262 + select_peripheral(PA(17), PERIPH_A, 0); /* RXD */
9263 + select_peripheral(PA(18), PERIPH_A, 0); /* TXD */
9264 +}
9265 +
9266 +static inline void configure_usart2_pins(void)
9267 +{
9268 + select_peripheral(PB(26), PERIPH_B, 0); /* RXD */
9269 + select_peripheral(PB(27), PERIPH_B, 0); /* TXD */
9270 +}
9271 +
9272 +static inline void configure_usart3_pins(void)
9273 +{
9274 + select_peripheral(PB(18), PERIPH_B, 0); /* RXD */
9275 + select_peripheral(PB(17), PERIPH_B, 0); /* TXD */
9276 +}
9277 +
9278 +static struct platform_device *__initdata at32_usarts[4];
9279 +
9280 +void __init at32_map_usart(unsigned int hw_id, unsigned int line)
9281 +{
9282 + struct platform_device *pdev;
9283 +
9284 + switch (hw_id) {
9285 + case 0:
9286 + pdev = &atmel_usart0_device;
9287 + configure_usart0_pins();
9288 + break;
9289 + case 1:
9290 + pdev = &atmel_usart1_device;
9291 + configure_usart1_pins();
9292 + break;
9293 + case 2:
9294 + pdev = &atmel_usart2_device;
9295 + configure_usart2_pins();
9296 + break;
9297 + case 3:
9298 + pdev = &atmel_usart3_device;
9299 + configure_usart3_pins();
9300 + break;
9301 + default:
9302 + return;
9303 + }
9304 +
9305 + if (PXSEG(pdev->resource[0].start) == P4SEG) {
9306 + /* Addresses in the P4 segment are permanently mapped 1:1 */
9307 + struct atmel_uart_data *data = pdev->dev.platform_data;
9308 + data->regs = (void __iomem *)pdev->resource[0].start;
9309 + }
9310 +
9311 + pdev->id = line;
9312 + at32_usarts[line] = pdev;
9313 +}
9314 +
9315 +struct platform_device *__init at32_add_device_usart(unsigned int id)
9316 +{
9317 + platform_device_register(at32_usarts[id]);
9318 + return at32_usarts[id];
9319 +}
9320 +
9321 +struct platform_device *atmel_default_console_device;
9322 +
9323 +void __init at32_setup_serial_console(unsigned int usart_id)
9324 +{
9325 + atmel_default_console_device = at32_usarts[usart_id];
9326 +}
9327 +
9328 +/* --------------------------------------------------------------------
9329 + * Ethernet
9330 + * -------------------------------------------------------------------- */
9331 +
9332 +#ifdef CONFIG_CPU_AT32AP7000
9333 +static struct eth_platform_data macb0_data;
9334 +static struct resource macb0_resource[] = {
9335 + PBMEM(0xfff01800),
9336 + IRQ(25),
9337 +};
9338 +DEFINE_DEV_DATA(macb, 0);
9339 +DEV_CLK(hclk, macb0, hsb, 8);
9340 +DEV_CLK(pclk, macb0, pbb, 6);
9341 +
9342 +static struct eth_platform_data macb1_data;
9343 +static struct resource macb1_resource[] = {
9344 + PBMEM(0xfff01c00),
9345 + IRQ(26),
9346 +};
9347 +DEFINE_DEV_DATA(macb, 1);
9348 +DEV_CLK(hclk, macb1, hsb, 9);
9349 +DEV_CLK(pclk, macb1, pbb, 7);
9350 +
9351 +struct platform_device *__init
9352 +at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
9353 +{
9354 + struct platform_device *pdev;
9355 +
9356 + switch (id) {
9357 + case 0:
9358 + pdev = &macb0_device;
9359 +
9360 + select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */
9361 + select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */
9362 + select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */
9363 + select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */
9364 + select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */
9365 + select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */
9366 + select_peripheral(PC(13), PERIPH_A, 0); /* RXER */
9367 + select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */
9368 + select_peripheral(PC(16), PERIPH_A, 0); /* MDC */
9369 + select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */
9370 +
9371 + if (!data->is_rmii) {
9372 + select_peripheral(PC(0), PERIPH_A, 0); /* COL */
9373 + select_peripheral(PC(1), PERIPH_A, 0); /* CRS */
9374 + select_peripheral(PC(2), PERIPH_A, 0); /* TXER */
9375 + select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */
9376 + select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */
9377 + select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */
9378 + select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */
9379 + select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */
9380 + select_peripheral(PC(18), PERIPH_A, 0); /* SPD */
9381 + }
9382 + break;
9383 +
9384 + case 1:
9385 + pdev = &macb1_device;
9386 +
9387 + select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */
9388 + select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */
9389 + select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */
9390 + select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */
9391 + select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */
9392 + select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */
9393 + select_peripheral(PD(5), PERIPH_B, 0); /* RXER */
9394 + select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */
9395 + select_peripheral(PD(3), PERIPH_B, 0); /* MDC */
9396 + select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */
9397 +
9398 + if (!data->is_rmii) {
9399 + select_peripheral(PC(19), PERIPH_B, 0); /* COL */
9400 + select_peripheral(PC(23), PERIPH_B, 0); /* CRS */
9401 + select_peripheral(PC(26), PERIPH_B, 0); /* TXER */
9402 + select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */
9403 + select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */
9404 + select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */
9405 + select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */
9406 + select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */
9407 + select_peripheral(PD(15), PERIPH_B, 0); /* SPD */
9408 + }
9409 + break;
9410 +
9411 + default:
9412 + return NULL;
9413 + }
9414 +
9415 + memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
9416 + platform_device_register(pdev);
9417 +
9418 + return pdev;
9419 +}
9420 +#endif
9421 +
9422 +/* --------------------------------------------------------------------
9423 + * SPI
9424 + * -------------------------------------------------------------------- */
9425 +static struct resource atmel_spi0_resource[] = {
9426 + PBMEM(0xffe00000),
9427 + IRQ(3),
9428 +};
9429 +DEFINE_DEV(atmel_spi, 0);
9430 +DEV_CLK(spi_clk, atmel_spi0, pba, 0);
9431 +
9432 +static struct resource atmel_spi1_resource[] = {
9433 + PBMEM(0xffe00400),
9434 + IRQ(4),
9435 +};
9436 +DEFINE_DEV(atmel_spi, 1);
9437 +DEV_CLK(spi_clk, atmel_spi1, pba, 1);
9438 +
9439 +static void __init
9440 +at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
9441 + unsigned int n, const u8 *pins)
9442 +{
9443 + unsigned int pin, mode;
9444 +
9445 + for (; n; n--, b++) {
9446 + b->bus_num = bus_num;
9447 + if (b->chip_select >= 4)
9448 + continue;
9449 + pin = (unsigned)b->controller_data;
9450 + if (!pin) {
9451 + pin = pins[b->chip_select];
9452 + b->controller_data = (void *)pin;
9453 + }
9454 + mode = AT32_GPIOF_OUTPUT;
9455 + if (!(b->mode & SPI_CS_HIGH))
9456 + mode |= AT32_GPIOF_HIGH;
9457 + at32_select_gpio(pin, mode);
9458 + }
9459 +}
9460 +
9461 +struct platform_device *__init
9462 +at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
9463 +{
9464 + /*
9465 + * Manage the chipselects as GPIOs, normally using the same pins
9466 + * the SPI controller expects; but boards can use other pins.
9467 + */
9468 + static u8 __initdata spi0_pins[] =
9469 + { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
9470 + GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
9471 + static u8 __initdata spi1_pins[] =
9472 + { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
9473 + GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
9474 + struct platform_device *pdev;
9475 +
9476 + switch (id) {
9477 + case 0:
9478 + pdev = &atmel_spi0_device;
9479 + select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
9480 + select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
9481 + select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
9482 + at32_spi_setup_slaves(0, b, n, spi0_pins);
9483 + break;
9484 +
9485 + case 1:
9486 + pdev = &atmel_spi1_device;
9487 + select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
9488 + select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
9489 + select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
9490 + at32_spi_setup_slaves(1, b, n, spi1_pins);
9491 + break;
9492 +
9493 + default:
9494 + return NULL;
9495 + }
9496 +
9497 + spi_register_board_info(b, n);
9498 + platform_device_register(pdev);
9499 + return pdev;
9500 +}
9501 +
9502 +/* --------------------------------------------------------------------
9503 + * TWI
9504 + * -------------------------------------------------------------------- */
9505 +static struct resource atmel_twi0_resource[] __initdata = {
9506 + PBMEM(0xffe00800),
9507 + IRQ(5),
9508 +};
9509 +static struct clk atmel_twi0_pclk = {
9510 + .name = "twi_pclk",
9511 + .parent = &pba_clk,
9512 + .mode = pba_clk_mode,
9513 + .get_rate = pba_clk_get_rate,
9514 + .index = 2,
9515 +};
9516 +
9517 +struct platform_device *__init at32_add_device_twi(unsigned int id,
9518 + struct i2c_board_info *b,
9519 + unsigned int n)
9520 +{
9521 + struct platform_device *pdev;
9522 +
9523 + if (id != 0)
9524 + return NULL;
9525 +
9526 + pdev = platform_device_alloc("atmel_twi", id);
9527 + if (!pdev)
9528 + return NULL;
9529 +
9530 + if (platform_device_add_resources(pdev, atmel_twi0_resource,
9531 + ARRAY_SIZE(atmel_twi0_resource)))
9532 + goto err_add_resources;
9533 +
9534 + select_peripheral(PA(6), PERIPH_A, 0); /* SDA */
9535 + select_peripheral(PA(7), PERIPH_A, 0); /* SDL */
9536 +
9537 + atmel_twi0_pclk.dev = &pdev->dev;
9538 +
9539 + if (b)
9540 + i2c_register_board_info(id, b, n);
9541 +
9542 + platform_device_add(pdev);
9543 + return pdev;
9544 +
9545 +err_add_resources:
9546 + platform_device_put(pdev);
9547 + return NULL;
9548 +}
9549 +
9550 +/* --------------------------------------------------------------------
9551 + * MMC
9552 + * -------------------------------------------------------------------- */
9553 +static struct resource atmel_mci0_resource[] __initdata = {
9554 + PBMEM(0xfff02400),
9555 + IRQ(28),
9556 +};
9557 +static struct clk atmel_mci0_pclk = {
9558 + .name = "mci_clk",
9559 + .parent = &pbb_clk,
9560 + .mode = pbb_clk_mode,
9561 + .get_rate = pbb_clk_get_rate,
9562 + .index = 9,
9563 +};
9564 +
9565 +struct platform_device *__init
9566 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
9567 +{
9568 + struct platform_device *pdev;
9569 +
9570 + if (id != 0)
9571 + return NULL;
9572 +
9573 + pdev = platform_device_alloc("atmel_mci", id);
9574 + if (!pdev)
9575 + goto fail;
9576 +
9577 + if (platform_device_add_resources(pdev, atmel_mci0_resource,
9578 + ARRAY_SIZE(atmel_mci0_resource)))
9579 + goto fail;
9580 +
9581 + if (data && platform_device_add_data(pdev, data,
9582 + sizeof(struct mci_platform_data)))
9583 + goto fail;
9584 +
9585 + select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
9586 + select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
9587 + select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
9588 + select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
9589 + select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
9590 + select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
9591 +
9592 + if (data) {
9593 + if (data->detect_pin != GPIO_PIN_NONE)
9594 + at32_select_gpio(data->detect_pin, 0);
9595 + if (data->wp_pin != GPIO_PIN_NONE)
9596 + at32_select_gpio(data->wp_pin, 0);
9597 + }
9598 +
9599 + atmel_mci0_pclk.dev = &pdev->dev;
9600 +
9601 + platform_device_add(pdev);
9602 + return pdev;
9603 +
9604 +fail:
9605 + platform_device_put(pdev);
9606 + return NULL;
9607 +}
9608 +
9609 +/* --------------------------------------------------------------------
9610 + * LCDC
9611 + * -------------------------------------------------------------------- */
9612 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
9613 +static struct atmel_lcdfb_info atmel_lcdfb0_data;
9614 +static struct resource atmel_lcdfb0_resource[] = {
9615 + {
9616 + .start = 0xff000000,
9617 + .end = 0xff000fff,
9618 + .flags = IORESOURCE_MEM,
9619 + },
9620 + IRQ(1),
9621 + {
9622 + /* Placeholder for pre-allocated fb memory */
9623 + .start = 0x00000000,
9624 + .end = 0x00000000,
9625 + .flags = 0,
9626 + },
9627 +};
9628 +DEFINE_DEV_DATA(atmel_lcdfb, 0);
9629 +DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
9630 +static struct clk atmel_lcdfb0_pixclk = {
9631 + .name = "lcdc_clk",
9632 + .dev = &atmel_lcdfb0_device.dev,
9633 + .mode = genclk_mode,
9634 + .get_rate = genclk_get_rate,
9635 + .set_rate = genclk_set_rate,
9636 + .set_parent = genclk_set_parent,
9637 + .index = 7,
9638 +};
9639 +
9640 +struct platform_device *__init
9641 +at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
9642 + unsigned long fbmem_start, unsigned long fbmem_len)
9643 +{
9644 + struct platform_device *pdev;
9645 + struct atmel_lcdfb_info *info;
9646 + struct fb_monspecs *monspecs;
9647 + struct fb_videomode *modedb;
9648 + unsigned int modedb_size;
9649 +
9650 + /*
9651 + * Do a deep copy of the fb data, monspecs and modedb. Make
9652 + * sure all allocations are done before setting up the
9653 + * portmux.
9654 + */
9655 + monspecs = kmemdup(data->default_monspecs,
9656 + sizeof(struct fb_monspecs), GFP_KERNEL);
9657 + if (!monspecs)
9658 + return NULL;
9659 +
9660 + modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
9661 + modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
9662 + if (!modedb)
9663 + goto err_dup_modedb;
9664 + monspecs->modedb = modedb;
9665 +
9666 + switch (id) {
9667 + case 0:
9668 + pdev = &atmel_lcdfb0_device;
9669 + select_peripheral(PC(19), PERIPH_A, 0); /* CC */
9670 + select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
9671 + select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
9672 + select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
9673 + select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */
9674 + select_peripheral(PC(24), PERIPH_A, 0); /* MODE */
9675 + select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
9676 + select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */
9677 + select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */
9678 + select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */
9679 + select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */
9680 + select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */
9681 + select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
9682 + select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
9683 + select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
9684 + select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
9685 + select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
9686 + select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
9687 + select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
9688 + select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
9689 + select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
9690 + select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
9691 + select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
9692 + select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
9693 + select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
9694 + select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
9695 + select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
9696 + select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
9697 + select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
9698 + select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
9699 + select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
9700 +
9701 + clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
9702 + clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
9703 + break;
9704 +
9705 + default:
9706 + goto err_invalid_id;
9707 + }
9708 +
9709 + if (fbmem_len) {
9710 + pdev->resource[2].start = fbmem_start;
9711 + pdev->resource[2].end = fbmem_start + fbmem_len - 1;
9712 + pdev->resource[2].flags = IORESOURCE_MEM;
9713 + }
9714 +
9715 + info = pdev->dev.platform_data;
9716 + memcpy(info, data, sizeof(struct atmel_lcdfb_info));
9717 + info->default_monspecs = monspecs;
9718 +
9719 + platform_device_register(pdev);
9720 + return pdev;
9721 +
9722 +err_invalid_id:
9723 + kfree(modedb);
9724 +err_dup_modedb:
9725 + kfree(monspecs);
9726 + return NULL;
9727 +}
9728 +#endif
9729 +
9730 +/* --------------------------------------------------------------------
9731 + * PWM
9732 + * -------------------------------------------------------------------- */
9733 +static struct resource atmel_pwm0_resource[] __initdata = {
9734 + PBMEM(0xfff01400),
9735 + IRQ(24),
9736 +};
9737 +static struct clk atmel_pwm0_mck = {
9738 + .name = "mck",
9739 + .parent = &pbb_clk,
9740 + .mode = pbb_clk_mode,
9741 + .get_rate = pbb_clk_get_rate,
9742 + .index = 5,
9743 +};
9744 +
9745 +struct platform_device *__init at32_add_device_pwm(u32 mask)
9746 +{
9747 + struct platform_device *pdev;
9748 +
9749 + if (!mask)
9750 + return NULL;
9751 +
9752 + pdev = platform_device_alloc("atmel_pwm", 0);
9753 + if (!pdev)
9754 + return NULL;
9755 +
9756 + if (platform_device_add_resources(pdev, atmel_pwm0_resource,
9757 + ARRAY_SIZE(atmel_pwm0_resource)))
9758 + goto out_free_pdev;
9759 +
9760 + if (platform_device_add_data(pdev, &mask, sizeof(mask)))
9761 + goto out_free_pdev;
9762 +
9763 + if (mask & (1 << 0))
9764 + select_peripheral(PA(28), PERIPH_A, 0);
9765 + if (mask & (1 << 1))
9766 + select_peripheral(PA(29), PERIPH_A, 0);
9767 + if (mask & (1 << 2))
9768 + select_peripheral(PA(21), PERIPH_B, 0);
9769 + if (mask & (1 << 3))
9770 + select_peripheral(PA(22), PERIPH_B, 0);
9771 +
9772 + atmel_pwm0_mck.dev = &pdev->dev;
9773 +
9774 + platform_device_add(pdev);
9775 +
9776 + return pdev;
9777 +
9778 +out_free_pdev:
9779 + platform_device_put(pdev);
9780 + return NULL;
9781 +}
9782 +
9783 +/* --------------------------------------------------------------------
9784 + * SSC
9785 + * -------------------------------------------------------------------- */
9786 +static struct resource ssc0_resource[] = {
9787 + PBMEM(0xffe01c00),
9788 + IRQ(10),
9789 +};
9790 +DEFINE_DEV(ssc, 0);
9791 +DEV_CLK(pclk, ssc0, pba, 7);
9792 +
9793 +static struct resource ssc1_resource[] = {
9794 + PBMEM(0xffe02000),
9795 + IRQ(11),
9796 +};
9797 +DEFINE_DEV(ssc, 1);
9798 +DEV_CLK(pclk, ssc1, pba, 8);
9799 +
9800 +static struct resource ssc2_resource[] = {
9801 + PBMEM(0xffe02400),
9802 + IRQ(12),
9803 +};
9804 +DEFINE_DEV(ssc, 2);
9805 +DEV_CLK(pclk, ssc2, pba, 9);
9806 +
9807 +struct platform_device *__init
9808 +at32_add_device_ssc(unsigned int id, unsigned int flags)
9809 +{
9810 + struct platform_device *pdev;
9811 +
9812 + switch (id) {
9813 + case 0:
9814 + pdev = &ssc0_device;
9815 + if (flags & ATMEL_SSC_RF)
9816 + select_peripheral(PA(21), PERIPH_A, 0); /* RF */
9817 + if (flags & ATMEL_SSC_RK)
9818 + select_peripheral(PA(22), PERIPH_A, 0); /* RK */
9819 + if (flags & ATMEL_SSC_TK)
9820 + select_peripheral(PA(23), PERIPH_A, 0); /* TK */
9821 + if (flags & ATMEL_SSC_TF)
9822 + select_peripheral(PA(24), PERIPH_A, 0); /* TF */
9823 + if (flags & ATMEL_SSC_TD)
9824 + select_peripheral(PA(25), PERIPH_A, 0); /* TD */
9825 + if (flags & ATMEL_SSC_RD)
9826 + select_peripheral(PA(26), PERIPH_A, 0); /* RD */
9827 + break;
9828 + case 1:
9829 + pdev = &ssc1_device;
9830 + if (flags & ATMEL_SSC_RF)
9831 + select_peripheral(PA(0), PERIPH_B, 0); /* RF */
9832 + if (flags & ATMEL_SSC_RK)
9833 + select_peripheral(PA(1), PERIPH_B, 0); /* RK */
9834 + if (flags & ATMEL_SSC_TK)
9835 + select_peripheral(PA(2), PERIPH_B, 0); /* TK */
9836 + if (flags & ATMEL_SSC_TF)
9837 + select_peripheral(PA(3), PERIPH_B, 0); /* TF */
9838 + if (flags & ATMEL_SSC_TD)
9839 + select_peripheral(PA(4), PERIPH_B, 0); /* TD */
9840 + if (flags & ATMEL_SSC_RD)
9841 + select_peripheral(PA(5), PERIPH_B, 0); /* RD */
9842 + break;
9843 + case 2:
9844 + pdev = &ssc2_device;
9845 + if (flags & ATMEL_SSC_TD)
9846 + select_peripheral(PB(13), PERIPH_A, 0); /* TD */
9847 + if (flags & ATMEL_SSC_RD)
9848 + select_peripheral(PB(14), PERIPH_A, 0); /* RD */
9849 + if (flags & ATMEL_SSC_TK)
9850 + select_peripheral(PB(15), PERIPH_A, 0); /* TK */
9851 + if (flags & ATMEL_SSC_TF)
9852 + select_peripheral(PB(16), PERIPH_A, 0); /* TF */
9853 + if (flags & ATMEL_SSC_RF)
9854 + select_peripheral(PB(17), PERIPH_A, 0); /* RF */
9855 + if (flags & ATMEL_SSC_RK)
9856 + select_peripheral(PB(18), PERIPH_A, 0); /* RK */
9857 + break;
9858 + default:
9859 + return NULL;
9860 + }
9861 +
9862 + platform_device_register(pdev);
9863 + return pdev;
9864 +}
9865 +
9866 +/* --------------------------------------------------------------------
9867 + * USB Device Controller
9868 + * -------------------------------------------------------------------- */
9869 +static struct resource usba0_resource[] __initdata = {
9870 + {
9871 + .start = 0xff300000,
9872 + .end = 0xff3fffff,
9873 + .flags = IORESOURCE_MEM,
9874 + }, {
9875 + .start = 0xfff03000,
9876 + .end = 0xfff033ff,
9877 + .flags = IORESOURCE_MEM,
9878 + },
9879 + IRQ(31),
9880 +};
9881 +static struct clk usba0_pclk = {
9882 + .name = "pclk",
9883 + .parent = &pbb_clk,
9884 + .mode = pbb_clk_mode,
9885 + .get_rate = pbb_clk_get_rate,
9886 + .index = 12,
9887 +};
9888 +static struct clk usba0_hclk = {
9889 + .name = "hclk",
9890 + .parent = &hsb_clk,
9891 + .mode = hsb_clk_mode,
9892 + .get_rate = hsb_clk_get_rate,
9893 + .index = 6,
9894 +};
9895 +
9896 +#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
9897 + [idx] = { \
9898 + .name = nam, \
9899 + .index = idx, \
9900 + .fifo_size = maxpkt, \
9901 + .nr_banks = maxbk, \
9902 + .can_dma = dma, \
9903 + .can_isoc = isoc, \
9904 + }
9905 +
9906 +static struct usba_ep_data at32_usba_ep[] __initdata = {
9907 + EP("ep0", 0, 64, 1, 0, 0),
9908 + EP("ep1", 1, 512, 2, 1, 1),
9909 + EP("ep2", 2, 512, 2, 1, 1),
9910 + EP("ep3-int", 3, 64, 3, 1, 0),
9911 + EP("ep4-int", 4, 64, 3, 1, 0),
9912 + EP("ep5", 5, 1024, 3, 1, 1),
9913 + EP("ep6", 6, 1024, 3, 1, 1),
9914 +};
9915 +
9916 +#undef EP
9917 +
9918 +struct platform_device *__init
9919 +at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
9920 +{
9921 + /*
9922 + * pdata doesn't have room for any endpoints, so we need to
9923 + * append room for the ones we need right after it.
9924 + */
9925 + struct {
9926 + struct usba_platform_data pdata;
9927 + struct usba_ep_data ep[7];
9928 + } usba_data;
9929 + struct platform_device *pdev;
9930 +
9931 + if (id != 0)
9932 + return NULL;
9933 +
9934 + pdev = platform_device_alloc("atmel_usba_udc", 0);
9935 + if (!pdev)
9936 + return NULL;
9937 +
9938 + if (platform_device_add_resources(pdev, usba0_resource,
9939 + ARRAY_SIZE(usba0_resource)))
9940 + goto out_free_pdev;
9941 +
9942 + if (data)
9943 + usba_data.pdata.vbus_pin = data->vbus_pin;
9944 + else
9945 + usba_data.pdata.vbus_pin = -EINVAL;
9946 +
9947 + data = &usba_data.pdata;
9948 + data->num_ep = ARRAY_SIZE(at32_usba_ep);
9949 + memcpy(data->ep, at32_usba_ep, sizeof(at32_usba_ep));
9950 +
9951 + if (platform_device_add_data(pdev, data, sizeof(usba_data)))
9952 + goto out_free_pdev;
9953 +
9954 + if (data->vbus_pin >= 0)
9955 + at32_select_gpio(data->vbus_pin, 0);
9956 +
9957 + usba0_pclk.dev = &pdev->dev;
9958 + usba0_hclk.dev = &pdev->dev;
9959 +
9960 + platform_device_add(pdev);
9961 +
9962 + return pdev;
9963 +
9964 +out_free_pdev:
9965 + platform_device_put(pdev);
9966 + return NULL;
9967 +}
9968 +
9969 +/* --------------------------------------------------------------------
9970 + * IDE / CompactFlash
9971 + * -------------------------------------------------------------------- */
9972 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
9973 +static struct resource at32_smc_cs4_resource[] __initdata = {
9974 + {
9975 + .start = 0x04000000,
9976 + .end = 0x07ffffff,
9977 + .flags = IORESOURCE_MEM,
9978 + },
9979 + IRQ(~0UL), /* Magic IRQ will be overridden */
9980 +};
9981 +static struct resource at32_smc_cs5_resource[] __initdata = {
9982 + {
9983 + .start = 0x20000000,
9984 + .end = 0x23ffffff,
9985 + .flags = IORESOURCE_MEM,
9986 + },
9987 + IRQ(~0UL), /* Magic IRQ will be overridden */
9988 +};
9989 +
9990 +static int __init at32_init_ide_or_cf(struct platform_device *pdev,
9991 + unsigned int cs, unsigned int extint)
9992 +{
9993 + static unsigned int extint_pin_map[4] __initdata = {
9994 + GPIO_PIN_PB(25),
9995 + GPIO_PIN_PB(26),
9996 + GPIO_PIN_PB(27),
9997 + GPIO_PIN_PB(28),
9998 + };
9999 + static bool common_pins_initialized __initdata = false;
10000 + unsigned int extint_pin;
10001 + int ret;
10002 +
10003 + if (extint >= ARRAY_SIZE(extint_pin_map))
10004 + return -EINVAL;
10005 + extint_pin = extint_pin_map[extint];
10006 +
10007 + switch (cs) {
10008 + case 4:
10009 + ret = platform_device_add_resources(pdev,
10010 + at32_smc_cs4_resource,
10011 + ARRAY_SIZE(at32_smc_cs4_resource));
10012 + if (ret)
10013 + return ret;
10014 +
10015 + select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */
10016 + set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
10017 + break;
10018 + case 5:
10019 + ret = platform_device_add_resources(pdev,
10020 + at32_smc_cs5_resource,
10021 + ARRAY_SIZE(at32_smc_cs5_resource));
10022 + if (ret)
10023 + return ret;
10024 +
10025 + select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */
10026 + set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
10027 + break;
10028 + default:
10029 + return -EINVAL;
10030 + }
10031 +
10032 + if (!common_pins_initialized) {
10033 + select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */
10034 + select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */
10035 + select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */
10036 + select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */
10037 + common_pins_initialized = true;
10038 + }
10039 +
10040 + at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
10041 +
10042 + pdev->resource[1].start = EIM_IRQ_BASE + extint;
10043 + pdev->resource[1].end = pdev->resource[1].start;
10044 +
10045 + return 0;
10046 +}
10047 +
10048 +struct platform_device *__init
10049 +at32_add_device_ide(unsigned int id, unsigned int extint,
10050 + struct ide_platform_data *data)
10051 +{
10052 + struct platform_device *pdev;
10053 +
10054 + pdev = platform_device_alloc("at32_ide", id);
10055 + if (!pdev)
10056 + goto fail;
10057 +
10058 + if (platform_device_add_data(pdev, data,
10059 + sizeof(struct ide_platform_data)))
10060 + goto fail;
10061 +
10062 + if (at32_init_ide_or_cf(pdev, data->cs, extint))
10063 + goto fail;
10064 +
10065 + platform_device_add(pdev);
10066 + return pdev;
10067 +
10068 +fail:
10069 + platform_device_put(pdev);
10070 + return NULL;
10071 +}
10072 +
10073 +struct platform_device *__init
10074 +at32_add_device_cf(unsigned int id, unsigned int extint,
10075 + struct cf_platform_data *data)
10076 +{
10077 + struct platform_device *pdev;
10078 +
10079 + pdev = platform_device_alloc("at32_cf", id);
10080 + if (!pdev)
10081 + goto fail;
10082 +
10083 + if (platform_device_add_data(pdev, data,
10084 + sizeof(struct cf_platform_data)))
10085 + goto fail;
10086 +
10087 + if (at32_init_ide_or_cf(pdev, data->cs, extint))
10088 + goto fail;
10089 +
10090 + if (data->detect_pin != GPIO_PIN_NONE)
10091 + at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
10092 + if (data->reset_pin != GPIO_PIN_NONE)
10093 + at32_select_gpio(data->reset_pin, 0);
10094 + if (data->vcc_pin != GPIO_PIN_NONE)
10095 + at32_select_gpio(data->vcc_pin, 0);
10096 + /* READY is used as extint, so we can't select it as gpio */
10097 +
10098 + platform_device_add(pdev);
10099 + return pdev;
10100 +
10101 +fail:
10102 + platform_device_put(pdev);
10103 + return NULL;
10104 +}
10105 +#endif
10106 +
10107 +/* --------------------------------------------------------------------
10108 + * AC97C
10109 + * -------------------------------------------------------------------- */
10110 +static struct resource atmel_ac97c0_resource[] __initdata = {
10111 + PBMEM(0xfff02800),
10112 + IRQ(29),
10113 +};
10114 +static struct clk atmel_ac97c0_pclk = {
10115 + .name = "pclk",
10116 + .parent = &pbb_clk,
10117 + .mode = pbb_clk_mode,
10118 + .get_rate = pbb_clk_get_rate,
10119 + .index = 10,
10120 +};
10121 +
10122 +struct platform_device *__init at32_add_device_ac97c(unsigned int id)
10123 +{
10124 + struct platform_device *pdev;
10125 +
10126 + if (id != 0)
10127 + return NULL;
10128 +
10129 + pdev = platform_device_alloc("atmel_ac97c", id);
10130 + if (!pdev)
10131 + return NULL;
10132 +
10133 + if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
10134 + ARRAY_SIZE(atmel_ac97c0_resource)))
10135 + goto err_add_resources;
10136 +
10137 + select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
10138 + select_peripheral(PB(21), PERIPH_B, 0); /* SDO */
10139 + select_peripheral(PB(22), PERIPH_B, 0); /* SDI */
10140 + select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
10141 +
10142 + atmel_ac97c0_pclk.dev = &pdev->dev;
10143 +
10144 + platform_device_add(pdev);
10145 + return pdev;
10146 +
10147 +err_add_resources:
10148 + platform_device_put(pdev);
10149 + return NULL;
10150 +}
10151 +
10152 +/* --------------------------------------------------------------------
10153 + * ABDAC
10154 + * -------------------------------------------------------------------- */
10155 +static struct resource abdac0_resource[] __initdata = {
10156 + PBMEM(0xfff02000),
10157 + IRQ(27),
10158 +};
10159 +static struct clk abdac0_pclk = {
10160 + .name = "pclk",
10161 + .parent = &pbb_clk,
10162 + .mode = pbb_clk_mode,
10163 + .get_rate = pbb_clk_get_rate,
10164 + .index = 8,
10165 +};
10166 +static struct clk abdac0_sample_clk = {
10167 + .name = "sample_clk",
10168 + .mode = genclk_mode,
10169 + .get_rate = genclk_get_rate,
10170 + .set_rate = genclk_set_rate,
10171 + .set_parent = genclk_set_parent,
10172 + .index = 6,
10173 +};
10174 +
10175 +struct platform_device *__init at32_add_device_abdac(unsigned int id)
10176 +{
10177 + struct platform_device *pdev;
10178 +
10179 + if (id != 0)
10180 + return NULL;
10181 +
10182 + pdev = platform_device_alloc("abdac", id);
10183 + if (!pdev)
10184 + return NULL;
10185 +
10186 + if (platform_device_add_resources(pdev, abdac0_resource,
10187 + ARRAY_SIZE(abdac0_resource)))
10188 + goto err_add_resources;
10189 +
10190 + select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */
10191 + select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */
10192 + select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */
10193 + select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */
10194 +
10195 + abdac0_pclk.dev = &pdev->dev;
10196 + abdac0_sample_clk.dev = &pdev->dev;
10197 +
10198 + platform_device_add(pdev);
10199 + return pdev;
10200 +
10201 +err_add_resources:
10202 + platform_device_put(pdev);
10203 + return NULL;
10204 +}
10205 +
10206 +/* --------------------------------------------------------------------
10207 + * GCLK
10208 + * -------------------------------------------------------------------- */
10209 +static struct clk gclk0 = {
10210 + .name = "gclk0",
10211 + .mode = genclk_mode,
10212 + .get_rate = genclk_get_rate,
10213 + .set_rate = genclk_set_rate,
10214 + .set_parent = genclk_set_parent,
10215 + .index = 0,
10216 +};
10217 +static struct clk gclk1 = {
10218 + .name = "gclk1",
10219 + .mode = genclk_mode,
10220 + .get_rate = genclk_get_rate,
10221 + .set_rate = genclk_set_rate,
10222 + .set_parent = genclk_set_parent,
10223 + .index = 1,
10224 +};
10225 +static struct clk gclk2 = {
10226 + .name = "gclk2",
10227 + .mode = genclk_mode,
10228 + .get_rate = genclk_get_rate,
10229 + .set_rate = genclk_set_rate,
10230 + .set_parent = genclk_set_parent,
10231 + .index = 2,
10232 +};
10233 +static struct clk gclk3 = {
10234 + .name = "gclk3",
10235 + .mode = genclk_mode,
10236 + .get_rate = genclk_get_rate,
10237 + .set_rate = genclk_set_rate,
10238 + .set_parent = genclk_set_parent,
10239 + .index = 3,
10240 +};
10241 +static struct clk gclk4 = {
10242 + .name = "gclk4",
10243 + .mode = genclk_mode,
10244 + .get_rate = genclk_get_rate,
10245 + .set_rate = genclk_set_rate,
10246 + .set_parent = genclk_set_parent,
10247 + .index = 4,
10248 +};
10249 +
10250 +struct clk *at32_clock_list[] = {
10251 + &osc32k,
10252 + &osc0,
10253 + &osc1,
10254 + &pll0,
10255 + &pll1,
10256 + &cpu_clk,
10257 + &hsb_clk,
10258 + &pba_clk,
10259 + &pbb_clk,
10260 + &at32_pm_pclk,
10261 + &at32_intc0_pclk,
10262 + &hmatrix_clk,
10263 + &ebi_clk,
10264 + &hramc_clk,
10265 + &smc0_pclk,
10266 + &smc0_mck,
10267 + &pdc_hclk,
10268 + &pdc_pclk,
10269 + &dmaca0_hclk,
10270 + &pico_clk,
10271 + &pio0_mck,
10272 + &pio1_mck,
10273 + &pio2_mck,
10274 + &pio3_mck,
10275 + &pio4_mck,
10276 + &at32_tcb0_t0_clk,
10277 + &at32_tcb1_t0_clk,
10278 + &atmel_psif0_pclk,
10279 + &atmel_psif1_pclk,
10280 + &atmel_usart0_usart,
10281 + &atmel_usart1_usart,
10282 + &atmel_usart2_usart,
10283 + &atmel_usart3_usart,
10284 + &atmel_pwm0_mck,
10285 +#if defined(CONFIG_CPU_AT32AP7000)
10286 + &macb0_hclk,
10287 + &macb0_pclk,
10288 + &macb1_hclk,
10289 + &macb1_pclk,
10290 +#endif
10291 + &atmel_spi0_spi_clk,
10292 + &atmel_spi1_spi_clk,
10293 + &atmel_twi0_pclk,
10294 + &atmel_mci0_pclk,
10295 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
10296 + &atmel_lcdfb0_hck1,
10297 + &atmel_lcdfb0_pixclk,
10298 +#endif
10299 + &ssc0_pclk,
10300 + &ssc1_pclk,
10301 + &ssc2_pclk,
10302 + &usba0_hclk,
10303 + &usba0_pclk,
10304 + &atmel_ac97c0_pclk,
10305 + &abdac0_pclk,
10306 + &abdac0_sample_clk,
10307 + &gclk0,
10308 + &gclk1,
10309 + &gclk2,
10310 + &gclk3,
10311 + &gclk4,
10312 +};
10313 +unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
10314 +
10315 +void __init at32_portmux_init(void)
10316 +{
10317 + at32_init_pio(&pio0_device);
10318 + at32_init_pio(&pio1_device);
10319 + at32_init_pio(&pio2_device);
10320 + at32_init_pio(&pio3_device);
10321 + at32_init_pio(&pio4_device);
10322 +}
10323 +
10324 +void __init at32_clock_init(void)
10325 +{
10326 + u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
10327 + int i;
10328 +
10329 + if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
10330 + main_clock = &pll0;
10331 + cpu_clk.parent = &pll0;
10332 + } else {
10333 + main_clock = &osc0;
10334 + cpu_clk.parent = &osc0;
10335 + }
10336 +
10337 + if (pm_readl(PLL0) & PM_BIT(PLLOSC))
10338 + pll0.parent = &osc1;
10339 + if (pm_readl(PLL1) & PM_BIT(PLLOSC))
10340 + pll1.parent = &osc1;
10341 +
10342 + genclk_init_parent(&gclk0);
10343 + genclk_init_parent(&gclk1);
10344 + genclk_init_parent(&gclk2);
10345 + genclk_init_parent(&gclk3);
10346 + genclk_init_parent(&gclk4);
10347 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
10348 + genclk_init_parent(&atmel_lcdfb0_pixclk);
10349 +#endif
10350 + genclk_init_parent(&abdac0_sample_clk);
10351 +
10352 + /*
10353 + * Turn on all clocks that have at least one user already, and
10354 + * turn off everything else. We only do this for module
10355 + * clocks, and even though it isn't particularly pretty to
10356 + * check the address of the mode function, it should do the
10357 + * trick...
10358 + */
10359 + for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
10360 + struct clk *clk = at32_clock_list[i];
10361 +
10362 + if (clk->users == 0)
10363 + continue;
10364 +
10365 + if (clk->mode == &cpu_clk_mode)
10366 + cpu_mask |= 1 << clk->index;
10367 + else if (clk->mode == &hsb_clk_mode)
10368 + hsb_mask |= 1 << clk->index;
10369 + else if (clk->mode == &pba_clk_mode)
10370 + pba_mask |= 1 << clk->index;
10371 + else if (clk->mode == &pbb_clk_mode)
10372 + pbb_mask |= 1 << clk->index;
10373 + }
10374 +
10375 + pm_writel(CPU_MASK, cpu_mask);
10376 + pm_writel(HSB_MASK, hsb_mask);
10377 + pm_writel(PBA_MASK, pba_mask);
10378 + pm_writel(PBB_MASK, pbb_mask);
10379 +}
10380 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/extint.c
10381 ===================================================================
10382 --- linux-2.6.24.7.orig/arch/avr32/mach-at32ap/extint.c
10383 +++ linux-2.6.24.7/arch/avr32/mach-at32ap/extint.c
10384 @@ -26,16 +26,10 @@
10385 #define EIC_MODE 0x0014
10386 #define EIC_EDGE 0x0018
10387 #define EIC_LEVEL 0x001c
10388 -#define EIC_TEST 0x0020
10389 #define EIC_NMIC 0x0024
10390
10391 -/* Bitfields in TEST */
10392 -#define EIC_TESTEN_OFFSET 31
10393 -#define EIC_TESTEN_SIZE 1
10394 -
10395 /* Bitfields in NMIC */
10396 -#define EIC_EN_OFFSET 0
10397 -#define EIC_EN_SIZE 1
10398 +#define EIC_NMIC_ENABLE (1 << 0)
10399
10400 /* Bit manipulation macros */
10401 #define EIC_BIT(name) \
10402 @@ -63,6 +57,9 @@ struct eic {
10403 unsigned int first_irq;
10404 };
10405
10406 +static struct eic *nmi_eic;
10407 +static bool nmi_enabled;
10408 +
10409 static void eic_ack_irq(unsigned int irq)
10410 {
10411 struct eic *eic = get_irq_chip_data(irq);
10412 @@ -133,8 +130,11 @@ static int eic_set_irq_type(unsigned int
10413 eic_writel(eic, EDGE, edge);
10414 eic_writel(eic, LEVEL, level);
10415
10416 - if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
10417 + if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
10418 flow_type |= IRQ_LEVEL;
10419 + __set_irq_handler_unlocked(irq, handle_level_irq);
10420 + } else
10421 + __set_irq_handler_unlocked(irq, handle_edge_irq);
10422 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
10423 desc->status |= flow_type;
10424 }
10425 @@ -154,9 +154,8 @@ static struct irq_chip eic_chip = {
10426 static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
10427 {
10428 struct eic *eic = desc->handler_data;
10429 - struct irq_desc *ext_desc;
10430 unsigned long status, pending;
10431 - unsigned int i, ext_irq;
10432 + unsigned int i;
10433
10434 status = eic_readl(eic, ISR);
10435 pending = status & eic_readl(eic, IMR);
10436 @@ -165,15 +164,28 @@ static void demux_eic_irq(unsigned int i
10437 i = fls(pending) - 1;
10438 pending &= ~(1 << i);
10439
10440 - ext_irq = i + eic->first_irq;
10441 - ext_desc = irq_desc + ext_irq;
10442 - if (ext_desc->status & IRQ_LEVEL)
10443 - handle_level_irq(ext_irq, ext_desc);
10444 - else
10445 - handle_edge_irq(ext_irq, ext_desc);
10446 + generic_handle_irq(i + eic->first_irq);
10447 }
10448 }
10449
10450 +int nmi_enable(void)
10451 +{
10452 + nmi_enabled = true;
10453 +
10454 + if (nmi_eic)
10455 + eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE);
10456 +
10457 + return 0;
10458 +}
10459 +
10460 +void nmi_disable(void)
10461 +{
10462 + if (nmi_eic)
10463 + eic_writel(nmi_eic, NMIC, 0);
10464 +
10465 + nmi_enabled = false;
10466 +}
10467 +
10468 static int __init eic_probe(struct platform_device *pdev)
10469 {
10470 struct eic *eic;
10471 @@ -214,14 +226,13 @@ static int __init eic_probe(struct platf
10472 pattern = eic_readl(eic, MODE);
10473 nr_irqs = fls(pattern);
10474
10475 - /* Trigger on falling edge unless overridden by driver */
10476 - eic_writel(eic, MODE, 0UL);
10477 + /* Trigger on low level unless overridden by driver */
10478 eic_writel(eic, EDGE, 0UL);
10479 + eic_writel(eic, LEVEL, 0UL);
10480
10481 eic->chip = &eic_chip;
10482
10483 for (i = 0; i < nr_irqs; i++) {
10484 - /* NOTE the handler we set here is ignored by the demux */
10485 set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
10486 handle_level_irq);
10487 set_irq_chip_data(eic->first_irq + i, eic);
10488 @@ -230,6 +241,16 @@ static int __init eic_probe(struct platf
10489 set_irq_chained_handler(int_irq, demux_eic_irq);
10490 set_irq_data(int_irq, eic);
10491
10492 + if (pdev->id == 0) {
10493 + nmi_eic = eic;
10494 + if (nmi_enabled)
10495 + /*
10496 + * Someone tried to enable NMI before we were
10497 + * ready. Do it now.
10498 + */
10499 + nmi_enable();
10500 + }
10501 +
10502 dev_info(&pdev->dev,
10503 "External Interrupt Controller at 0x%p, IRQ %u\n",
10504 eic->regs, int_irq);
10505 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/gpio-dev.c
10506 ===================================================================
10507 --- /dev/null
10508 +++ linux-2.6.24.7/arch/avr32/mach-at32ap/gpio-dev.c
10509 @@ -0,0 +1,573 @@
10510 +/*
10511 + * GPIO /dev and configfs interface
10512 + *
10513 + * Copyright (C) 2006-2007 Atmel Corporation
10514 + *
10515 + * This program is free software; you can redistribute it and/or modify
10516 + * it under the terms of the GNU General Public License version 2 as
10517 + * published by the Free Software Foundation.
10518 + */
10519 +#include <linux/kernel.h>
10520 +#include <linux/configfs.h>
10521 +#include <linux/cdev.h>
10522 +#include <linux/device.h>
10523 +#include <linux/fs.h>
10524 +#include <linux/interrupt.h>
10525 +#include <linux/module.h>
10526 +#include <linux/poll.h>
10527 +#include <linux/uaccess.h>
10528 +#include <linux/wait.h>
10529 +
10530 +#include <asm/gpio.h>
10531 +#include <asm/arch/portmux.h>
10532 +
10533 +#define GPIO_DEV_MAX 8
10534 +
10535 +static struct class *gpio_dev_class;
10536 +static dev_t gpio_devt;
10537 +
10538 +struct gpio_item {
10539 + spinlock_t lock;
10540 +
10541 + int enabled;
10542 + int initialized;
10543 + int port;
10544 + u32 pin_mask;
10545 + u32 oe_mask;
10546 +
10547 + /* Pin state last time we read it (for blocking reads) */
10548 + u32 pin_state;
10549 + int changed;
10550 +
10551 + wait_queue_head_t change_wq;
10552 + struct fasync_struct *async_queue;
10553 +
10554 + int id;
10555 + struct class_device *gpio_dev;
10556 + struct cdev char_dev;
10557 + struct config_item item;
10558 +};
10559 +
10560 +struct gpio_attribute {
10561 + struct configfs_attribute attr;
10562 + ssize_t (*show)(struct gpio_item *, char *);
10563 + ssize_t (*store)(struct gpio_item *, const char *, size_t);
10564 +};
10565 +
10566 +static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
10567 +{
10568 + struct gpio_item *gpio = dev_id;
10569 + u32 old_state, new_state;
10570 +
10571 + old_state = gpio->pin_state;
10572 + new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
10573 + gpio->pin_state = new_state;
10574 +
10575 + if (new_state != old_state) {
10576 + gpio->changed = 1;
10577 + wake_up_interruptible(&gpio->change_wq);
10578 +
10579 + if (gpio->async_queue)
10580 + kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
10581 + }
10582 +
10583 + return IRQ_HANDLED;
10584 +}
10585 +
10586 +static int gpio_dev_open(struct inode *inode, struct file *file)
10587 +{
10588 + struct gpio_item *gpio = container_of(inode->i_cdev,
10589 + struct gpio_item,
10590 + char_dev);
10591 + unsigned int irq;
10592 + unsigned int i;
10593 + int ret;
10594 +
10595 + nonseekable_open(inode, file);
10596 + config_item_get(&gpio->item);
10597 + file->private_data = gpio;
10598 +
10599 + gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
10600 + gpio->pin_mask);
10601 + gpio->changed = 1;
10602 +
10603 + for (i = 0; i < 32; i++) {
10604 + if (gpio->pin_mask & (1 << i)) {
10605 + irq = gpio_to_irq(32 * gpio->port + i);
10606 + ret = request_irq(irq, gpio_dev_interrupt, 0,
10607 + "gpio-dev", gpio);
10608 + if (ret)
10609 + goto err_irq;
10610 + }
10611 + }
10612 +
10613 + return 0;
10614 +
10615 +err_irq:
10616 + while (i--) {
10617 + if (gpio->pin_mask & (1 << i)) {
10618 + irq = gpio_to_irq(32 * gpio->port + i);
10619 + free_irq(irq, gpio);
10620 + }
10621 + }
10622 +
10623 + config_item_put(&gpio->item);
10624 +
10625 + return ret;
10626 +}
10627 +
10628 +static int gpio_dev_fasync(int fd, struct file *file, int mode)
10629 +{
10630 + struct gpio_item *gpio = file->private_data;
10631 +
10632 + return fasync_helper(fd, file, mode, &gpio->async_queue);
10633 +}
10634 +
10635 +static int gpio_dev_release(struct inode *inode, struct file *file)
10636 +{
10637 + struct gpio_item *gpio = file->private_data;
10638 + unsigned int irq;
10639 + unsigned int i;
10640 +
10641 + gpio_dev_fasync(-1, file, 0);
10642 +
10643 + for (i = 0; i < 32; i++) {
10644 + if (gpio->pin_mask & (1 << i)) {
10645 + irq = gpio_to_irq(32 * gpio->port + i);
10646 + free_irq(irq, gpio);
10647 + }
10648 + }
10649 +
10650 + config_item_put(&gpio->item);
10651 +
10652 + return 0;
10653 +}
10654 +
10655 +static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
10656 +{
10657 + struct gpio_item *gpio = file->private_data;
10658 + unsigned int mask = 0;
10659 +
10660 + poll_wait(file, &gpio->change_wq, wait);
10661 + if (gpio->changed)
10662 + mask |= POLLIN | POLLRDNORM;
10663 +
10664 + return mask;
10665 +}
10666 +
10667 +static ssize_t gpio_dev_read(struct file *file, char __user *buf,
10668 + size_t count, loff_t *offset)
10669 +{
10670 + struct gpio_item *gpio = file->private_data;
10671 + u32 value;
10672 +
10673 + spin_lock_irq(&gpio->lock);
10674 + while (!gpio->changed) {
10675 + spin_unlock_irq(&gpio->lock);
10676 +
10677 + if (file->f_flags & O_NONBLOCK)
10678 + return -EAGAIN;
10679 +
10680 + if (wait_event_interruptible(gpio->change_wq, gpio->changed))
10681 + return -ERESTARTSYS;
10682 +
10683 + spin_lock_irq(&gpio->lock);
10684 + }
10685 +
10686 + gpio->changed = 0;
10687 + value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
10688 +
10689 + spin_unlock_irq(&gpio->lock);
10690 +
10691 + count = min(count, (size_t)4);
10692 + if (copy_to_user(buf, &value, count))
10693 + return -EFAULT;
10694 +
10695 + return count;
10696 +}
10697 +
10698 +static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
10699 + size_t count, loff_t *offset)
10700 +{
10701 + struct gpio_item *gpio = file->private_data;
10702 + u32 value = 0;
10703 + u32 mask = ~0UL;
10704 +
10705 + count = min(count, (size_t)4);
10706 + if (copy_from_user(&value, buf, count))
10707 + return -EFAULT;
10708 +
10709 + /* Assuming big endian */
10710 + mask <<= (4 - count) * 8;
10711 + mask &= gpio->pin_mask;
10712 +
10713 + at32_gpio_set_value_multiple(gpio->port, value, mask);
10714 +
10715 + return count;
10716 +}
10717 +
10718 +static struct file_operations gpio_dev_fops = {
10719 + .owner = THIS_MODULE,
10720 + .llseek = no_llseek,
10721 + .open = gpio_dev_open,
10722 + .release = gpio_dev_release,
10723 + .fasync = gpio_dev_fasync,
10724 + .poll = gpio_dev_poll,
10725 + .read = gpio_dev_read,
10726 + .write = gpio_dev_write,
10727 +};
10728 +
10729 +static struct gpio_item *to_gpio_item(struct config_item *item)
10730 +{
10731 + return item ? container_of(item, struct gpio_item, item) : NULL;
10732 +}
10733 +
10734 +static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
10735 +{
10736 + return sprintf(page, "%d\n", gpio->port);
10737 +}
10738 +
10739 +static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
10740 + const char *page, size_t count)
10741 +{
10742 + unsigned long id;
10743 + char *p = (char *)page;
10744 + ssize_t ret = -EINVAL;
10745 +
10746 + id = simple_strtoul(p, &p, 0);
10747 + if (!p || (*p && (*p != '\n')))
10748 + return -EINVAL;
10749 +
10750 + /* Switching PIO is not allowed when live... */
10751 + spin_lock(&gpio->lock);
10752 + if (!gpio->enabled) {
10753 + ret = -ENXIO;
10754 + if (at32_gpio_port_is_valid(id)) {
10755 + gpio->port = id;
10756 + ret = count;
10757 + }
10758 + }
10759 + spin_unlock(&gpio->lock);
10760 +
10761 + return ret;
10762 +}
10763 +
10764 +static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
10765 +{
10766 + return sprintf(page, "0x%08x\n", gpio->pin_mask);
10767 +}
10768 +
10769 +static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
10770 + const char *page, size_t count)
10771 +{
10772 + u32 new_mask;
10773 + char *p = (char *)page;
10774 + ssize_t ret = -EINVAL;
10775 +
10776 + new_mask = simple_strtoul(p, &p, 0);
10777 + if (!p || (*p && (*p != '\n')))
10778 + return -EINVAL;
10779 +
10780 + /* Can't update the pin mask while live. */
10781 + spin_lock(&gpio->lock);
10782 + if (!gpio->enabled) {
10783 + gpio->oe_mask &= new_mask;
10784 + gpio->pin_mask = new_mask;
10785 + ret = count;
10786 + }
10787 + spin_unlock(&gpio->lock);
10788 +
10789 + return ret;
10790 +}
10791 +
10792 +static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
10793 +{
10794 + return sprintf(page, "0x%08x\n", gpio->oe_mask);
10795 +}
10796 +
10797 +static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
10798 + const char *page, size_t count)
10799 +{
10800 + u32 mask;
10801 + char *p = (char *)page;
10802 + ssize_t ret = -EINVAL;
10803 +
10804 + mask = simple_strtoul(p, &p, 0);
10805 + if (!p || (*p && (*p != '\n')))
10806 + return -EINVAL;
10807 +
10808 + spin_lock(&gpio->lock);
10809 + if (!gpio->enabled) {
10810 + gpio->oe_mask = mask & gpio->pin_mask;
10811 + ret = count;
10812 + }
10813 + spin_unlock(&gpio->lock);
10814 +
10815 + return ret;
10816 +}
10817 +
10818 +static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
10819 +{
10820 + return sprintf(page, "%d\n", gpio->enabled);
10821 +}
10822 +
10823 +static ssize_t gpio_store_enabled(struct gpio_item *gpio,
10824 + const char *page, size_t count)
10825 +{
10826 + char *p = (char *)page;
10827 + int enabled;
10828 + int ret;
10829 +
10830 + enabled = simple_strtoul(p, &p, 0);
10831 + if (!p || (*p && (*p != '\n')))
10832 + return -EINVAL;
10833 +
10834 + /* make it a boolean value */
10835 + enabled = !!enabled;
10836 +
10837 + if (gpio->enabled == enabled)
10838 + /* No change; do nothing. */
10839 + return count;
10840 +
10841 + BUG_ON(gpio->id >= GPIO_DEV_MAX);
10842 +
10843 + if (!enabled) {
10844 + class_device_unregister(gpio->gpio_dev);
10845 + cdev_del(&gpio->char_dev);
10846 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10847 + gpio->initialized = 0;
10848 + } else {
10849 + if (gpio->port < 0 || !gpio->pin_mask)
10850 + return -ENODEV;
10851 + }
10852 +
10853 + /* Disallow any updates to gpio_id or pin_mask */
10854 + spin_lock(&gpio->lock);
10855 + gpio->enabled = enabled;
10856 + spin_unlock(&gpio->lock);
10857 +
10858 + if (!enabled)
10859 + return count;
10860 +
10861 + /* Now, try to allocate the pins */
10862 + ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
10863 + if (ret)
10864 + goto err_alloc_pins;
10865 +
10866 + gpio->initialized = 1;
10867 +
10868 + cdev_init(&gpio->char_dev, &gpio_dev_fops);
10869 + gpio->char_dev.owner = THIS_MODULE;
10870 + ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
10871 + if (ret < 0)
10872 + goto err_cdev_add;
10873 + gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
10874 + MKDEV(MAJOR(gpio_devt), gpio->id),
10875 + NULL,
10876 + "gpio%d", gpio->id);
10877 + if (IS_ERR(gpio->gpio_dev)) {
10878 + printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
10879 + ret = PTR_ERR(gpio->gpio_dev);
10880 + goto err_class_dev;
10881 + }
10882 +
10883 + printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
10884 + gpio->id, gpio->port, gpio->pin_mask,
10885 + MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
10886 +
10887 + return 0;
10888 +
10889 +err_class_dev:
10890 + cdev_del(&gpio->char_dev);
10891 +err_cdev_add:
10892 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10893 + gpio->initialized = 0;
10894 +err_alloc_pins:
10895 + spin_lock(&gpio->lock);
10896 + gpio->enabled = 0;
10897 + spin_unlock(&gpio->lock);
10898 +
10899 + return ret;
10900 +}
10901 +
10902 +static struct gpio_attribute gpio_item_attr_gpio_id = {
10903 + .attr = {
10904 + .ca_owner = THIS_MODULE,
10905 + .ca_name = "gpio_id",
10906 + .ca_mode = S_IRUGO | S_IWUSR,
10907 + },
10908 + .show = gpio_show_gpio_id,
10909 + .store = gpio_store_gpio_id,
10910 +};
10911 +static struct gpio_attribute gpio_item_attr_pin_mask = {
10912 + .attr = {
10913 + .ca_owner = THIS_MODULE,
10914 + .ca_name = "pin_mask",
10915 + .ca_mode = S_IRUGO | S_IWUSR,
10916 + },
10917 + .show = gpio_show_pin_mask,
10918 + .store = gpio_store_pin_mask,
10919 +};
10920 +static struct gpio_attribute gpio_item_attr_oe_mask = {
10921 + .attr = {
10922 + .ca_owner = THIS_MODULE,
10923 + .ca_name = "oe_mask",
10924 + .ca_mode = S_IRUGO | S_IWUSR,
10925 + },
10926 + .show = gpio_show_oe_mask,
10927 + .store = gpio_store_oe_mask,
10928 +};
10929 +static struct gpio_attribute gpio_item_attr_enabled = {
10930 + .attr = {
10931 + .ca_owner = THIS_MODULE,
10932 + .ca_name = "enabled",
10933 + .ca_mode = S_IRUGO | S_IWUSR,
10934 + },
10935 + .show = gpio_show_enabled,
10936 + .store = gpio_store_enabled,
10937 +};
10938 +
10939 +static struct configfs_attribute *gpio_item_attrs[] = {
10940 + &gpio_item_attr_gpio_id.attr,
10941 + &gpio_item_attr_pin_mask.attr,
10942 + &gpio_item_attr_oe_mask.attr,
10943 + &gpio_item_attr_enabled.attr,
10944 + NULL,
10945 +};
10946 +
10947 +static ssize_t gpio_show_attr(struct config_item *item,
10948 + struct configfs_attribute *attr,
10949 + char *page)
10950 +{
10951 + struct gpio_item *gpio_item = to_gpio_item(item);
10952 + struct gpio_attribute *gpio_attr
10953 + = container_of(attr, struct gpio_attribute, attr);
10954 + ssize_t ret = 0;
10955 +
10956 + if (gpio_attr->show)
10957 + ret = gpio_attr->show(gpio_item, page);
10958 + return ret;
10959 +}
10960 +
10961 +static ssize_t gpio_store_attr(struct config_item *item,
10962 + struct configfs_attribute *attr,
10963 + const char *page, size_t count)
10964 +{
10965 + struct gpio_item *gpio_item = to_gpio_item(item);
10966 + struct gpio_attribute *gpio_attr
10967 + = container_of(attr, struct gpio_attribute, attr);
10968 + ssize_t ret = -EINVAL;
10969 +
10970 + if (gpio_attr->store)
10971 + ret = gpio_attr->store(gpio_item, page, count);
10972 + return ret;
10973 +}
10974 +
10975 +static void gpio_release(struct config_item *item)
10976 +{
10977 + kfree(to_gpio_item(item));
10978 +}
10979 +
10980 +static struct configfs_item_operations gpio_item_ops = {
10981 + .release = gpio_release,
10982 + .show_attribute = gpio_show_attr,
10983 + .store_attribute = gpio_store_attr,
10984 +};
10985 +
10986 +static struct config_item_type gpio_item_type = {
10987 + .ct_item_ops = &gpio_item_ops,
10988 + .ct_attrs = gpio_item_attrs,
10989 + .ct_owner = THIS_MODULE,
10990 +};
10991 +
10992 +static struct config_item *gpio_make_item(struct config_group *group,
10993 + const char *name)
10994 +{
10995 + static int next_id;
10996 + struct gpio_item *gpio;
10997 +
10998 + if (next_id >= GPIO_DEV_MAX)
10999 + return NULL;
11000 +
11001 + gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
11002 + if (!gpio)
11003 + return NULL;
11004 +
11005 + gpio->id = next_id++;
11006 + config_item_init_type_name(&gpio->item, name, &gpio_item_type);
11007 + spin_lock_init(&gpio->lock);
11008 + init_waitqueue_head(&gpio->change_wq);
11009 +
11010 + return &gpio->item;
11011 +}
11012 +
11013 +static void gpio_drop_item(struct config_group *group,
11014 + struct config_item *item)
11015 +{
11016 + struct gpio_item *gpio = to_gpio_item(item);
11017 +
11018 + spin_lock(&gpio->lock);
11019 + if (gpio->enabled) {
11020 + class_device_unregister(gpio->gpio_dev);
11021 + cdev_del(&gpio->char_dev);
11022 + }
11023 +
11024 + if (gpio->initialized) {
11025 + at32_deselect_pins(gpio->port, gpio->pin_mask);
11026 + gpio->initialized = 0;
11027 + gpio->enabled = 0;
11028 + }
11029 + spin_unlock(&gpio->lock);
11030 +}
11031 +
11032 +static struct configfs_group_operations gpio_group_ops = {
11033 + .make_item = gpio_make_item,
11034 + .drop_item = gpio_drop_item,
11035 +};
11036 +
11037 +static struct config_item_type gpio_group_type = {
11038 + .ct_group_ops = &gpio_group_ops,
11039 + .ct_owner = THIS_MODULE,
11040 +};
11041 +
11042 +static struct configfs_subsystem gpio_subsys = {
11043 + .su_group = {
11044 + .cg_item = {
11045 + .ci_namebuf = "gpio",
11046 + .ci_type = &gpio_group_type,
11047 + },
11048 + },
11049 +};
11050 +
11051 +static int __init gpio_dev_init(void)
11052 +{
11053 + int err;
11054 +
11055 + gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
11056 + if (IS_ERR(gpio_dev_class)) {
11057 + err = PTR_ERR(gpio_dev_class);
11058 + goto err_class_create;
11059 + }
11060 +
11061 + err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
11062 + if (err < 0)
11063 + goto err_alloc_chrdev;
11064 +
11065 + /* Configfs initialization */
11066 + config_group_init(&gpio_subsys.su_group);
11067 + mutex_init(&gpio_subsys.su_mutex);
11068 + err = configfs_register_subsystem(&gpio_subsys);
11069 + if (err)
11070 + goto err_register_subsys;
11071 +
11072 + return 0;
11073 +
11074 +err_register_subsys:
11075 + unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
11076 +err_alloc_chrdev:
11077 + class_destroy(gpio_dev_class);
11078 +err_class_create:
11079 + printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
11080 + return err;
11081 +}
11082 +late_initcall(gpio_dev_init);
11083 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/intc.c
11084 ===================================================================
11085 --- linux-2.6.24.7.orig/arch/avr32/mach-at32ap/intc.c
11086 +++ linux-2.6.24.7/arch/avr32/mach-at32ap/intc.c
11087 @@ -13,7 +13,6 @@
11088 #include <linux/irq.h>
11089 #include <linux/platform_device.h>
11090
11091 -#include <asm/intc.h>
11092 #include <asm/io.h>
11093
11094 #include "intc.h"
11095 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/Kconfig
11096 ===================================================================
11097 --- linux-2.6.24.7.orig/arch/avr32/mach-at32ap/Kconfig
11098 +++ linux-2.6.24.7/arch/avr32/mach-at32ap/Kconfig
11099 @@ -3,9 +3,9 @@ if PLATFORM_AT32AP
11100 menu "Atmel AVR32 AP options"
11101
11102 choice
11103 - prompt "AT32AP7000 static memory bus width"
11104 - depends on CPU_AT32AP7000
11105 - default AP7000_16_BIT_SMC
11106 + prompt "AT32AP700x static memory bus width"
11107 + depends on CPU_AT32AP700X
11108 + default AP700X_16_BIT_SMC
11109 help
11110 Define the width of the AP7000 external static memory interface.
11111 This is used to determine how to mangle the address and/or data
11112 @@ -15,17 +15,24 @@ choice
11113 width for all chip selects, excluding the flash (which is using
11114 raw access and is thus not affected by any of this.)
11115
11116 -config AP7000_32_BIT_SMC
11117 +config AP700X_32_BIT_SMC
11118 bool "32 bit"
11119
11120 -config AP7000_16_BIT_SMC
11121 +config AP700X_16_BIT_SMC
11122 bool "16 bit"
11123
11124 -config AP7000_8_BIT_SMC
11125 +config AP700X_8_BIT_SMC
11126 bool "8 bit"
11127
11128 endchoice
11129
11130 +config GPIO_DEV
11131 + bool "GPIO /dev interface"
11132 + select CONFIGFS_FS
11133 + default n
11134 + help
11135 + Say `Y' to enable a /dev interface to the GPIO pins.
11136 +
11137 endmenu
11138
11139 endif # PLATFORM_AT32AP
11140 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/Makefile
11141 ===================================================================
11142 --- linux-2.6.24.7.orig/arch/avr32/mach-at32ap/Makefile
11143 +++ linux-2.6.24.7/arch/avr32/mach-at32ap/Makefile
11144 @@ -1,4 +1,4 @@
11145 obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
11146 -obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o
11147 -obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o
11148 +obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o pm-at32ap700x.o
11149 obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o
11150 +obj-$(CONFIG_GPIO_DEV) += gpio-dev.o
11151 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/pio.c
11152 ===================================================================
11153 --- linux-2.6.24.7.orig/arch/avr32/mach-at32ap/pio.c
11154 +++ linux-2.6.24.7/arch/avr32/mach-at32ap/pio.c
11155 @@ -162,6 +162,82 @@ fail:
11156 dump_stack();
11157 }
11158
11159 +#ifdef CONFIG_GPIO_DEV
11160 +
11161 +/* Gang allocators and accessors; used by the GPIO /dev driver */
11162 +int at32_gpio_port_is_valid(unsigned int port)
11163 +{
11164 + return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
11165 +}
11166 +
11167 +int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
11168 +{
11169 + struct pio_device *pio;
11170 + u32 old, new;
11171 +
11172 + pio = &pio_dev[port];
11173 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
11174 +
11175 + /* Try to allocate the pins */
11176 + do {
11177 + old = pio->pinmux_mask;
11178 + if (old & pins)
11179 + return -EBUSY;
11180 +
11181 + new = old | pins;
11182 + } while (cmpxchg(&pio->pinmux_mask, old, new) != old);
11183 +
11184 + /* That went well, now configure the port */
11185 + pio_writel(pio, OER, oe_mask);
11186 + pio_writel(pio, PER, pins);
11187 +
11188 + return 0;
11189 +}
11190 +
11191 +void at32_deselect_pins(unsigned int port, u32 pins)
11192 +{
11193 + struct pio_device *pio;
11194 + u32 old, new;
11195 +
11196 + pio = &pio_dev[port];
11197 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
11198 +
11199 + /* Return to a "safe" mux configuration */
11200 + pio_writel(pio, PUER, pins);
11201 + pio_writel(pio, ODR, pins);
11202 +
11203 + /* Deallocate the pins */
11204 + do {
11205 + old = pio->pinmux_mask;
11206 + new = old & ~pins;
11207 + } while (cmpxchg(&pio->pinmux_mask, old, new) != old);
11208 +}
11209 +
11210 +u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
11211 +{
11212 + struct pio_device *pio;
11213 +
11214 + pio = &pio_dev[port];
11215 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
11216 +
11217 + return pio_readl(pio, PDSR) & pins;
11218 +}
11219 +
11220 +void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
11221 +{
11222 + struct pio_device *pio;
11223 +
11224 + pio = &pio_dev[port];
11225 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
11226 +
11227 + /* No atomic updates for now... */
11228 + pio_writel(pio, CODR, ~value & mask);
11229 + pio_writel(pio, SODR, value & mask);
11230 +}
11231 +
11232 +#endif /* CONFIG_GPIO_DEV */
11233 +
11234 +
11235 /*--------------------------------------------------------------------------*/
11236
11237 /* GPIO API */
11238 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/pm-at32ap700x.S
11239 ===================================================================
11240 --- /dev/null
11241 +++ linux-2.6.24.7/arch/avr32/mach-at32ap/pm-at32ap700x.S
11242 @@ -0,0 +1,66 @@
11243 +/*
11244 + * Low-level Power Management code.
11245 + *
11246 + * Copyright (C) 2008 Atmel Corporation
11247 + *
11248 + * This program is free software; you can redistribute it and/or modify
11249 + * it under the terms of the GNU General Public License version 2 as
11250 + * published by the Free Software Foundation.
11251 + */
11252 +#include <asm/asm.h>
11253 +#include <asm/asm-offsets.h>
11254 +#include <asm/thread_info.h>
11255 +#include <asm/arch/pm.h>
11256 +
11257 + .section .bss, "wa", @nobits
11258 + .global disable_idle_sleep
11259 + .type disable_idle_sleep, @object
11260 +disable_idle_sleep:
11261 + .int 4
11262 + .size disable_idle_sleep, . - disable_idle_sleep
11263 +
11264 + /* Keep this close to the irq handlers */
11265 + .section .irq.text, "ax", @progbits
11266 +
11267 + /*
11268 + * void cpu_enter_idle(void)
11269 + *
11270 + * Put the CPU into "idle" mode, in which it will consume
11271 + * significantly less power.
11272 + *
11273 + * If an interrupt comes along in the window between
11274 + * unmask_interrupts and the sleep instruction below, the
11275 + * interrupt code will adjust the return address so that we
11276 + * never execute the sleep instruction. This is required
11277 + * because the AP7000 doesn't unmask interrupts when entering
11278 + * sleep modes; later CPUs may not need this workaround.
11279 + */
11280 + .global cpu_enter_idle
11281 + .type cpu_enter_idle, @function
11282 +cpu_enter_idle:
11283 + mask_interrupts
11284 + get_thread_info r8
11285 + ld.w r9, r8[TI_flags]
11286 + bld r9, TIF_NEED_RESCHED
11287 + brcs .Lret_from_sleep
11288 + sbr r9, TIF_CPU_GOING_TO_SLEEP
11289 + st.w r8[TI_flags], r9
11290 + unmask_interrupts
11291 + sleep CPU_SLEEP_IDLE
11292 + .size cpu_idle_sleep, . - cpu_idle_sleep
11293 +
11294 + /*
11295 + * Common return path for PM functions that don't run from
11296 + * SRAM.
11297 + */
11298 + .global cpu_idle_skip_sleep
11299 + .type cpu_idle_skip_sleep, @function
11300 +cpu_idle_skip_sleep:
11301 + mask_interrupts
11302 + ld.w r9, r8[TI_flags]
11303 + cbr r9, TIF_CPU_GOING_TO_SLEEP
11304 + st.w r8[TI_flags], r9
11305 +.Lret_from_sleep:
11306 + unmask_interrupts
11307 + retal r12
11308 + .size cpu_idle_skip_sleep, . - cpu_idle_skip_sleep
11309 Index: linux-2.6.24.7/arch/avr32/mach-at32ap/time-tc.c
11310 ===================================================================
11311 --- linux-2.6.24.7.orig/arch/avr32/mach-at32ap/time-tc.c
11312 +++ /dev/null
11313 @@ -1,218 +0,0 @@
11314 -/*
11315 - * Copyright (C) 2004-2007 Atmel Corporation
11316 - *
11317 - * Based on MIPS implementation arch/mips/kernel/time.c
11318 - * Copyright 2001 MontaVista Software Inc.
11319 - *
11320 - * This program is free software; you can redistribute it and/or modify
11321 - * it under the terms of the GNU General Public License version 2 as
11322 - * published by the Free Software Foundation.
11323 - */
11324 -
11325 -#include <linux/clk.h>
11326 -#include <linux/clocksource.h>
11327 -#include <linux/time.h>
11328 -#include <linux/module.h>
11329 -#include <linux/interrupt.h>
11330 -#include <linux/irq.h>
11331 -#include <linux/kernel_stat.h>
11332 -#include <linux/errno.h>
11333 -#include <linux/init.h>
11334 -#include <linux/profile.h>
11335 -#include <linux/sysdev.h>
11336 -#include <linux/err.h>
11337 -
11338 -#include <asm/div64.h>
11339 -#include <asm/sysreg.h>
11340 -#include <asm/io.h>
11341 -#include <asm/sections.h>
11342 -
11343 -#include <asm/arch/time.h>
11344 -
11345 -/* how many counter cycles in a jiffy? */
11346 -static u32 cycles_per_jiffy;
11347 -
11348 -/* the count value for the next timer interrupt */
11349 -static u32 expirelo;
11350 -
11351 -/* the I/O registers of the TC module */
11352 -static void __iomem *ioregs;
11353 -
11354 -cycle_t read_cycle_count(void)
11355 -{
11356 - return (cycle_t)timer_read(ioregs, 0, CV);
11357 -}
11358 -
11359 -struct clocksource clocksource_avr32 = {
11360 - .name = "avr32",
11361 - .rating = 342,
11362 - .read = read_cycle_count,
11363 - .mask = CLOCKSOURCE_MASK(16),
11364 - .shift = 16,
11365 - .flags = CLOCK_SOURCE_IS_CONTINUOUS,
11366 -};
11367 -
11368 -static void avr32_timer_ack(void)
11369 -{
11370 - u16 count = expirelo;
11371 -
11372 - /* Ack this timer interrupt and set the next one, use a u16
11373 - * variable so it will wrap around correctly */
11374 - count += cycles_per_jiffy;
11375 - expirelo = count;
11376 - timer_write(ioregs, 0, RC, expirelo);
11377 -
11378 - /* Check to see if we have missed any timer interrupts */
11379 - count = timer_read(ioregs, 0, CV);
11380 - if ((count - expirelo) < 0x7fff) {
11381 - expirelo = count + cycles_per_jiffy;
11382 - timer_write(ioregs, 0, RC, expirelo);
11383 - }
11384 -}
11385 -
11386 -u32 avr32_hpt_read(void)
11387 -{
11388 - return timer_read(ioregs, 0, CV);
11389 -}
11390 -
11391 -static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk)
11392 -{
11393 - unsigned int cycles_max = (clocksource_avr32.mask + 1) / 2;
11394 - unsigned int divs[] = { 4, 8, 16, 32 };
11395 - int divs_size = ARRAY_SIZE(divs);
11396 - int i = 0;
11397 - unsigned long count_hz;
11398 - unsigned long shift;
11399 - unsigned long mult;
11400 - int clock_div = -1;
11401 - u64 tmp;
11402 -
11403 - shift = clocksource_avr32.shift;
11404 -
11405 - do {
11406 - count_hz = clk_get_rate(pclk) / divs[i];
11407 - mult = clocksource_hz2mult(count_hz, shift);
11408 - clocksource_avr32.mult = mult;
11409 -
11410 - tmp = TICK_NSEC;
11411 - tmp <<= shift;
11412 - tmp += mult / 2;
11413 - do_div(tmp, mult);
11414 -
11415 - cycles_per_jiffy = tmp;
11416 - } while (cycles_per_jiffy > cycles_max && ++i < divs_size);
11417 -
11418 - clock_div = i + 1;
11419 -
11420 - if (clock_div > divs_size) {
11421 - pr_debug("timer: could not calculate clock divider\n");
11422 - return -EFAULT;
11423 - }
11424 -
11425 - /* Set the clock divider */
11426 - timer_write(ioregs, 0, CMR, TIMER_BF(CMR_TCCLKS, clock_div));
11427 -
11428 - return 0;
11429 -}
11430 -
11431 -int avr32_hpt_init(unsigned int count)
11432 -{
11433 - struct resource *regs;
11434 - struct clk *pclk;
11435 - int irq = -1;
11436 - int ret = 0;
11437 -
11438 - ret = -ENXIO;
11439 -
11440 - irq = platform_get_irq(&at32_systc0_device, 0);
11441 - if (irq < 0) {
11442 - pr_debug("timer: could not get irq\n");
11443 - goto out_error;
11444 - }
11445 -
11446 - pclk = clk_get(&at32_systc0_device.dev, "pclk");
11447 - if (IS_ERR(pclk)) {
11448 - pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk));
11449 - goto out_error;
11450 - }
11451 - clk_enable(pclk);
11452 -
11453 - regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0);
11454 - if (!regs) {
11455 - pr_debug("timer: could not get resource\n");
11456 - goto out_error_clk;
11457 - }
11458 -
11459 - ioregs = ioremap(regs->start, regs->end - regs->start + 1);
11460 - if (!ioregs) {
11461 - pr_debug("timer: could not get ioregs\n");
11462 - goto out_error_clk;
11463 - }
11464 -
11465 - ret = avr32_timer_calc_div_and_set_jiffies(pclk);
11466 - if (ret)
11467 - goto out_error_io;
11468 -
11469 - ret = setup_irq(irq, &timer_irqaction);
11470 - if (ret) {
11471 - pr_debug("timer: could not request irq %d: %d\n",
11472 - irq, ret);
11473 - goto out_error_io;
11474 - }
11475 -
11476 - expirelo = (timer_read(ioregs, 0, CV) / cycles_per_jiffy + 1)
11477 - * cycles_per_jiffy;
11478 -
11479 - /* Enable clock and interrupts on RC compare */
11480 - timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_CLKEN));
11481 - timer_write(ioregs, 0, IER, TIMER_BIT(IER_CPCS));
11482 - /* Set cycles to first interrupt */
11483 - timer_write(ioregs, 0, RC, expirelo);
11484 -
11485 - printk(KERN_INFO "timer: AT32AP system timer/counter at 0x%p irq %d\n",
11486 - ioregs, irq);
11487 -
11488 - return 0;
11489 -
11490 -out_error_io:
11491 - iounmap(ioregs);
11492 -out_error_clk:
11493 - clk_put(pclk);
11494 -out_error:
11495 - return ret;
11496 -}
11497 -
11498 -int avr32_hpt_start(void)
11499 -{
11500 - timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_SWTRG));
11501 - return 0;
11502 -}
11503 -
11504 -irqreturn_t timer_interrupt(int irq, void *dev_id)
11505 -{
11506 - unsigned int sr = timer_read(ioregs, 0, SR);
11507 -
11508 - if (sr & TIMER_BIT(SR_CPCS)) {
11509 - /* ack timer interrupt and try to set next interrupt */
11510 - avr32_timer_ack();
11511 -
11512 - /*
11513 - * Call the generic timer interrupt handler
11514 - */
11515 - write_seqlock(&xtime_lock);
11516 - do_timer(1);
11517 - write_sequnlock(&xtime_lock);
11518 -
11519 - /*
11520 - * In UP mode, we call local_timer_interrupt() to do profiling
11521 - * and process accounting.
11522 - *
11523 - * SMP is not supported yet.
11524 - */
11525 - local_timer_interrupt(irq, dev_id);
11526 -
11527 - return IRQ_HANDLED;
11528 - }
11529 -
11530 - return IRQ_NONE;
11531 -}
11532 Index: linux-2.6.24.7/arch/avr32/Makefile
11533 ===================================================================
11534 --- linux-2.6.24.7.orig/arch/avr32/Makefile
11535 +++ linux-2.6.24.7/arch/avr32/Makefile
11536 @@ -16,7 +16,7 @@ KBUILD_AFLAGS += -mrelax -mno-pic
11537 CFLAGS_MODULE += -mno-relax
11538 LDFLAGS_vmlinux += --relax
11539
11540 -cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000
11541 +cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap
11542
11543 KBUILD_CFLAGS += $(cpuflags-y)
11544 KBUILD_AFLAGS += $(cpuflags-y)
11545 @@ -31,6 +31,8 @@ core-$(CONFIG_BOARD_ATNGW100) += arch/a
11546 core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
11547 core-y += arch/avr32/kernel/
11548 core-y += arch/avr32/mm/
11549 +drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/
11550 +drivers-y += arch/avr32/drivers/
11551 libs-y += arch/avr32/lib/
11552
11553 archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap
11554 Index: linux-2.6.24.7/arch/avr32/mm/dma-coherent.c
11555 ===================================================================
11556 --- linux-2.6.24.7.orig/arch/avr32/mm/dma-coherent.c
11557 +++ linux-2.6.24.7/arch/avr32/mm/dma-coherent.c
11558 @@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct d
11559 struct page *page, *free, *end;
11560 int order;
11561
11562 + /* Following is a work-around (a.k.a. hack) to prevent pages
11563 + * with __GFP_COMP being passed to split_page() which cannot
11564 + * handle them. The real problem is that this flag probably
11565 + * should be 0 on AVR32 as it is not supported on this
11566 + * platform--see CONFIG_HUGETLB_PAGE. */
11567 + gfp &= ~(__GFP_COMP);
11568 +
11569 size = PAGE_ALIGN(size);
11570 order = get_order(size);
11571
11572 Index: linux-2.6.24.7/arch/avr32/mm/fault.c
11573 ===================================================================
11574 --- linux-2.6.24.7.orig/arch/avr32/mm/fault.c
11575 +++ linux-2.6.24.7/arch/avr32/mm/fault.c
11576 @@ -189,6 +189,8 @@ no_context:
11577
11578 page = sysreg_read(PTBR);
11579 printk(KERN_ALERT "ptbr = %08lx", page);
11580 + if (address >= TASK_SIZE)
11581 + page = (unsigned long)swapper_pg_dir;
11582 if (page) {
11583 page = ((unsigned long *)page)[address >> 22];
11584 printk(" pgd = %08lx", page);
11585 Index: linux-2.6.24.7/arch/avr32/mm/tlb.c
11586 ===================================================================
11587 --- linux-2.6.24.7.orig/arch/avr32/mm/tlb.c
11588 +++ linux-2.6.24.7/arch/avr32/mm/tlb.c
11589 @@ -348,7 +348,7 @@ static int tlb_show(struct seq_file *tlb
11590 return 0;
11591 }
11592
11593 -static struct seq_operations tlb_ops = {
11594 +static const struct seq_operations tlb_ops = {
11595 .start = tlb_start,
11596 .next = tlb_next,
11597 .stop = tlb_stop,
11598 Index: linux-2.6.24.7/arch/avr32/oprofile/Makefile
11599 ===================================================================
11600 --- /dev/null
11601 +++ linux-2.6.24.7/arch/avr32/oprofile/Makefile
11602 @@ -0,0 +1,8 @@
11603 +obj-$(CONFIG_OPROFILE) += oprofile.o
11604 +
11605 +oprofile-y := $(addprefix ../../../drivers/oprofile/, \
11606 + oprof.o cpu_buffer.o buffer_sync.o \
11607 + event_buffer.o oprofile_files.o \
11608 + oprofilefs.o oprofile_stats.o \
11609 + timer_int.o)
11610 +oprofile-y += op_model_avr32.o
11611 Index: linux-2.6.24.7/arch/avr32/oprofile/op_model_avr32.c
11612 ===================================================================
11613 --- /dev/null
11614 +++ linux-2.6.24.7/arch/avr32/oprofile/op_model_avr32.c
11615 @@ -0,0 +1,234 @@
11616 +/*
11617 + * AVR32 Performance Counter Driver
11618 + *
11619 + * Copyright (C) 2005-2007 Atmel Corporation
11620 + *
11621 + * This program is free software; you can redistribute it and/or modify
11622 + * it under the terms of the GNU General Public License version 2 as
11623 + * published by the Free Software Foundation.
11624 + *
11625 + * Author: Ronny Pedersen
11626 + */
11627 +#include <linux/errno.h>
11628 +#include <linux/interrupt.h>
11629 +#include <linux/irq.h>
11630 +#include <linux/oprofile.h>
11631 +#include <linux/sched.h>
11632 +#include <linux/types.h>
11633 +
11634 +#include <asm/sysreg.h>
11635 +#include <asm/system.h>
11636 +
11637 +#define AVR32_PERFCTR_IRQ_GROUP 0
11638 +#define AVR32_PERFCTR_IRQ_LINE 1
11639 +
11640 +enum { PCCNT, PCNT0, PCNT1, NR_counter };
11641 +
11642 +struct avr32_perf_counter {
11643 + unsigned long enabled;
11644 + unsigned long event;
11645 + unsigned long count;
11646 + unsigned long unit_mask;
11647 + unsigned long kernel;
11648 + unsigned long user;
11649 +
11650 + u32 ie_mask;
11651 + u32 flag_mask;
11652 +};
11653 +
11654 +static struct avr32_perf_counter counter[NR_counter] = {
11655 + {
11656 + .ie_mask = SYSREG_BIT(IEC),
11657 + .flag_mask = SYSREG_BIT(FC),
11658 + }, {
11659 + .ie_mask = SYSREG_BIT(IE0),
11660 + .flag_mask = SYSREG_BIT(F0),
11661 + }, {
11662 + .ie_mask = SYSREG_BIT(IE1),
11663 + .flag_mask = SYSREG_BIT(F1),
11664 + },
11665 +};
11666 +
11667 +static void avr32_perf_counter_reset(void)
11668 +{
11669 + /* Reset all counter and disable/clear all interrupts */
11670 + sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
11671 + | SYSREG_BIT(PCCR_C)
11672 + | SYSREG_BIT(FC)
11673 + | SYSREG_BIT(F0)
11674 + | SYSREG_BIT(F1)));
11675 +}
11676 +
11677 +static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
11678 +{
11679 + struct avr32_perf_counter *ctr = dev_id;
11680 + struct pt_regs *regs;
11681 + u32 pccr;
11682 +
11683 + if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
11684 + & (1 << AVR32_PERFCTR_IRQ_LINE))))
11685 + return IRQ_NONE;
11686 +
11687 + regs = get_irq_regs();
11688 + pccr = sysreg_read(PCCR);
11689 +
11690 + /* Clear the interrupt flags we're about to handle */
11691 + sysreg_write(PCCR, pccr);
11692 +
11693 + /* PCCNT */
11694 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11695 + sysreg_write(PCCNT, -ctr->count);
11696 + oprofile_add_sample(regs, PCCNT);
11697 + }
11698 + ctr++;
11699 + /* PCNT0 */
11700 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11701 + sysreg_write(PCNT0, -ctr->count);
11702 + oprofile_add_sample(regs, PCNT0);
11703 + }
11704 + ctr++;
11705 + /* PCNT1 */
11706 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11707 + sysreg_write(PCNT1, -ctr->count);
11708 + oprofile_add_sample(regs, PCNT1);
11709 + }
11710 +
11711 + return IRQ_HANDLED;
11712 +}
11713 +
11714 +static int avr32_perf_counter_create_files(struct super_block *sb,
11715 + struct dentry *root)
11716 +{
11717 + struct dentry *dir;
11718 + unsigned int i;
11719 + char filename[4];
11720 +
11721 + for (i = 0; i < NR_counter; i++) {
11722 + snprintf(filename, sizeof(filename), "%u", i);
11723 + dir = oprofilefs_mkdir(sb, root, filename);
11724 +
11725 + oprofilefs_create_ulong(sb, dir, "enabled",
11726 + &counter[i].enabled);
11727 + oprofilefs_create_ulong(sb, dir, "event",
11728 + &counter[i].event);
11729 + oprofilefs_create_ulong(sb, dir, "count",
11730 + &counter[i].count);
11731 +
11732 + /* Dummy entries */
11733 + oprofilefs_create_ulong(sb, dir, "kernel",
11734 + &counter[i].kernel);
11735 + oprofilefs_create_ulong(sb, dir, "user",
11736 + &counter[i].user);
11737 + oprofilefs_create_ulong(sb, dir, "unit_mask",
11738 + &counter[i].unit_mask);
11739 + }
11740 +
11741 + return 0;
11742 +}
11743 +
11744 +static int avr32_perf_counter_setup(void)
11745 +{
11746 + struct avr32_perf_counter *ctr;
11747 + u32 pccr;
11748 + int ret;
11749 + int i;
11750 +
11751 + pr_debug("avr32_perf_counter_setup\n");
11752 +
11753 + if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
11754 + printk(KERN_ERR
11755 + "oprofile: setup: perf counter already enabled\n");
11756 + return -EBUSY;
11757 + }
11758 +
11759 + ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
11760 + avr32_perf_counter_interrupt, IRQF_SHARED,
11761 + "oprofile", counter);
11762 + if (ret)
11763 + return ret;
11764 +
11765 + avr32_perf_counter_reset();
11766 +
11767 + pccr = 0;
11768 + for (i = PCCNT; i < NR_counter; i++) {
11769 + ctr = &counter[i];
11770 + if (!ctr->enabled)
11771 + continue;
11772 +
11773 + pr_debug("enabling counter %d...\n", i);
11774 +
11775 + pccr |= ctr->ie_mask;
11776 +
11777 + switch (i) {
11778 + case PCCNT:
11779 + /* PCCNT always counts cycles, so no events */
11780 + sysreg_write(PCCNT, -ctr->count);
11781 + break;
11782 + case PCNT0:
11783 + pccr |= SYSREG_BF(CONF0, ctr->event);
11784 + sysreg_write(PCNT0, -ctr->count);
11785 + break;
11786 + case PCNT1:
11787 + pccr |= SYSREG_BF(CONF1, ctr->event);
11788 + sysreg_write(PCNT1, -ctr->count);
11789 + break;
11790 + }
11791 + }
11792 +
11793 + pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
11794 +
11795 + sysreg_write(PCCR, pccr);
11796 +
11797 + return 0;
11798 +}
11799 +
11800 +static void avr32_perf_counter_shutdown(void)
11801 +{
11802 + pr_debug("avr32_perf_counter_shutdown\n");
11803 +
11804 + avr32_perf_counter_reset();
11805 + free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
11806 +}
11807 +
11808 +static int avr32_perf_counter_start(void)
11809 +{
11810 + pr_debug("avr32_perf_counter_start\n");
11811 +
11812 + sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
11813 +
11814 + return 0;
11815 +}
11816 +
11817 +static void avr32_perf_counter_stop(void)
11818 +{
11819 + pr_debug("avr32_perf_counter_stop\n");
11820 +
11821 + sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
11822 +}
11823 +
11824 +static struct oprofile_operations avr32_perf_counter_ops __initdata = {
11825 + .create_files = avr32_perf_counter_create_files,
11826 + .setup = avr32_perf_counter_setup,
11827 + .shutdown = avr32_perf_counter_shutdown,
11828 + .start = avr32_perf_counter_start,
11829 + .stop = avr32_perf_counter_stop,
11830 + .cpu_type = "avr32",
11831 +};
11832 +
11833 +int __init oprofile_arch_init(struct oprofile_operations *ops)
11834 +{
11835 + if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
11836 + return -ENODEV;
11837 +
11838 + memcpy(ops, &avr32_perf_counter_ops,
11839 + sizeof(struct oprofile_operations));
11840 +
11841 + printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
11842 +
11843 + return 0;
11844 +}
11845 +
11846 +void oprofile_arch_exit(void)
11847 +{
11848 +
11849 +}
11850 Index: linux-2.6.24.7/Documentation/kernel-parameters.txt
11851 ===================================================================
11852 --- linux-2.6.24.7.orig/Documentation/kernel-parameters.txt
11853 +++ linux-2.6.24.7/Documentation/kernel-parameters.txt
11854 @@ -34,6 +34,7 @@ parameter is applicable:
11855 ALSA ALSA sound support is enabled.
11856 APIC APIC support is enabled.
11857 APM Advanced Power Management support is enabled.
11858 + AVR32 AVR32 architecture is enabled.
11859 AX25 Appropriate AX.25 support is enabled.
11860 BLACKFIN Blackfin architecture is enabled.
11861 DRM Direct Rendering Management support is enabled.
11862 @@ -1124,6 +1125,10 @@ and is between 256 and 4096 characters.
11863 of returning the full 64-bit number.
11864 The default is to return 64-bit inode numbers.
11865
11866 + nmi_debug= [KNL,AVR32] Specify one or more actions to take
11867 + when a NMI is triggered.
11868 + Format: [state][,regs][,debounce][,die]
11869 +
11870 nmi_watchdog= [KNL,BUGS=X86-32] Debugging features for SMP kernels
11871
11872 no387 [BUGS=X86-32] Tells the kernel to use the 387 maths
11873 Index: linux-2.6.24.7/drivers/clocksource/Makefile
11874 ===================================================================
11875 --- linux-2.6.24.7.orig/drivers/clocksource/Makefile
11876 +++ linux-2.6.24.7/drivers/clocksource/Makefile
11877 @@ -1,3 +1,4 @@
11878 +obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o
11879 obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o
11880 obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
11881 obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o
11882 Index: linux-2.6.24.7/drivers/clocksource/tcb_clksrc.c
11883 ===================================================================
11884 --- /dev/null
11885 +++ linux-2.6.24.7/drivers/clocksource/tcb_clksrc.c
11886 @@ -0,0 +1,305 @@
11887 +#include <linux/init.h>
11888 +#include <linux/clocksource.h>
11889 +#include <linux/clockchips.h>
11890 +#include <linux/interrupt.h>
11891 +#include <linux/irq.h>
11892 +
11893 +#include <linux/clk.h>
11894 +#include <linux/err.h>
11895 +#include <linux/ioport.h>
11896 +#include <linux/io.h>
11897 +#include <linux/platform_device.h>
11898 +#include <linux/atmel_tc.h>
11899 +
11900 +
11901 +/*
11902 + * We're configured to use a specific TC block, one that's not hooked
11903 + * up to external hardware, to provide a time solution:
11904 + *
11905 + * - Two channels combine to create a free-running 32 bit counter
11906 + * with a base rate of 5+ MHz, packaged as a clocksource (with
11907 + * resolution better than 200 nsec).
11908 + *
11909 + * - The third channel may be used to provide a 16-bit clockevent
11910 + * source, used in either periodic or oneshot mode. This runs
11911 + * at 32 KiHZ, and can handle delays of up to two seconds.
11912 + *
11913 + * A boot clocksource and clockevent source are also currently needed,
11914 + * unless the relevant platforms (ARM/AT91, AVR32/AT32) are changed so
11915 + * this code can be used when init_timers() is called, well before most
11916 + * devices are set up. (Some low end AT91 parts, which can run uClinux,
11917 + * have only the timers in one TC block... they currently don't support
11918 + * the tclib code, because of that initialization issue.)
11919 + *
11920 + * REVISIT behavior during system suspend states... we should disable
11921 + * all clocks and save the power. Easily done for clockevent devices,
11922 + * but clocksources won't necessarily get the needed notifications.
11923 + * For deeper system sleep states, this will be mandatory...
11924 + */
11925 +
11926 +static void __iomem *tcaddr;
11927 +
11928 +static cycle_t tc_get_cycles(void)
11929 +{
11930 + unsigned long flags;
11931 + u32 lower, upper;
11932 +
11933 + raw_local_irq_save(flags);
11934 + do {
11935 + upper = __raw_readl(tcaddr + ATMEL_TC_REG(1, CV));
11936 + lower = __raw_readl(tcaddr + ATMEL_TC_REG(0, CV));
11937 + } while (upper != __raw_readl(tcaddr + ATMEL_TC_REG(1, CV)));
11938 +
11939 + raw_local_irq_restore(flags);
11940 + return (upper << 16) | lower;
11941 +}
11942 +
11943 +static struct clocksource clksrc = {
11944 + .name = "tcb_clksrc",
11945 + .rating = 200,
11946 + .read = tc_get_cycles,
11947 + .mask = CLOCKSOURCE_MASK(32),
11948 + .shift = 18,
11949 + .flags = CLOCK_SOURCE_IS_CONTINUOUS,
11950 +};
11951 +
11952 +#ifdef CONFIG_GENERIC_CLOCKEVENTS
11953 +
11954 +struct tc_clkevt_device {
11955 + struct clock_event_device clkevt;
11956 + struct clk *clk;
11957 + void __iomem *regs;
11958 +};
11959 +
11960 +static struct tc_clkevt_device *to_tc_clkevt(struct clock_event_device *clkevt)
11961 +{
11962 + return container_of(clkevt, struct tc_clkevt_device, clkevt);
11963 +}
11964 +
11965 +/* For now, we always use the 32K clock ... this optimizes for NO_HZ,
11966 + * because using one of the divided clocks would usually mean the
11967 + * tick rate can never be less than several dozen Hz (vs 0.5 Hz).
11968 + *
11969 + * A divided clock could be good for high resolution timers, since
11970 + * 30.5 usec resolution can seem "low".
11971 + */
11972 +static u32 timer_clock;
11973 +
11974 +static void tc_mode(enum clock_event_mode m, struct clock_event_device *d)
11975 +{
11976 + struct tc_clkevt_device *tcd = to_tc_clkevt(d);
11977 + void __iomem *regs = tcd->regs;
11978 +
11979 + if (tcd->clkevt.mode == CLOCK_EVT_MODE_PERIODIC
11980 + || tcd->clkevt.mode == CLOCK_EVT_MODE_ONESHOT) {
11981 + __raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR));
11982 + __raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
11983 + clk_disable(tcd->clk);
11984 + }
11985 +
11986 + switch (m) {
11987 +
11988 + /* By not making the gentime core emulate periodic mode on top
11989 + * of oneshot, we get lower overhead and improved accuracy.
11990 + */
11991 + case CLOCK_EVT_MODE_PERIODIC:
11992 + clk_enable(tcd->clk);
11993 +
11994 + /* slow clock, count up to RC, then irq and restart */
11995 + __raw_writel(timer_clock
11996 + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO,
11997 + regs + ATMEL_TC_REG(2, CMR));
11998 + __raw_writel((32768 + HZ/2) / HZ, tcaddr + ATMEL_TC_REG(2, RC));
11999 +
12000 + /* Enable clock and interrupts on RC compare */
12001 + __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
12002 +
12003 + /* go go gadget! */
12004 + __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
12005 + regs + ATMEL_TC_REG(2, CCR));
12006 + break;
12007 +
12008 + case CLOCK_EVT_MODE_ONESHOT:
12009 + clk_enable(tcd->clk);
12010 +
12011 + /* slow clock, count up to RC, then irq and stop */
12012 + __raw_writel(timer_clock | ATMEL_TC_CPCSTOP
12013 + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO,
12014 + regs + ATMEL_TC_REG(2, CMR));
12015 + __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
12016 +
12017 + /* set_next_event() configures and starts the timer */
12018 + break;
12019 +
12020 + default:
12021 + break;
12022 + }
12023 +}
12024 +
12025 +static int tc_next_event(unsigned long delta, struct clock_event_device *d)
12026 +{
12027 + __raw_writel(delta, tcaddr + ATMEL_TC_REG(2, RC));
12028 +
12029 + /* go go gadget! */
12030 + __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
12031 + tcaddr + ATMEL_TC_REG(2, CCR));
12032 + return 0;
12033 +}
12034 +
12035 +static struct tc_clkevt_device clkevt = {
12036 + .clkevt = {
12037 + .name = "tc_clkevt",
12038 + .features = CLOCK_EVT_FEAT_PERIODIC
12039 + | CLOCK_EVT_FEAT_ONESHOT,
12040 + .shift = 32,
12041 + /* Should be lower than at91rm9200's system timer */
12042 + .rating = 125,
12043 + .cpumask = CPU_MASK_CPU0,
12044 + .set_next_event = tc_next_event,
12045 + .set_mode = tc_mode,
12046 + },
12047 +};
12048 +
12049 +static irqreturn_t ch2_irq(int irq, void *handle)
12050 +{
12051 + struct tc_clkevt_device *dev = handle;
12052 + unsigned int sr;
12053 +
12054 + sr = __raw_readl(dev->regs + ATMEL_TC_REG(2, SR));
12055 + if (sr & ATMEL_TC_CPCS) {
12056 + dev->clkevt.event_handler(&dev->clkevt);
12057 + return IRQ_HANDLED;
12058 + }
12059 +
12060 + return IRQ_NONE;
12061 +}
12062 +
12063 +static struct irqaction tc_irqaction = {
12064 + .name = "tc_clkevt",
12065 + .flags = IRQF_TIMER | IRQF_DISABLED,
12066 + .handler = ch2_irq,
12067 +};
12068 +
12069 +static void __init setup_clkevents(struct atmel_tc *tc,
12070 + struct clk *t0_clk, int clk32k_divisor_idx)
12071 +{
12072 + struct platform_device *pdev = tc->pdev;
12073 + struct clk *t2_clk = tc->clk[2];
12074 + int irq = tc->irq[2];
12075 +
12076 + clkevt.regs = tc->regs;
12077 + clkevt.clk = t2_clk;
12078 + tc_irqaction.dev_id = &clkevt;
12079 +
12080 + timer_clock = clk32k_divisor_idx;
12081 +
12082 + clkevt.clkevt.mult = div_sc(32768, NSEC_PER_SEC, clkevt.clkevt.shift);
12083 + clkevt.clkevt.max_delta_ns
12084 + = clockevent_delta2ns(0xffff, &clkevt.clkevt);
12085 + clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1;
12086 +
12087 + setup_irq(irq, &tc_irqaction);
12088 +
12089 + clockevents_register_device(&clkevt.clkevt);
12090 +}
12091 +
12092 +#else /* !CONFIG_GENERIC_CLOCKEVENTS */
12093 +
12094 +static void __init setup_clkevents(struct atmel_tc *tc,
12095 + struct clk *t0_clk, int clk32k_divisor_idx)
12096 +{
12097 + /* NOTHING */
12098 +}
12099 +
12100 +#endif
12101 +
12102 +static int __init tcb_clksrc_init(void)
12103 +{
12104 + static char bootinfo[] __initdata
12105 + = KERN_DEBUG "%s: tc%d at %d.%03d MHz\n";
12106 +
12107 + struct platform_device *pdev;
12108 + struct atmel_tc *tc;
12109 + struct clk *t0_clk, *t1_clk;
12110 + u32 rate, divided_rate = 0;
12111 + int best_divisor_idx = -1;
12112 + int clk32k_divisor_idx = -1;
12113 + int i;
12114 +
12115 + tc = atmel_tc_alloc(CONFIG_ATMEL_TCB_CLKSRC_BLOCK, clksrc.name);
12116 + if (!tc) {
12117 + pr_debug("can't alloc TC for clocksource\n");
12118 + return -ENODEV;
12119 + }
12120 + tcaddr = tc->regs;
12121 + pdev = tc->pdev;
12122 +
12123 + t0_clk = tc->clk[0];
12124 + clk_enable(t0_clk);
12125 +
12126 + /* How fast will we be counting? Pick something over 5 MHz. */
12127 + rate = (u32) clk_get_rate(t0_clk);
12128 + for (i = 0; i < 5; i++) {
12129 + unsigned divisor = atmel_tc_divisors[i];
12130 + unsigned tmp;
12131 +
12132 + /* remember 32 KiHz clock for later */
12133 + if (!divisor) {
12134 + clk32k_divisor_idx = i;
12135 + continue;
12136 + }
12137 +
12138 + tmp = rate / divisor;
12139 + pr_debug("TC: %u / %-3u [%d] --> %u\n", rate, divisor, i, tmp);
12140 + if (best_divisor_idx > 0) {
12141 + if (tmp < 5 * 1000 * 1000)
12142 + continue;
12143 + }
12144 + divided_rate = tmp;
12145 + best_divisor_idx = i;
12146 + }
12147 +
12148 + clksrc.mult = clocksource_hz2mult(divided_rate, clksrc.shift);
12149 +
12150 + printk(bootinfo, clksrc.name, CONFIG_ATMEL_TCB_CLKSRC_BLOCK,
12151 + divided_rate / 1000000,
12152 + ((divided_rate + 500000) % 1000000) / 1000);
12153 +
12154 + /* tclib will give us three clocks no matter what the
12155 + * underlying platform supports.
12156 + */
12157 + clk_enable(tc->clk[1]);
12158 +
12159 + /* channel 0: waveform mode, input mclk/8, clock TIOA0 on overflow */
12160 + __raw_writel(best_divisor_idx /* likely divide-by-8 */
12161 + | ATMEL_TC_WAVE
12162 + | ATMEL_TC_WAVESEL_UP /* free-run */
12163 + | ATMEL_TC_ACPA_SET /* TIOA0 rises at 0 */
12164 + | ATMEL_TC_ACPC_CLEAR, /* (duty cycle 50%) */
12165 + tcaddr + ATMEL_TC_REG(0, CMR));
12166 + __raw_writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA));
12167 + __raw_writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC));
12168 + __raw_writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */
12169 + __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
12170 +
12171 + /* channel 1: waveform mode, input TIOA0 */
12172 + __raw_writel(ATMEL_TC_XC1 /* input: TIOA0 */
12173 + | ATMEL_TC_WAVE
12174 + | ATMEL_TC_WAVESEL_UP, /* free-run */
12175 + tcaddr + ATMEL_TC_REG(1, CMR));
12176 + __raw_writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR)); /* no irqs */
12177 + __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR));
12178 +
12179 + /* chain channel 0 to channel 1, then reset all the timers */
12180 + __raw_writel(ATMEL_TC_TC1XC1S_TIOA0, tcaddr + ATMEL_TC_BMR);
12181 + __raw_writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
12182 +
12183 + /* and away we go! */
12184 + clocksource_register(&clksrc);
12185 +
12186 + /* channel 2: periodic and oneshot timer support */
12187 + setup_clkevents(tc, t0_clk, clk32k_divisor_idx);
12188 +
12189 + return 0;
12190 +}
12191 +arch_initcall(tcb_clksrc_init);
12192 Index: linux-2.6.24.7/drivers/i2c/busses/i2c-atmeltwi.c
12193 ===================================================================
12194 --- /dev/null
12195 +++ linux-2.6.24.7/drivers/i2c/busses/i2c-atmeltwi.c
12196 @@ -0,0 +1,436 @@
12197 +/*
12198 + * i2c Support for Atmel's Two-Wire Interface (TWI)
12199 + *
12200 + * Based on the work of Copyright (C) 2004 Rick Bronson
12201 + * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
12202 + * Ported to AVR32 and heavily modified by Espen Krangnes
12203 + * <ekrangnes at atmel.com>
12204 + *
12205 + * Copyright (C) 2006 Atmel Corporation
12206 + *
12207 + * Borrowed heavily from the original work by:
12208 + * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
12209 + *
12210 + * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
12211 + * bugs removed, interrupt routine markedly rewritten
12212 + *
12213 + * This program is free software; you can redistribute it and/or modify
12214 + * it under the terms of the GNU General Public License as published by
12215 + * the Free Software Foundation; either version 2 of the License, or
12216 + * (at your option) any later version.
12217 + */
12218 +#undef VERBOSE_DEBUG
12219 +
12220 +#include <linux/module.h>
12221 +#include <linux/slab.h>
12222 +#include <linux/i2c.h>
12223 +#include <linux/init.h>
12224 +#include <linux/clk.h>
12225 +#include <linux/err.h>
12226 +#include <linux/interrupt.h>
12227 +#include <linux/platform_device.h>
12228 +#include <linux/completion.h>
12229 +#include <linux/io.h>
12230 +
12231 +#include "i2c-atmeltwi.h"
12232 +
12233 +static unsigned int baudrate = 100 * 1000;
12234 +module_param(baudrate, uint, S_IRUGO);
12235 +MODULE_PARM_DESC(baudrate, "The TWI baudrate");
12236 +
12237 +
12238 +struct atmel_twi {
12239 + void __iomem *regs;
12240 + struct i2c_adapter adapter;
12241 + struct clk *pclk;
12242 + struct completion comp;
12243 + u32 mask;
12244 + u8 *buf;
12245 + u16 len;
12246 + u16 acks_left;
12247 + int status;
12248 + unsigned int irq;
12249 +
12250 +};
12251 +#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
12252 +
12253 +/*
12254 + * (Re)Initialize the TWI hardware registers.
12255 + */
12256 +static int twi_hwinit(struct atmel_twi *twi)
12257 +{
12258 + unsigned long cdiv, ckdiv = 0;
12259 +
12260 + /* REVISIT: wait till SCL is high before resetting; otherwise,
12261 + * some versions will wedge forever.
12262 + */
12263 +
12264 + twi_writel(twi, IDR, ~0UL);
12265 + twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/
12266 + twi_readl(twi, SR);
12267 +
12268 + cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
12269 +
12270 + while (cdiv > 255) {
12271 + ckdiv++;
12272 + cdiv = cdiv >> 1;
12273 + }
12274 +
12275 + /* REVISIT: there are various errata to consider re CDIV and CHDIV
12276 + * here, at least on at91 parts.
12277 + */
12278 +
12279 + if (ckdiv > 7)
12280 + return -EINVAL;
12281 + else
12282 + twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
12283 + | TWI_BF(CHDIV, cdiv)
12284 + | TWI_BF(CLDIV, cdiv));
12285 + return 0;
12286 +}
12287 +
12288 +/*
12289 + * Waits for the i2c status register to set the specified bitmask
12290 + * Returns 0 if timed out ... ~100ms is much longer than the SMBus
12291 + * limit, but I2C has no limit at all.
12292 + */
12293 +static int twi_complete(struct atmel_twi *twi, u32 mask)
12294 +{
12295 + int timeout = msecs_to_jiffies(100);
12296 +
12297 + mask |= TWI_BIT(TXCOMP);
12298 + twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
12299 + init_completion(&twi->comp);
12300 +
12301 + twi_writel(twi, IER, mask);
12302 +
12303 + if (!wait_for_completion_timeout(&twi->comp, timeout)) {
12304 + /* RESET TWI interface */
12305 + twi_writel(twi, CR, TWI_BIT(SWRST));
12306 +
12307 + /* Reinitialize TWI */
12308 + twi_hwinit(twi);
12309 +
12310 + return -ETIMEDOUT;
12311 + }
12312 + return 0;
12313 +}
12314 +
12315 +/*
12316 + * Generic i2c master transfer entrypoint.
12317 + */
12318 +static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
12319 +{
12320 + struct atmel_twi *twi = to_atmel_twi(adap);
12321 + int i;
12322 +
12323 + dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
12324 +
12325 + twi->status = 0;
12326 + for (i = 0; i < num; i++, pmsg++) {
12327 + twi->len = pmsg->len;
12328 + twi->buf = pmsg->buf;
12329 + twi->acks_left = pmsg->len;
12330 + twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
12331 + (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
12332 + twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
12333 +
12334 + dev_dbg(&adap->dev,
12335 + "#%d: %s %d byte%s %s dev 0x%02x\n",
12336 + i,
12337 + pmsg->flags & I2C_M_RD ? "reading" : "writing",
12338 + pmsg->len,
12339 + pmsg->len > 1 ? "s" : "",
12340 + pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
12341 +
12342 + /* enable */
12343 + twi_writel(twi, CR, TWI_BIT(MSEN));
12344 +
12345 + if (pmsg->flags & I2C_M_RD) {
12346 + /* cleanup after previous RX overruns */
12347 + while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
12348 + twi_readl(twi, RHR);
12349 +
12350 + if (twi->len == 1)
12351 + twi_writel(twi, CR,
12352 + TWI_BIT(START) | TWI_BIT(STOP));
12353 + else
12354 + twi_writel(twi, CR, TWI_BIT(START));
12355 +
12356 + if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
12357 + dev_dbg(&adap->dev, "RX[%d] timeout. "
12358 + "Stopped with %d bytes left\n",
12359 + i, twi->acks_left);
12360 + return -ETIMEDOUT;
12361 + }
12362 + } else {
12363 + twi_writel(twi, THR, twi->buf[0]);
12364 + twi->acks_left--;
12365 + /* REVISIT: some chips don't start automagically:
12366 + * twi_writel(twi, CR, TWI_BIT(START));
12367 + */
12368 + if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
12369 + dev_dbg(&adap->dev, "TX[%d] timeout. "
12370 + "Stopped with %d bytes left\n",
12371 + i, twi->acks_left);
12372 + return -ETIMEDOUT;
12373 + }
12374 + /* REVISIT: an erratum workaround may be needed here;
12375 + * see sam9261 "STOP not generated" (START either).
12376 + */
12377 + }
12378 +
12379 + /* Disable TWI interface */
12380 + twi_writel(twi, CR, TWI_BIT(MSDIS));
12381 +
12382 + if (twi->status)
12383 + return twi->status;
12384 +
12385 + /* WARNING: This driver lies about properly supporting
12386 + * repeated start, or it would *ALWAYS* return here. It
12387 + * has issued a STOP. Continuing is a false claim -- that
12388 + * a second (or third, etc.) message is part of the same
12389 + * "combined" (no STOPs between parts) message.
12390 + */
12391 +
12392 + } /* end cur msg */
12393 +
12394 + return i;
12395 +}
12396 +
12397 +
12398 +static irqreturn_t twi_interrupt(int irq, void *dev_id)
12399 +{
12400 + struct atmel_twi *twi = dev_id;
12401 + int status = twi_readl(twi, SR);
12402 +
12403 + /* Save state for later debug prints */
12404 + int old_status = status;
12405 +
12406 + if (twi->mask & status) {
12407 +
12408 + status &= twi->mask;
12409 +
12410 + if (status & TWI_BIT(RXRDY)) {
12411 + if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
12412 + /* Note weakness in fault reporting model:
12413 + * we can't say "the first N of these data
12414 + * bytes are valid".
12415 + */
12416 + dev_err(&twi->adapter.dev,
12417 + "OVERRUN RX! %04x, lost %d\n",
12418 + old_status, twi->acks_left);
12419 + twi->acks_left = 0;
12420 + twi_writel(twi, CR, TWI_BIT(STOP));
12421 + twi->status = -EOVERFLOW;
12422 + } else if (twi->acks_left > 0) {
12423 + twi->buf[twi->len - twi->acks_left] =
12424 + twi_readl(twi, RHR);
12425 + twi->acks_left--;
12426 + }
12427 + if (status & TWI_BIT(TXCOMP))
12428 + goto done;
12429 + if (twi->acks_left == 1)
12430 + twi_writel(twi, CR, TWI_BIT(STOP));
12431 +
12432 + } else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
12433 + goto done;
12434 +
12435 + } else if (status & TWI_BIT(TXRDY)) {
12436 + if (twi->acks_left > 0) {
12437 + twi_writel(twi, THR,
12438 + twi->buf[twi->len - twi->acks_left]);
12439 + twi->acks_left--;
12440 + } else
12441 + twi_writel(twi, CR, TWI_BIT(STOP));
12442 + }
12443 +
12444 + if (twi->acks_left == 0)
12445 + twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
12446 + }
12447 +
12448 + /* enabling this message helps trigger overruns/underruns ... */
12449 + dev_vdbg(&twi->adapter.dev,
12450 + "ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
12451 + old_status,
12452 + twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
12453 + twi->acks_left);
12454 +
12455 + return IRQ_HANDLED;
12456 +
12457 +done:
12458 + /* Note weak fault reporting model: we can't report how many
12459 + * bytes we sent before the NAK, or let upper layers choose
12460 + * whether to continue. The I2C stack doesn't allow that...
12461 + */
12462 + if (status & TWI_BIT(NACK)) {
12463 + dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
12464 + twi->acks_left);
12465 + twi->status = -EPIPE;
12466 +
12467 + /* TX underrun morphs automagically into a premature STOP;
12468 + * we'll probably observe UVRE even when it's not documented.
12469 + */
12470 + } else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
12471 + dev_err(&twi->adapter.dev, "UNDERRUN TX! %04x, %d to go\n",
12472 + old_status, twi->acks_left);
12473 + twi->status = -ENOSR;
12474 + }
12475 +
12476 + twi_writel(twi, IDR, ~0UL);
12477 + complete(&twi->comp);
12478 +
12479 + dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
12480 + old_status, twi->acks_left, twi->status);
12481 +
12482 + return IRQ_HANDLED;
12483 +}
12484 +
12485 +
12486 +/*
12487 + * Return list of supported functionality.
12488 + *
12489 + * NOTE: see warning above about repeated starts; this driver is falsely
12490 + * claiming to support "combined" transfers. The mid-message STOPs mean
12491 + * some slaves will never work with this driver. (Use i2c-gpio...)
12492 + */
12493 +static u32 twi_func(struct i2c_adapter *adapter)
12494 +{
12495 + return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
12496 + & ~I2C_FUNC_SMBUS_QUICK;
12497 +}
12498 +
12499 +static struct i2c_algorithm twi_algorithm = {
12500 + .master_xfer = twi_xfer,
12501 + .functionality = twi_func,
12502 +};
12503 +
12504 +/*
12505 + * Main initialization routine.
12506 + */
12507 +static int __init twi_probe(struct platform_device *pdev)
12508 +{
12509 + struct atmel_twi *twi;
12510 + struct resource *regs;
12511 + struct clk *pclk;
12512 + struct i2c_adapter *adapter;
12513 + int rc, irq;
12514 +
12515 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
12516 + if (!regs)
12517 + return -ENXIO;
12518 +
12519 + pclk = clk_get(&pdev->dev, "twi_pclk");
12520 + if (IS_ERR(pclk))
12521 + return PTR_ERR(pclk);
12522 + clk_enable(pclk);
12523 +
12524 + rc = -ENOMEM;
12525 + twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
12526 + if (!twi) {
12527 + dev_dbg(&pdev->dev, "can't allocate interface!\n");
12528 + goto err_alloc_twi;
12529 + }
12530 +
12531 + twi->pclk = pclk;
12532 + twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
12533 + if (!twi->regs)
12534 + goto err_ioremap;
12535 +
12536 + irq = platform_get_irq(pdev, 0);
12537 + rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
12538 + if (rc) {
12539 + dev_dbg(&pdev->dev, "can't bind irq!\n");
12540 + goto err_irq;
12541 + }
12542 + twi->irq = irq;
12543 +
12544 + rc = twi_hwinit(twi);
12545 + if (rc) {
12546 + dev_err(&pdev->dev, "Unable to set baudrate\n");
12547 + goto err_hw_init;
12548 + }
12549 +
12550 + adapter = &twi->adapter;
12551 + sprintf(adapter->name, "TWI");
12552 + adapter->algo = &twi_algorithm;
12553 + adapter->class = I2C_CLASS_ALL;
12554 + adapter->nr = pdev->id;
12555 + adapter->dev.parent = &pdev->dev;
12556 +
12557 + platform_set_drvdata(pdev, twi);
12558 +
12559 + rc = i2c_add_numbered_adapter(adapter);
12560 + if (rc) {
12561 + dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
12562 + adapter->name);
12563 + goto err_register;
12564 + }
12565 +
12566 + dev_info(&pdev->dev,
12567 + "Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
12568 + baudrate/1000, (unsigned long)regs->start);
12569 +
12570 + return 0;
12571 +
12572 +
12573 +err_register:
12574 + platform_set_drvdata(pdev, NULL);
12575 +
12576 +err_hw_init:
12577 + free_irq(irq, twi);
12578 +
12579 +err_irq:
12580 + iounmap(twi->regs);
12581 +
12582 +err_ioremap:
12583 + kfree(twi);
12584 +
12585 +err_alloc_twi:
12586 + clk_disable(pclk);
12587 + clk_put(pclk);
12588 +
12589 + return rc;
12590 +}
12591 +
12592 +static int __exit twi_remove(struct platform_device *pdev)
12593 +{
12594 + struct atmel_twi *twi = platform_get_drvdata(pdev);
12595 + int res;
12596 +
12597 + platform_set_drvdata(pdev, NULL);
12598 + res = i2c_del_adapter(&twi->adapter);
12599 + twi_writel(twi, CR, TWI_BIT(MSDIS));
12600 + iounmap(twi->regs);
12601 + clk_disable(twi->pclk);
12602 + clk_put(twi->pclk);
12603 + free_irq(twi->irq, twi);
12604 + kfree(twi);
12605 +
12606 + return res;
12607 +}
12608 +
12609 +static struct platform_driver twi_driver = {
12610 + .remove = __exit_p(twi_remove),
12611 + .driver = {
12612 + .name = "atmel_twi",
12613 + .owner = THIS_MODULE,
12614 + },
12615 +};
12616 +
12617 +static int __init atmel_twi_init(void)
12618 +{
12619 + return platform_driver_probe(&twi_driver, twi_probe);
12620 +}
12621 +
12622 +static void __exit atmel_twi_exit(void)
12623 +{
12624 + platform_driver_unregister(&twi_driver);
12625 +}
12626 +
12627 +module_init(atmel_twi_init);
12628 +module_exit(atmel_twi_exit);
12629 +
12630 +MODULE_AUTHOR("Espen Krangnes");
12631 +MODULE_DESCRIPTION("I2C driver for Atmel TWI");
12632 +MODULE_LICENSE("GPL");
12633 Index: linux-2.6.24.7/drivers/i2c/busses/i2c-atmeltwi.h
12634 ===================================================================
12635 --- /dev/null
12636 +++ linux-2.6.24.7/drivers/i2c/busses/i2c-atmeltwi.h
12637 @@ -0,0 +1,117 @@
12638 +/*
12639 + * Register definitions for the Atmel Two-Wire Interface
12640 + */
12641 +
12642 +#ifndef __ATMELTWI_H__
12643 +#define __ATMELTWI_H__
12644 +
12645 +/* TWI register offsets */
12646 +#define TWI_CR 0x0000
12647 +#define TWI_MMR 0x0004
12648 +#define TWI_SMR 0x0008
12649 +#define TWI_IADR 0x000c
12650 +#define TWI_CWGR 0x0010
12651 +#define TWI_SR 0x0020
12652 +#define TWI_IER 0x0024
12653 +#define TWI_IDR 0x0028
12654 +#define TWI_IMR 0x002c
12655 +#define TWI_RHR 0x0030
12656 +#define TWI_THR 0x0034
12657 +
12658 +/* Bitfields in CR */
12659 +#define TWI_START_OFFSET 0
12660 +#define TWI_START_SIZE 1
12661 +#define TWI_STOP_OFFSET 1
12662 +#define TWI_STOP_SIZE 1
12663 +#define TWI_MSEN_OFFSET 2
12664 +#define TWI_MSEN_SIZE 1
12665 +#define TWI_MSDIS_OFFSET 3
12666 +#define TWI_MSDIS_SIZE 1
12667 +#define TWI_SVEN_OFFSET 4
12668 +#define TWI_SVEN_SIZE 1
12669 +#define TWI_SVDIS_OFFSET 5
12670 +#define TWI_SVDIS_SIZE 1
12671 +#define TWI_SWRST_OFFSET 7
12672 +#define TWI_SWRST_SIZE 1
12673 +
12674 +/* Bitfields in MMR */
12675 +#define TWI_IADRSZ_OFFSET 8
12676 +#define TWI_IADRSZ_SIZE 2
12677 +#define TWI_MREAD_OFFSET 12
12678 +#define TWI_MREAD_SIZE 1
12679 +#define TWI_DADR_OFFSET 16
12680 +#define TWI_DADR_SIZE 7
12681 +
12682 +/* Bitfields in SMR */
12683 +#define TWI_SADR_OFFSET 16
12684 +#define TWI_SADR_SIZE 7
12685 +
12686 +/* Bitfields in IADR */
12687 +#define TWI_IADR_OFFSET 0
12688 +#define TWI_IADR_SIZE 24
12689 +
12690 +/* Bitfields in CWGR */
12691 +#define TWI_CLDIV_OFFSET 0
12692 +#define TWI_CLDIV_SIZE 8
12693 +#define TWI_CHDIV_OFFSET 8
12694 +#define TWI_CHDIV_SIZE 8
12695 +#define TWI_CKDIV_OFFSET 16
12696 +#define TWI_CKDIV_SIZE 3
12697 +
12698 +/* Bitfields in SR */
12699 +#define TWI_TXCOMP_OFFSET 0
12700 +#define TWI_TXCOMP_SIZE 1
12701 +#define TWI_RXRDY_OFFSET 1
12702 +#define TWI_RXRDY_SIZE 1
12703 +#define TWI_TXRDY_OFFSET 2
12704 +#define TWI_TXRDY_SIZE 1
12705 +#define TWI_SVDIR_OFFSET 3
12706 +#define TWI_SVDIR_SIZE 1
12707 +#define TWI_SVACC_OFFSET 4
12708 +#define TWI_SVACC_SIZE 1
12709 +#define TWI_GCACC_OFFSET 5
12710 +#define TWI_GCACC_SIZE 1
12711 +#define TWI_OVRE_OFFSET 6
12712 +#define TWI_OVRE_SIZE 1
12713 +#define TWI_UNRE_OFFSET 7
12714 +#define TWI_UNRE_SIZE 1
12715 +#define TWI_NACK_OFFSET 8
12716 +#define TWI_NACK_SIZE 1
12717 +#define TWI_ARBLST_OFFSET 9
12718 +#define TWI_ARBLST_SIZE 1
12719 +
12720 +/* Bitfields in RHR */
12721 +#define TWI_RXDATA_OFFSET 0
12722 +#define TWI_RXDATA_SIZE 8
12723 +
12724 +/* Bitfields in THR */
12725 +#define TWI_TXDATA_OFFSET 0
12726 +#define TWI_TXDATA_SIZE 8
12727 +
12728 +/* Constants for IADRSZ */
12729 +#define TWI_IADRSZ_NO_ADDR 0
12730 +#define TWI_IADRSZ_ONE_BYTE 1
12731 +#define TWI_IADRSZ_TWO_BYTES 2
12732 +#define TWI_IADRSZ_THREE_BYTES 3
12733 +
12734 +/* Bit manipulation macros */
12735 +#define TWI_BIT(name) \
12736 + (1 << TWI_##name##_OFFSET)
12737 +#define TWI_BF(name, value) \
12738 + (((value) & ((1 << TWI_##name##_SIZE) - 1)) \
12739 + << TWI_##name##_OFFSET)
12740 +#define TWI_BFEXT(name, value) \
12741 + (((value) >> TWI_##name##_OFFSET) \
12742 + & ((1 << TWI_##name##_SIZE) - 1))
12743 +#define TWI_BFINS(name, value, old) \
12744 + (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \
12745 + << TWI_##name##_OFFSET)) \
12746 + | TWI_BF(name, (value)))
12747 +
12748 +/* Register access macros */
12749 +#define twi_readl(port, reg) \
12750 + __raw_readl((port)->regs + TWI_##reg)
12751 +#define twi_writel(port, reg, value) \
12752 + __raw_writel((value), (port)->regs + TWI_##reg)
12753 +
12754 +#endif /* __ATMELTWI_H__ */
12755 Index: linux-2.6.24.7/drivers/i2c/busses/Kconfig
12756 ===================================================================
12757 --- linux-2.6.24.7.orig/drivers/i2c/busses/Kconfig
12758 +++ linux-2.6.24.7/drivers/i2c/busses/Kconfig
12759 @@ -88,6 +88,14 @@ config I2C_AT91
12760 to support combined I2C messages. Use the i2c-gpio driver
12761 unless your system can cope with those limitations.
12762
12763 +config I2C_ATMELTWI
12764 + tristate "Atmel Two-Wire Interface (TWI)"
12765 + depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
12766 + help
12767 + Atmel on-chip TWI controller. Say Y if you have an AT32 or
12768 + AT91-based device and want to use its built-in TWI
12769 + functionality.
12770 +
12771 config I2C_AU1550
12772 tristate "Au1550/Au1200 SMBus interface"
12773 depends on SOC_AU1550 || SOC_AU1200
12774 Index: linux-2.6.24.7/drivers/i2c/busses/Makefile
12775 ===================================================================
12776 --- linux-2.6.24.7.orig/drivers/i2c/busses/Makefile
12777 +++ linux-2.6.24.7/drivers/i2c/busses/Makefile
12778 @@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
12779 obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
12780 obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
12781 obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
12782 +obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o
12783
12784 ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
12785 EXTRA_CFLAGS += -DDEBUG
12786 Index: linux-2.6.24.7/drivers/input/serio/at32psif.c
12787 ===================================================================
12788 --- /dev/null
12789 +++ linux-2.6.24.7/drivers/input/serio/at32psif.c
12790 @@ -0,0 +1,351 @@
12791 +/*
12792 + * Copyright (C) 2007 Atmel Corporation
12793 + *
12794 + * Driver for the AT32AP700X PS/2 controller (PSIF).
12795 + *
12796 + * This program is free software; you can redistribute it and/or modify it
12797 + * under the terms of the GNU General Public License version 2 as published
12798 + * by the Free Software Foundation.
12799 + */
12800 +#include <linux/kernel.h>
12801 +#include <linux/module.h>
12802 +#include <linux/device.h>
12803 +#include <linux/init.h>
12804 +#include <linux/serio.h>
12805 +#include <linux/timer.h>
12806 +#include <linux/interrupt.h>
12807 +#include <linux/err.h>
12808 +#include <linux/io.h>
12809 +#include <linux/clk.h>
12810 +#include <linux/platform_device.h>
12811 +
12812 +#include "at32psif.h"
12813 +
12814 +#define PSIF_BUF_SIZE 16
12815 +
12816 +#define ring_is_empty(_psif) (_psif->head == _psif->tail)
12817 +#define ring_next_head(_psif) ((_psif->head + 1) & (PSIF_BUF_SIZE - 1))
12818 +#define ring_next_tail(_psif) ((_psif->tail + 1) & (PSIF_BUF_SIZE - 1))
12819 +
12820 +struct psif {
12821 + struct platform_device *pdev;
12822 + struct clk *pclk;
12823 + struct serio *io;
12824 + struct timer_list tx_timer;
12825 + void __iomem *regs;
12826 + unsigned int irq;
12827 + unsigned int open;
12828 + /* Prevent concurrent writes to circular buffer. */
12829 + spinlock_t lock;
12830 + unsigned int head;
12831 + unsigned int tail;
12832 + unsigned char buffer[PSIF_BUF_SIZE];
12833 +};
12834 +
12835 +static irqreturn_t psif_interrupt(int irq, void *_ptr)
12836 +{
12837 + struct psif *psif = _ptr;
12838 + int retval = IRQ_NONE;
12839 + unsigned int io_flags = 0;
12840 + unsigned long status;
12841 +
12842 + status = psif_readl(psif, SR);
12843 +
12844 + if (status & PSIF_BIT(RXRDY)) {
12845 + unsigned char val = (unsigned char) psif_readl(psif, RHR);
12846 +
12847 + if (status & PSIF_BIT(PARITY))
12848 + io_flags |= SERIO_PARITY;
12849 + if (status & PSIF_BIT(OVRUN))
12850 + dev_err(&psif->pdev->dev, "overrun read error\n");
12851 +
12852 + serio_interrupt(psif->io, val, io_flags);
12853 +
12854 + retval = IRQ_HANDLED;
12855 + }
12856 +
12857 + spin_lock(&psif->lock);
12858 +
12859 + if (status & PSIF_BIT(TXEMPTY)) {
12860 + if (status & PSIF_BIT(NACK))
12861 + dev_err(&psif->pdev->dev, "NACK error\n");
12862 +
12863 + psif_writel(psif, IDR, PSIF_BIT(TXEMPTY));
12864 +
12865 + if (!ring_is_empty(psif))
12866 + mod_timer(&psif->tx_timer,
12867 + jiffies + msecs_to_jiffies(1));
12868 +
12869 + retval = IRQ_HANDLED;
12870 + }
12871 +
12872 + spin_unlock(&psif->lock);
12873 +
12874 + return retval;
12875 +}
12876 +
12877 +static void psif_transmit_data(unsigned long data)
12878 +{
12879 + struct psif *psif = (struct psif *)data;
12880 + unsigned long flags;
12881 +
12882 + spin_lock_irqsave(&psif->lock, flags);
12883 +
12884 + psif_writel(psif, THR, psif->buffer[psif->tail]);
12885 + psif->tail = ring_next_tail(psif);
12886 +
12887 + if (!ring_is_empty(psif))
12888 + psif_writel(psif, IER, PSIF_BIT(TXEMPTY));
12889 +
12890 + spin_unlock_irqrestore(&psif->lock, flags);
12891 +}
12892 +
12893 +static int psif_write(struct serio *io, unsigned char val)
12894 +{
12895 + struct psif *psif = io->port_data;
12896 + unsigned long flags;
12897 + unsigned int head;
12898 +
12899 + spin_lock_irqsave(&psif->lock, flags);
12900 +
12901 + head = ring_next_head(psif);
12902 +
12903 + if (head != psif->tail) {
12904 + psif->buffer[psif->head] = val;
12905 + psif->head = head;
12906 + } else {
12907 + dev_err(&psif->pdev->dev, "underrun write error\n");
12908 + }
12909 +
12910 + spin_unlock_irqrestore(&psif->lock, flags);
12911 +
12912 + /* Make sure TXEMPTY interrupt is enabled. */
12913 + psif_writel(psif, IER, PSIF_BIT(TXEMPTY));
12914 +
12915 + return 0;
12916 +}
12917 +
12918 +static int psif_open(struct serio *io)
12919 +{
12920 + struct psif *psif = io->port_data;
12921 + int retval;
12922 +
12923 + retval = clk_enable(psif->pclk);
12924 + if (retval)
12925 + goto out;
12926 +
12927 + psif_writel(psif, CR, PSIF_BIT(CR_TXEN) | PSIF_BIT(CR_RXEN));
12928 + psif_writel(psif, IER, PSIF_BIT(RXRDY));
12929 +
12930 + psif->open = 1;
12931 +out:
12932 + return retval;
12933 +}
12934 +
12935 +static void psif_close(struct serio *io)
12936 +{
12937 + struct psif *psif = io->port_data;
12938 +
12939 + psif->open = 0;
12940 +
12941 + psif_writel(psif, IDR, ~0UL);
12942 + psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
12943 +
12944 + clk_disable(psif->pclk);
12945 +}
12946 +
12947 +static void psif_set_prescaler(struct psif *psif)
12948 +{
12949 + unsigned long prscv;
12950 + unsigned long rate = clk_get_rate(psif->pclk);
12951 +
12952 + /* PRSCV = Pulse length (100 us) * PSIF module frequency. */
12953 + prscv = 100 * (rate / 1000000UL);
12954 +
12955 + if (prscv > ((1<<PSIF_PSR_PRSCV_SIZE) - 1)) {
12956 + prscv = (1<<PSIF_PSR_PRSCV_SIZE) - 1;
12957 + dev_dbg(&psif->pdev->dev, "pclk too fast, "
12958 + "prescaler set to max\n");
12959 + }
12960 +
12961 + clk_enable(psif->pclk);
12962 + psif_writel(psif, PSR, prscv);
12963 + clk_disable(psif->pclk);
12964 +}
12965 +
12966 +static int __init psif_probe(struct platform_device *pdev)
12967 +{
12968 + struct resource *regs;
12969 + struct psif *psif;
12970 + struct serio *io;
12971 + struct clk *pclk;
12972 + int irq;
12973 + int ret;
12974 +
12975 + psif = kzalloc(sizeof(struct psif), GFP_KERNEL);
12976 + if (!psif) {
12977 + dev_dbg(&pdev->dev, "out of memory\n");
12978 + ret = -ENOMEM;
12979 + goto out;
12980 + }
12981 + psif->pdev = pdev;
12982 +
12983 + io = kzalloc(sizeof(struct serio), GFP_KERNEL);
12984 + if (!io) {
12985 + dev_dbg(&pdev->dev, "out of memory\n");
12986 + ret = -ENOMEM;
12987 + goto out_free_psif;
12988 + }
12989 + psif->io = io;
12990 +
12991 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
12992 + if (!regs) {
12993 + dev_dbg(&pdev->dev, "no mmio resources defined\n");
12994 + ret = -ENOMEM;
12995 + goto out_free_io;
12996 + }
12997 +
12998 + psif->regs = ioremap(regs->start, regs->end - regs->start + 1);
12999 + if (!psif->regs) {
13000 + ret = -ENOMEM;
13001 + dev_dbg(&pdev->dev, "could not map I/O memory\n");
13002 + goto out_free_io;
13003 + }
13004 +
13005 + pclk = clk_get(&pdev->dev, "pclk");
13006 + if (IS_ERR(pclk)) {
13007 + dev_dbg(&pdev->dev, "could not get peripheral clock\n");
13008 + ret = PTR_ERR(pclk);
13009 + goto out_iounmap;
13010 + }
13011 + psif->pclk = pclk;
13012 +
13013 + /* Reset the PSIF to enter at a known state. */
13014 + ret = clk_enable(pclk);
13015 + if (ret) {
13016 + dev_dbg(&pdev->dev, "could not enable pclk\n");
13017 + goto out_put_clk;
13018 + }
13019 + psif_writel(psif, CR, PSIF_BIT(CR_SWRST));
13020 + clk_disable(pclk);
13021 +
13022 + setup_timer(&psif->tx_timer, psif_transmit_data, (unsigned long)psif);
13023 +
13024 + irq = platform_get_irq(pdev, 0);
13025 + if (irq < 0) {
13026 + dev_dbg(&pdev->dev, "could not get irq\n");
13027 + ret = -ENXIO;
13028 + goto out_put_clk;
13029 + }
13030 + ret = request_irq(irq, psif_interrupt, IRQF_SHARED, "at32psif", psif);
13031 + if (ret) {
13032 + dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
13033 + goto out_put_clk;
13034 + }
13035 + psif->irq = irq;
13036 +
13037 + io->id.type = SERIO_8042;
13038 + io->write = psif_write;
13039 + io->open = psif_open;
13040 + io->close = psif_close;
13041 + strlcpy(io->name, pdev->dev.bus_id, sizeof(io->name));
13042 + strlcpy(io->phys, pdev->dev.bus_id, sizeof(io->phys));
13043 + io->port_data = psif;
13044 + io->dev.parent = &pdev->dev;
13045 +
13046 + psif_set_prescaler(psif);
13047 +
13048 + spin_lock_init(&psif->lock);
13049 + serio_register_port(psif->io);
13050 + platform_set_drvdata(pdev, psif);
13051 +
13052 + dev_info(&pdev->dev, "Atmel AVR32 PSIF PS/2 driver on 0x%08x irq %d\n",
13053 + (int)psif->regs, psif->irq);
13054 +
13055 + return 0;
13056 +
13057 +out_put_clk:
13058 + clk_put(psif->pclk);
13059 +out_iounmap:
13060 + iounmap(psif->regs);
13061 +out_free_io:
13062 + kfree(io);
13063 +out_free_psif:
13064 + kfree(psif);
13065 +out:
13066 + return ret;
13067 +}
13068 +
13069 +static int __exit psif_remove(struct platform_device *pdev)
13070 +{
13071 + struct psif *psif = platform_get_drvdata(pdev);
13072 +
13073 + psif_writel(psif, IDR, ~0UL);
13074 + psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
13075 +
13076 + serio_unregister_port(psif->io);
13077 + iounmap(psif->regs);
13078 + free_irq(psif->irq, psif);
13079 + clk_put(psif->pclk);
13080 + kfree(psif);
13081 +
13082 + platform_set_drvdata(pdev, NULL);
13083 +
13084 + return 0;
13085 +}
13086 +
13087 +#ifdef CONFIG_PM
13088 +static int psif_suspend(struct platform_device *pdev, pm_message_t state)
13089 +{
13090 + struct psif *psif = platform_get_drvdata(pdev);
13091 +
13092 + if (psif->open) {
13093 + psif_writel(psif, CR, PSIF_BIT(CR_RXDIS) | PSIF_BIT(CR_TXDIS));
13094 + clk_disable(psif->pclk);
13095 + }
13096 +
13097 + return 0;
13098 +}
13099 +
13100 +static int psif_resume(struct platform_device *pdev)
13101 +{
13102 + struct psif *psif = platform_get_drvdata(pdev);
13103 +
13104 + if (psif->open) {
13105 + clk_enable(psif->pclk);
13106 + psif_set_prescaler(psif);
13107 + psif_writel(psif, CR, PSIF_BIT(CR_RXEN) | PSIF_BIT(CR_TXEN));
13108 + }
13109 +
13110 + return 0;
13111 +}
13112 +#else
13113 +#define psif_suspend NULL
13114 +#define psif_resume NULL
13115 +#endif
13116 +
13117 +static struct platform_driver psif_driver = {
13118 + .remove = __exit_p(psif_remove),
13119 + .driver = {
13120 + .name = "atmel_psif",
13121 + },
13122 + .suspend = psif_suspend,
13123 + .resume = psif_resume,
13124 +};
13125 +
13126 +static int __init psif_init(void)
13127 +{
13128 + return platform_driver_probe(&psif_driver, psif_probe);
13129 +}
13130 +
13131 +static void __exit psif_exit(void)
13132 +{
13133 + platform_driver_unregister(&psif_driver);
13134 +}
13135 +
13136 +module_init(psif_init);
13137 +module_exit(psif_exit);
13138 +
13139 +MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
13140 +MODULE_DESCRIPTION("Atmel AVR32 PSIF PS/2 driver");
13141 +MODULE_LICENSE("GPL");
13142 Index: linux-2.6.24.7/drivers/input/serio/at32psif.h
13143 ===================================================================
13144 --- /dev/null
13145 +++ linux-2.6.24.7/drivers/input/serio/at32psif.h
13146 @@ -0,0 +1,82 @@
13147 +/*
13148 + * Copyright (C) 2007 Atmel Corporation
13149 + *
13150 + * Driver for the AT32AP700X PS/2 controller (PSIF).
13151 + *
13152 + * This program is free software; you can redistribute it and/or modify it
13153 + * under the terms of the GNU General Public License version 2 as published
13154 + * by the Free Software Foundation.
13155 + */
13156 +
13157 +#ifndef _AT32PSIF_H
13158 +#define _AT32PSIF_H
13159 +
13160 +/* PSIF register offsets */
13161 +#define PSIF_CR 0x00
13162 +#define PSIF_RHR 0x04
13163 +#define PSIF_THR 0x08
13164 +#define PSIF_SR 0x10
13165 +#define PSIF_IER 0x14
13166 +#define PSIF_IDR 0x18
13167 +#define PSIF_IMR 0x1c
13168 +#define PSIF_PSR 0x24
13169 +
13170 +/* Bitfields in control register. */
13171 +#define PSIF_CR_RXDIS_OFFSET 1
13172 +#define PSIF_CR_RXDIS_SIZE 1
13173 +#define PSIF_CR_RXEN_OFFSET 0
13174 +#define PSIF_CR_RXEN_SIZE 1
13175 +#define PSIF_CR_SWRST_OFFSET 15
13176 +#define PSIF_CR_SWRST_SIZE 1
13177 +#define PSIF_CR_TXDIS_OFFSET 9
13178 +#define PSIF_CR_TXDIS_SIZE 1
13179 +#define PSIF_CR_TXEN_OFFSET 8
13180 +#define PSIF_CR_TXEN_SIZE 1
13181 +
13182 +/* Bitfields in interrupt disable, enable, mask and status register. */
13183 +#define PSIF_NACK_OFFSET 8
13184 +#define PSIF_NACK_SIZE 1
13185 +#define PSIF_OVRUN_OFFSET 5
13186 +#define PSIF_OVRUN_SIZE 1
13187 +#define PSIF_PARITY_OFFSET 9
13188 +#define PSIF_PARITY_SIZE 1
13189 +#define PSIF_RXRDY_OFFSET 4
13190 +#define PSIF_RXRDY_SIZE 1
13191 +#define PSIF_TXEMPTY_OFFSET 1
13192 +#define PSIF_TXEMPTY_SIZE 1
13193 +#define PSIF_TXRDY_OFFSET 0
13194 +#define PSIF_TXRDY_SIZE 1
13195 +
13196 +/* Bitfields in prescale register. */
13197 +#define PSIF_PSR_PRSCV_OFFSET 0
13198 +#define PSIF_PSR_PRSCV_SIZE 12
13199 +
13200 +/* Bitfields in receive hold register. */
13201 +#define PSIF_RHR_RXDATA_OFFSET 0
13202 +#define PSIF_RHR_RXDATA_SIZE 8
13203 +
13204 +/* Bitfields in transmit hold register. */
13205 +#define PSIF_THR_TXDATA_OFFSET 0
13206 +#define PSIF_THR_TXDATA_SIZE 8
13207 +
13208 +/* Bit manipulation macros */
13209 +#define PSIF_BIT(name) \
13210 + (1 << PSIF_##name##_OFFSET)
13211 +#define PSIF_BF(name, value) \
13212 + (((value) & ((1 << PSIF_##name##_SIZE) - 1)) \
13213 + << PSIF_##name##_OFFSET)
13214 +#define PSIF_BFEXT(name, value)\
13215 + (((value) >> PSIF_##name##_OFFSET) \
13216 + & ((1 << PSIF_##name##_SIZE) - 1))
13217 +#define PSIF_BFINS(name, value, old) \
13218 + (((old) & ~(((1 << PSIF_##name##_SIZE) - 1) \
13219 + << PSIF_##name##_OFFSET)) \
13220 + | PSIF_BF(name, value))
13221 +
13222 +/* Register access macros */
13223 +#define psif_readl(port, reg) \
13224 + __raw_readl((port)->regs + PSIF_##reg)
13225 +#define psif_writel(port, reg, value) \
13226 + __raw_writel((value), (port)->regs + PSIF_##reg)
13227 +
13228 +#endif /* _AT32PSIF_H */
13229 Index: linux-2.6.24.7/drivers/input/serio/Kconfig
13230 ===================================================================
13231 --- linux-2.6.24.7.orig/drivers/input/serio/Kconfig
13232 +++ linux-2.6.24.7/drivers/input/serio/Kconfig
13233 @@ -88,6 +88,17 @@ config SERIO_RPCKBD
13234 To compile this driver as a module, choose M here: the
13235 module will be called rpckbd.
13236
13237 +config SERIO_AT32PSIF
13238 + tristate "AVR32 PSIF PS/2 keyboard and mouse controller"
13239 + depends on AVR32
13240 + default n
13241 + help
13242 + Say Y here if you want to use the PSIF peripheral on AVR32 devices
13243 + and connect a PS/2 keyboard and/or mouse to it.
13244 +
13245 + To compile this driver as a module, choose M here: the module will
13246 + be called at32psif.
13247 +
13248 config SERIO_AMBAKMI
13249 tristate "AMBA KMI keyboard controller"
13250 depends on ARM_AMBA
13251 Index: linux-2.6.24.7/drivers/input/serio/Makefile
13252 ===================================================================
13253 --- linux-2.6.24.7.orig/drivers/input/serio/Makefile
13254 +++ linux-2.6.24.7/drivers/input/serio/Makefile
13255 @@ -12,6 +12,7 @@ obj-$(CONFIG_SERIO_CT82C710) += ct82c710
13256 obj-$(CONFIG_SERIO_RPCKBD) += rpckbd.o
13257 obj-$(CONFIG_SERIO_SA1111) += sa1111ps2.o
13258 obj-$(CONFIG_SERIO_AMBAKMI) += ambakmi.o
13259 +obj-$(CONFIG_SERIO_AT32PSIF) += at32psif.o
13260 obj-$(CONFIG_SERIO_Q40KBD) += q40kbd.o
13261 obj-$(CONFIG_SERIO_GSCPS2) += gscps2.o
13262 obj-$(CONFIG_HP_SDC) += hp_sdc.o
13263 Index: linux-2.6.24.7/drivers/leds/Kconfig
13264 ===================================================================
13265 --- linux-2.6.24.7.orig/drivers/leds/Kconfig
13266 +++ linux-2.6.24.7/drivers/leds/Kconfig
13267 @@ -18,6 +18,13 @@ config LEDS_CLASS
13268
13269 comment "LED drivers"
13270
13271 +config LEDS_ATMEL_PWM
13272 + tristate "LED Support using Atmel PWM outputs"
13273 + depends on LEDS_CLASS && ATMEL_PWM
13274 + help
13275 + This option enables support for LEDs driven using outputs
13276 + of the dedicated PWM controller found on newer Atmel SOCs.
13277 +
13278 config LEDS_CORGI
13279 tristate "LED Support for the Sharp SL-C7x0 series"
13280 depends on LEDS_CLASS && PXA_SHARP_C7xx
13281 Index: linux-2.6.24.7/drivers/leds/leds-atmel-pwm.c
13282 ===================================================================
13283 --- /dev/null
13284 +++ linux-2.6.24.7/drivers/leds/leds-atmel-pwm.c
13285 @@ -0,0 +1,155 @@
13286 +#include <linux/kernel.h>
13287 +#include <linux/platform_device.h>
13288 +#include <linux/leds.h>
13289 +#include <linux/io.h>
13290 +#include <linux/atmel_pwm.h>
13291 +
13292 +
13293 +struct pwmled {
13294 + struct led_classdev cdev;
13295 + struct pwm_channel pwmc;
13296 + struct gpio_led *desc;
13297 + u32 mult;
13298 + u8 active_low;
13299 +};
13300 +
13301 +
13302 +/*
13303 + * For simplicity, we use "brightness" as if it were a linear function
13304 + * of PWM duty cycle. However, a logarithmic function of duty cycle is
13305 + * probably a better match for perceived brightness: two is half as bright
13306 + * as four, four is half as bright as eight, etc
13307 + */
13308 +static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b)
13309 +{
13310 + struct pwmled *led;
13311 +
13312 + /* update the duty cycle for the *next* period */
13313 + led = container_of(cdev, struct pwmled, cdev);
13314 + pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b);
13315 +}
13316 +
13317 +/*
13318 + * NOTE: we reuse the platform_data structure of GPIO leds,
13319 + * but repurpose its "gpio" number as a PWM channel number.
13320 + */
13321 +static int __init pwmled_probe(struct platform_device *pdev)
13322 +{
13323 + const struct gpio_led_platform_data *pdata;
13324 + struct pwmled *leds;
13325 + unsigned i;
13326 + int status;
13327 +
13328 + pdata = pdev->dev.platform_data;
13329 + if (!pdata || pdata->num_leds < 1)
13330 + return -ENODEV;
13331 +
13332 + leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL);
13333 + if (!leds)
13334 + return -ENOMEM;
13335 +
13336 + for (i = 0; i < pdata->num_leds; i++) {
13337 + struct pwmled *led = leds + i;
13338 + const struct gpio_led *dat = pdata->leds + i;
13339 + u32 tmp;
13340 +
13341 + led->cdev.name = dat->name;
13342 + led->cdev.brightness = LED_OFF;
13343 + led->cdev.brightness_set = pwmled_brightness;
13344 + led->cdev.default_trigger = dat->default_trigger;
13345 +
13346 + led->active_low = dat->active_low;
13347 +
13348 + status = pwm_channel_alloc(dat->gpio, &led->pwmc);
13349 + if (status < 0)
13350 + goto err;
13351 +
13352 + /*
13353 + * Prescale clock by 2^x, so PWM counts in low MHz.
13354 + * Start each cycle with the LED active, so increasing
13355 + * the duty cycle gives us more time on (== brighter).
13356 + */
13357 + tmp = 5;
13358 + if (!led->active_low)
13359 + tmp |= PWM_CPR_CPOL;
13360 + pwm_channel_writel(&led->pwmc, PWM_CMR, tmp);
13361 +
13362 + /*
13363 + * Pick a period so PWM cycles at 100+ Hz; and a multiplier
13364 + * for scaling duty cycle: brightness * mult.
13365 + */
13366 + tmp = (led->pwmc.mck / (1 << 5)) / 100;
13367 + tmp /= 255;
13368 + led->mult = tmp;
13369 + pwm_channel_writel(&led->pwmc, PWM_CDTY,
13370 + led->cdev.brightness * 255);
13371 + pwm_channel_writel(&led->pwmc, PWM_CPRD,
13372 + LED_FULL * tmp);
13373 +
13374 + pwm_channel_enable(&led->pwmc);
13375 +
13376 + /* Hand it over to the LED framework */
13377 + status = led_classdev_register(&pdev->dev, &led->cdev);
13378 + if (status < 0) {
13379 + pwm_channel_free(&led->pwmc);
13380 + goto err;
13381 + }
13382 + }
13383 +
13384 + platform_set_drvdata(pdev, leds);
13385 + return 0;
13386 +
13387 +err:
13388 + while (i-- > 0) {
13389 + led_classdev_unregister(&leds[i].cdev);
13390 + pwm_channel_free(&leds[i].pwmc);
13391 + }
13392 + kfree(leds);
13393 +
13394 + return status;
13395 +}
13396 +
13397 +static int __exit pwmled_remove(struct platform_device *pdev)
13398 +{
13399 + const struct gpio_led_platform_data *pdata;
13400 + struct pwmled *leds;
13401 + unsigned i;
13402 +
13403 + pdata = pdev->dev.platform_data;
13404 + leds = platform_get_drvdata(pdev);
13405 +
13406 + for (i = 0; i < pdata->num_leds; i++) {
13407 + struct pwmled *led = leds + i;
13408 +
13409 + led_classdev_unregister(&led->cdev);
13410 + pwm_channel_free(&led->pwmc);
13411 + }
13412 +
13413 + kfree(leds);
13414 + platform_set_drvdata(pdev, NULL);
13415 + return 0;
13416 +}
13417 +
13418 +static struct platform_driver pwmled_driver = {
13419 + .driver = {
13420 + .name = "leds-atmel-pwm",
13421 + .owner = THIS_MODULE,
13422 + },
13423 + /* REVISIT add suspend() and resume() methods */
13424 + .remove = __exit_p(pwmled_remove),
13425 +};
13426 +
13427 +static int __init modinit(void)
13428 +{
13429 + return platform_driver_probe(&pwmled_driver, pwmled_probe);
13430 +}
13431 +module_init(modinit);
13432 +
13433 +static void __exit modexit(void)
13434 +{
13435 + platform_driver_unregister(&pwmled_driver);
13436 +}
13437 +module_exit(modexit);
13438 +
13439 +MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness");
13440 +MODULE_LICENSE("GPL");
13441 Index: linux-2.6.24.7/drivers/leds/Makefile
13442 ===================================================================
13443 --- linux-2.6.24.7.orig/drivers/leds/Makefile
13444 +++ linux-2.6.24.7/drivers/leds/Makefile
13445 @@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS) += led-class.o
13446 obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o
13447
13448 # LED Platform Drivers
13449 +obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o
13450 obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o
13451 obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o
13452 obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o
13453 Index: linux-2.6.24.7/drivers/misc/atmel_pwm.c
13454 ===================================================================
13455 --- /dev/null
13456 +++ linux-2.6.24.7/drivers/misc/atmel_pwm.c
13457 @@ -0,0 +1,409 @@
13458 +#include <linux/module.h>
13459 +#include <linux/clk.h>
13460 +#include <linux/err.h>
13461 +#include <linux/io.h>
13462 +#include <linux/interrupt.h>
13463 +#include <linux/platform_device.h>
13464 +#include <linux/atmel_pwm.h>
13465 +
13466 +
13467 +/*
13468 + * This is a simple driver for the PWM controller found in various newer
13469 + * Atmel SOCs, including the AVR32 series and the AT91sam9263.
13470 + *
13471 + * Chips with current Linux ports have only 4 PWM channels, out of max 32.
13472 + * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
13473 + * Docs are inconsistent about the width of the channel counter registers;
13474 + * it's at least 16 bits, but several places say 20 bits.
13475 + */
13476 +#define PWM_NCHAN 4 /* max 32 */
13477 +
13478 +struct pwm {
13479 + spinlock_t lock;
13480 + struct platform_device *pdev;
13481 + u32 mask;
13482 + int irq;
13483 + void __iomem *base;
13484 + struct clk *clk;
13485 + struct pwm_channel *channel[PWM_NCHAN];
13486 + void (*handler[PWM_NCHAN])(struct pwm_channel *);
13487 +};
13488 +
13489 +
13490 +/* global PWM controller registers */
13491 +#define PWM_MR 0x00
13492 +#define PWM_ENA 0x04
13493 +#define PWM_DIS 0x08
13494 +#define PWM_SR 0x0c
13495 +#define PWM_IER 0x10
13496 +#define PWM_IDR 0x14
13497 +#define PWM_IMR 0x18
13498 +#define PWM_ISR 0x1c
13499 +
13500 +static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
13501 +{
13502 + __raw_writel(val, p->base + offset);
13503 +}
13504 +
13505 +static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
13506 +{
13507 + return __raw_readl(p->base + offset);
13508 +}
13509 +
13510 +static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
13511 +{
13512 + return p->base + 0x200 + index * 0x20;
13513 +}
13514 +
13515 +static struct pwm *pwm;
13516 +
13517 +static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
13518 +{
13519 + struct device *dev = &pwm->pdev->dev;
13520 +
13521 + dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
13522 + tag,
13523 + pwm_readl(pwm, PWM_MR),
13524 + pwm_readl(pwm, PWM_SR),
13525 + pwm_readl(pwm, PWM_IMR));
13526 + dev_dbg(dev,
13527 + "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
13528 + ch->index,
13529 + pwm_channel_readl(ch, PWM_CMR),
13530 + pwm_channel_readl(ch, PWM_CDTY),
13531 + pwm_channel_readl(ch, PWM_CPRD),
13532 + pwm_channel_readl(ch, PWM_CCNT));
13533 +}
13534 +
13535 +
13536 +/**
13537 + * pwm_channel_alloc - allocate an unused PWM channel
13538 + * @index: identifies the channel
13539 + * @ch: structure to be initialized
13540 + *
13541 + * Drivers allocate PWM channels according to the board's wiring, and
13542 + * matching board-specific setup code. Returns zero or negative errno.
13543 + */
13544 +int pwm_channel_alloc(int index, struct pwm_channel *ch)
13545 +{
13546 + unsigned long flags;
13547 + int status = 0;
13548 +
13549 + /* insist on PWM init, with this signal pinned out */
13550 + if (!pwm || !(pwm->mask & 1 << index))
13551 + return -ENODEV;
13552 +
13553 + if (index < 0 || index >= PWM_NCHAN || !ch)
13554 + return -EINVAL;
13555 + memset(ch, 0, sizeof *ch);
13556 +
13557 + spin_lock_irqsave(&pwm->lock, flags);
13558 + if (pwm->channel[index])
13559 + status = -EBUSY;
13560 + else {
13561 + clk_enable(pwm->clk);
13562 +
13563 + ch->regs = pwmc_regs(pwm, index);
13564 + ch->index = index;
13565 +
13566 + /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
13567 + ch->mck = clk_get_rate(pwm->clk);
13568 +
13569 + pwm->channel[index] = ch;
13570 + pwm->handler[index] = NULL;
13571 +
13572 + /* channel and irq are always disabled when we return */
13573 + pwm_writel(pwm, PWM_DIS, 1 << index);
13574 + pwm_writel(pwm, PWM_IDR, 1 << index);
13575 + }
13576 + spin_unlock_irqrestore(&pwm->lock, flags);
13577 + return status;
13578 +}
13579 +EXPORT_SYMBOL(pwm_channel_alloc);
13580 +
13581 +static int pwmcheck(struct pwm_channel *ch)
13582 +{
13583 + int index;
13584 +
13585 + if (!pwm)
13586 + return -ENODEV;
13587 + if (!ch)
13588 + return -EINVAL;
13589 + index = ch->index;
13590 + if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
13591 + return -EINVAL;
13592 +
13593 + return index;
13594 +}
13595 +
13596 +/**
13597 + * pwm_channel_free - release a previously allocated channel
13598 + * @ch: the channel being released
13599 + *
13600 + * The channel is completely shut down (counter and IRQ disabled),
13601 + * and made available for re-use. Returns zero, or negative errno.
13602 + */
13603 +int pwm_channel_free(struct pwm_channel *ch)
13604 +{
13605 + unsigned long flags;
13606 + int t;
13607 +
13608 + spin_lock_irqsave(&pwm->lock, flags);
13609 + t = pwmcheck(ch);
13610 + if (t >= 0) {
13611 + pwm->channel[t] = NULL;
13612 + pwm->handler[t] = NULL;
13613 +
13614 + /* channel and irq are always disabled when we return */
13615 + pwm_writel(pwm, PWM_DIS, 1 << t);
13616 + pwm_writel(pwm, PWM_IDR, 1 << t);
13617 +
13618 + clk_disable(pwm->clk);
13619 + t = 0;
13620 + }
13621 + spin_unlock_irqrestore(&pwm->lock, flags);
13622 + return t;
13623 +}
13624 +EXPORT_SYMBOL(pwm_channel_free);
13625 +
13626 +int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
13627 +{
13628 + unsigned long flags;
13629 + int t;
13630 +
13631 + /* OMITTED FUNCTIONALITY: starting several channels in synch */
13632 +
13633 + spin_lock_irqsave(&pwm->lock, flags);
13634 + t = pwmcheck(ch);
13635 + if (t >= 0) {
13636 + pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
13637 + t = 0;
13638 + pwm_dumpregs(ch, enabled ? "enable" : "disable");
13639 + }
13640 + spin_unlock_irqrestore(&pwm->lock, flags);
13641 +
13642 + return t;
13643 +}
13644 +EXPORT_SYMBOL(__pwm_channel_onoff);
13645 +
13646 +/**
13647 + * pwm_clk_alloc - allocate and configure CLKA or CLKB
13648 + * @prescale: from 0..10, the power of two used to divide MCK
13649 + * @div: from 1..255, the linear divisor to use
13650 + *
13651 + * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated
13652 + * clock will run with a period of (2^prescale * div) / MCK, or twice as
13653 + * long if center aligned PWM output is used. The clock must later be
13654 + * deconfigured using pwm_clk_free().
13655 + */
13656 +int pwm_clk_alloc(unsigned prescale, unsigned div)
13657 +{
13658 + unsigned long flags;
13659 + u32 mr;
13660 + u32 val = (prescale << 8) | div;
13661 + int ret = -EBUSY;
13662 +
13663 + if (prescale >= 10 || div == 0 || div > 255)
13664 + return -EINVAL;
13665 +
13666 + spin_lock_irqsave(&pwm->lock, flags);
13667 + mr = pwm_readl(pwm, PWM_MR);
13668 + if ((mr & 0xffff) == 0) {
13669 + mr |= val;
13670 + ret = PWM_CPR_CLKA;
13671 + }
13672 + if ((mr & (0xffff << 16)) == 0) {
13673 + mr |= val << 16;
13674 + ret = PWM_CPR_CLKB;
13675 + }
13676 + if (ret > 0)
13677 + pwm_writel(pwm, PWM_MR, mr);
13678 + spin_unlock_irqrestore(&pwm->lock, flags);
13679 + return ret;
13680 +}
13681 +EXPORT_SYMBOL(pwm_clk_alloc);
13682 +
13683 +/**
13684 + * pwm_clk_free - deconfigure and release CLKA or CLKB
13685 + *
13686 + * Reverses the effect of pwm_clk_alloc().
13687 + */
13688 +void pwm_clk_free(unsigned clk)
13689 +{
13690 + unsigned long flags;
13691 + u32 mr;
13692 +
13693 + spin_lock_irqsave(&pwm->lock, flags);
13694 + mr = pwm_readl(pwm, PWM_MR);
13695 + if (clk == PWM_CPR_CLKA)
13696 + pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
13697 + if (clk == PWM_CPR_CLKB)
13698 + pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
13699 + spin_unlock_irqrestore(&pwm->lock, flags);
13700 +}
13701 +EXPORT_SYMBOL(pwm_clk_free);
13702 +
13703 +/**
13704 + * pwm_channel_handler - manage channel's IRQ handler
13705 + * @ch: the channel
13706 + * @handler: the handler to use, possibly NULL
13707 + *
13708 + * If the handler is non-null, the handler will be called after every
13709 + * period of this PWM channel. If the handler is null, this channel
13710 + * won't generate an IRQ.
13711 + */
13712 +int pwm_channel_handler(struct pwm_channel *ch,
13713 + void (*handler)(struct pwm_channel *ch))
13714 +{
13715 + unsigned long flags;
13716 + int t;
13717 +
13718 + spin_lock_irqsave(&pwm->lock, flags);
13719 + t = pwmcheck(ch);
13720 + if (t >= 0) {
13721 + pwm->handler[t] = handler;
13722 + pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
13723 + t = 0;
13724 + }
13725 + spin_unlock_irqrestore(&pwm->lock, flags);
13726 +
13727 + return t;
13728 +}
13729 +EXPORT_SYMBOL(pwm_channel_handler);
13730 +
13731 +static irqreturn_t pwm_irq(int id, void *_pwm)
13732 +{
13733 + struct pwm *p = _pwm;
13734 + irqreturn_t handled = IRQ_NONE;
13735 + u32 irqstat;
13736 + int index;
13737 +
13738 + spin_lock(&p->lock);
13739 +
13740 + /* ack irqs, then handle them */
13741 + irqstat = pwm_readl(pwm, PWM_ISR);
13742 +
13743 + while (irqstat) {
13744 + struct pwm_channel *ch;
13745 + void (*handler)(struct pwm_channel *ch);
13746 +
13747 + index = ffs(irqstat) - 1;
13748 + irqstat &= ~(1 << index);
13749 + ch = pwm->channel[index];
13750 + handler = pwm->handler[index];
13751 + if (handler && ch) {
13752 + spin_unlock(&p->lock);
13753 + handler(ch);
13754 + spin_lock(&p->lock);
13755 + handled = IRQ_HANDLED;
13756 + }
13757 + }
13758 +
13759 + spin_unlock(&p->lock);
13760 + return handled;
13761 +}
13762 +
13763 +static int __init pwm_probe(struct platform_device *pdev)
13764 +{
13765 + struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
13766 + int irq = platform_get_irq(pdev, 0);
13767 + u32 *mp = pdev->dev.platform_data;
13768 + struct pwm *p;
13769 + int status = -EIO;
13770 +
13771 + if (pwm)
13772 + return -EBUSY;
13773 + if (!r || irq < 0 || !mp || !*mp)
13774 + return -ENODEV;
13775 + if (*mp & ~((1<<PWM_NCHAN)-1)) {
13776 + dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
13777 + *mp, PWM_NCHAN);
13778 + return -EINVAL;
13779 + }
13780 +
13781 + p = kzalloc(sizeof(*p), GFP_KERNEL);
13782 + if (!p)
13783 + return -ENOMEM;
13784 +
13785 + spin_lock_init(&p->lock);
13786 + p->pdev = pdev;
13787 + p->mask = *mp;
13788 + p->irq = irq;
13789 + p->base = ioremap(r->start, r->end - r->start + 1);
13790 + if (!p->base)
13791 + goto fail;
13792 + p->clk = clk_get(&pdev->dev, "mck");
13793 + if (IS_ERR(p->clk)) {
13794 + status = PTR_ERR(p->clk);
13795 + p->clk = NULL;
13796 + goto fail;
13797 + }
13798 +
13799 + status = request_irq(irq, pwm_irq, 0, pdev->name, p);
13800 + if (status < 0)
13801 + goto fail;
13802 +
13803 + pwm = p;
13804 + platform_set_drvdata(pdev, p);
13805 +
13806 + return 0;
13807 +
13808 +fail:
13809 + if (p->clk)
13810 + clk_put(p->clk);
13811 + if (p->base)
13812 + iounmap(p->base);
13813 +
13814 + kfree(p);
13815 + return status;
13816 +}
13817 +
13818 +static int __exit pwm_remove(struct platform_device *pdev)
13819 +{
13820 + struct pwm *p = platform_get_drvdata(pdev);
13821 +
13822 + if (p != pwm)
13823 + return -EINVAL;
13824 +
13825 + clk_enable(pwm->clk);
13826 + pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
13827 + pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
13828 + clk_disable(pwm->clk);
13829 +
13830 + pwm = NULL;
13831 +
13832 + free_irq(p->irq, p);
13833 + clk_put(p->clk);
13834 + iounmap(p->base);
13835 + kfree(p);
13836 +
13837 + return 0;
13838 +}
13839 +
13840 +static struct platform_driver atmel_pwm_driver = {
13841 + .driver = {
13842 + .name = "atmel_pwm",
13843 + .owner = THIS_MODULE,
13844 + },
13845 + .remove = __exit_p(pwm_remove),
13846 +
13847 + /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
13848 + * and all AT91sam9263 states, albeit at reduced clock rate if
13849 + * MCK becomes the slow clock (i.e. what Linux labels STR).
13850 + */
13851 +};
13852 +
13853 +static int __init pwm_init(void)
13854 +{
13855 + return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
13856 +}
13857 +module_init(pwm_init);
13858 +
13859 +static void __exit pwm_exit(void)
13860 +{
13861 + platform_driver_unregister(&atmel_pwm_driver);
13862 +}
13863 +module_exit(pwm_exit);
13864 +
13865 +MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
13866 +MODULE_LICENSE("GPL");
13867 Index: linux-2.6.24.7/drivers/misc/atmel_tclib.c
13868 ===================================================================
13869 --- /dev/null
13870 +++ linux-2.6.24.7/drivers/misc/atmel_tclib.c
13871 @@ -0,0 +1,161 @@
13872 +#include <linux/atmel_tc.h>
13873 +#include <linux/clk.h>
13874 +#include <linux/err.h>
13875 +#include <linux/init.h>
13876 +#include <linux/io.h>
13877 +#include <linux/ioport.h>
13878 +#include <linux/kernel.h>
13879 +#include <linux/platform_device.h>
13880 +
13881 +/* Number of bytes to reserve for the iomem resource */
13882 +#define ATMEL_TC_IOMEM_SIZE 256
13883 +
13884 +
13885 +/*
13886 + * This is a thin library to solve the problem of how to portably allocate
13887 + * one of the TC blocks. For simplicity, it doesn't currently expect to
13888 + * share individual timers between different drivers.
13889 + */
13890 +
13891 +#if defined(CONFIG_AVR32)
13892 +/* AVR32 has these divide PBB */
13893 +const u8 atmel_tc_divisors[5] = { 0, 4, 8, 16, 32, };
13894 +EXPORT_SYMBOL(atmel_tc_divisors);
13895 +
13896 +#elif defined(CONFIG_ARCH_AT91)
13897 +/* AT91 has these divide MCK */
13898 +const u8 atmel_tc_divisors[5] = { 2, 8, 32, 128, 0, };
13899 +EXPORT_SYMBOL(atmel_tc_divisors);
13900 +
13901 +#endif
13902 +
13903 +static DEFINE_SPINLOCK(tc_list_lock);
13904 +static LIST_HEAD(tc_list);
13905 +
13906 +/**
13907 + * atmel_tc_alloc - allocate a specified TC block
13908 + * @block: which block to allocate
13909 + * @name: name to be associated with the iomem resource
13910 + *
13911 + * Caller allocates a block. If it is available, a pointer to a
13912 + * pre-initialized struct atmel_tc is returned. The caller can access
13913 + * the registers directly through the "regs" field.
13914 + */
13915 +struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name)
13916 +{
13917 + struct atmel_tc *tc;
13918 + struct platform_device *pdev = NULL;
13919 + struct resource *r;
13920 +
13921 + spin_lock(&tc_list_lock);
13922 + list_for_each_entry(tc, &tc_list, node) {
13923 + if (tc->pdev->id == block) {
13924 + pdev = tc->pdev;
13925 + break;
13926 + }
13927 + }
13928 +
13929 + if (!pdev || tc->iomem)
13930 + goto fail;
13931 +
13932 + r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
13933 + r = request_mem_region(r->start, ATMEL_TC_IOMEM_SIZE, name);
13934 + if (!r)
13935 + goto fail;
13936 +
13937 + tc->regs = ioremap(r->start, ATMEL_TC_IOMEM_SIZE);
13938 + if (!tc->regs)
13939 + goto fail_ioremap;
13940 +
13941 + tc->iomem = r;
13942 +
13943 +out:
13944 + spin_unlock(&tc_list_lock);
13945 + return tc;
13946 +
13947 +fail_ioremap:
13948 + release_resource(r);
13949 +fail:
13950 + tc = NULL;
13951 + goto out;
13952 +}
13953 +EXPORT_SYMBOL_GPL(atmel_tc_alloc);
13954 +
13955 +/**
13956 + * atmel_tc_free - release a specified TC block
13957 + * @tc: Timer/counter block that was returned by atmel_tc_alloc()
13958 + *
13959 + * This reverses the effect of atmel_tc_alloc(), unmapping the I/O
13960 + * registers, invalidating the resource returned by that routine and
13961 + * making the TC available to other drivers.
13962 + */
13963 +void atmel_tc_free(struct atmel_tc *tc)
13964 +{
13965 + spin_lock(&tc_list_lock);
13966 + if (tc->regs) {
13967 + iounmap(tc->regs);
13968 + release_resource(tc->iomem);
13969 + tc->regs = NULL;
13970 + tc->iomem = NULL;
13971 + }
13972 + spin_unlock(&tc_list_lock);
13973 +}
13974 +EXPORT_SYMBOL_GPL(atmel_tc_free);
13975 +
13976 +static int __init tc_probe(struct platform_device *pdev)
13977 +{
13978 + struct atmel_tc *tc;
13979 + struct clk *clk;
13980 + int irq;
13981 +
13982 + if (!platform_get_resource(pdev, IORESOURCE_MEM, 0))
13983 + return -EINVAL;
13984 +
13985 + irq = platform_get_irq(pdev, 0);
13986 + if (irq < 0)
13987 + return -EINVAL;
13988 +
13989 + tc = kzalloc(sizeof(struct atmel_tc), GFP_KERNEL);
13990 + if (!tc)
13991 + return -ENOMEM;
13992 +
13993 + tc->pdev = pdev;
13994 +
13995 + clk = clk_get(&pdev->dev, "t0_clk");
13996 + if (IS_ERR(clk)) {
13997 + kfree(tc);
13998 + return -EINVAL;
13999 + }
14000 +
14001 + tc->clk[0] = clk;
14002 + tc->clk[1] = clk_get(&pdev->dev, "t1_clk");
14003 + if (IS_ERR(tc->clk[1]))
14004 + tc->clk[1] = clk;
14005 + tc->clk[2] = clk_get(&pdev->dev, "t2_clk");
14006 + if (IS_ERR(tc->clk[2]))
14007 + tc->clk[2] = clk;
14008 +
14009 + tc->irq[0] = irq;
14010 + tc->irq[1] = platform_get_irq(pdev, 1);
14011 + if (tc->irq[1] < 0)
14012 + tc->irq[1] = irq;
14013 + tc->irq[2] = platform_get_irq(pdev, 2);
14014 + if (tc->irq[2] < 0)
14015 + tc->irq[2] = irq;
14016 +
14017 + spin_lock(&tc_list_lock);
14018 + list_add_tail(&tc->node, &tc_list);
14019 + spin_unlock(&tc_list_lock);
14020 +
14021 + return 0;
14022 +}
14023 +
14024 +static struct platform_driver tc_driver = {
14025 + .driver.name = "atmel_tcb",
14026 +};
14027 +
14028 +static int __init tc_init(void)
14029 +{
14030 + return platform_driver_probe(&tc_driver, tc_probe);
14031 +}
14032 +arch_initcall(tc_init);
14033 Index: linux-2.6.24.7/drivers/misc/Kconfig
14034 ===================================================================
14035 --- linux-2.6.24.7.orig/drivers/misc/Kconfig
14036 +++ linux-2.6.24.7/drivers/misc/Kconfig
14037 @@ -13,6 +13,48 @@ menuconfig MISC_DEVICES
14038
14039 if MISC_DEVICES
14040
14041 +config ATMEL_PWM
14042 + tristate "Atmel AT32/AT91 PWM support"
14043 + depends on AVR32 || ARCH_AT91
14044 + help
14045 + This option enables device driver support for the PWM channels
14046 + on certain Atmel prcoessors. Pulse Width Modulation is used for
14047 + purposes including software controlled power-efficent backlights
14048 + on LCD displays, motor control, and waveform generation.
14049 +
14050 +config ATMEL_TCLIB
14051 + bool "Atmel AT32/AT91 Timer/Counter Library"
14052 + depends on (AVR32 || ARCH_AT91)
14053 + help
14054 + Select this if you want a library to allocate the Timer/Counter
14055 + blocks found on many Atmel processors. This facilitates using
14056 + these blocks by different drivers despite processor differences.
14057 +
14058 +config ATMEL_TCB_CLKSRC
14059 + bool "TC Block Clocksource"
14060 + depends on ATMEL_TCLIB && GENERIC_TIME
14061 + default y
14062 + help
14063 + Select this to get a high precision clocksource based on a
14064 + TC block with a 5+ MHz base clock rate. Two timer channels
14065 + are combined to make a single 32-bit timer.
14066 +
14067 + When GENERIC_CLOCKEVENTS is defined, the third timer channel
14068 + may be used as a clock event device supporting oneshot mode
14069 + (delays of up to two seconds) based on the 32 KiHz clock.
14070 +
14071 +config ATMEL_TCB_CLKSRC_BLOCK
14072 + int
14073 + depends on ATMEL_TCB_CLKSRC
14074 + prompt "TC Block" if ARCH_AT91RM9200 || ARCH_AT91SAM9260 || CPU_AT32AP700X
14075 + default 0
14076 + range 0 1
14077 + help
14078 + Some chips provide more than one TC block, so you have the
14079 + choice of which one to use for the clock framework. The other
14080 + TC can be used for other purposes, such as PWM generation and
14081 + interval timing.
14082 +
14083 config IBM_ASM
14084 tristate "Device driver for IBM RSA service processor"
14085 depends on X86 && PCI && INPUT && EXPERIMENTAL
14086 Index: linux-2.6.24.7/drivers/misc/Makefile
14087 ===================================================================
14088 --- linux-2.6.24.7.orig/drivers/misc/Makefile
14089 +++ linux-2.6.24.7/drivers/misc/Makefile
14090 @@ -7,7 +7,9 @@ obj-$(CONFIG_IBM_ASM) += ibmasm/
14091 obj-$(CONFIG_HDPU_FEATURES) += hdpuftrs/
14092 obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o
14093 obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o
14094 +obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o
14095 obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
14096 +obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o
14097 obj-$(CONFIG_LKDTM) += lkdtm.o
14098 obj-$(CONFIG_TIFM_CORE) += tifm_core.o
14099 obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o
14100 Index: linux-2.6.24.7/drivers/mmc/host/atmel-mci.c
14101 ===================================================================
14102 --- /dev/null
14103 +++ linux-2.6.24.7/drivers/mmc/host/atmel-mci.c
14104 @@ -0,0 +1,1220 @@
14105 +/*
14106 + * Atmel MultiMedia Card Interface driver
14107 + *
14108 + * Copyright (C) 2004-2006 Atmel Corporation
14109 + *
14110 + * This program is free software; you can redistribute it and/or modify
14111 + * it under the terms of the GNU General Public License version 2 as
14112 + * published by the Free Software Foundation.
14113 + */
14114 +#include <linux/blkdev.h>
14115 +#include <linux/clk.h>
14116 +#include <linux/device.h>
14117 +#include <linux/dma-mapping.h>
14118 +#include <linux/init.h>
14119 +#include <linux/interrupt.h>
14120 +#include <linux/ioport.h>
14121 +#include <linux/module.h>
14122 +#include <linux/platform_device.h>
14123 +
14124 +#include <linux/mmc/host.h>
14125 +
14126 +#include <asm/dma-controller.h>
14127 +#include <asm/io.h>
14128 +#include <asm/arch/board.h>
14129 +#include <asm/arch/gpio.h>
14130 +
14131 +#include "atmel-mci.h"
14132 +
14133 +#define DRIVER_NAME "atmel_mci"
14134 +
14135 +#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \
14136 + MCI_BIT(OVRE) | MCI_BIT(UNRE))
14137 +
14138 +enum {
14139 + EVENT_CMD_COMPLETE = 0,
14140 + EVENT_DATA_COMPLETE,
14141 + EVENT_DATA_ERROR,
14142 + EVENT_STOP_SENT,
14143 + EVENT_STOP_COMPLETE,
14144 + EVENT_DMA_COMPLETE,
14145 + EVENT_DMA_ERROR,
14146 +};
14147 +
14148 +struct atmel_mci_dma {
14149 + struct dma_request_sg req;
14150 + unsigned short rx_periph_id;
14151 + unsigned short tx_periph_id;
14152 +};
14153 +
14154 +struct atmel_mci {
14155 + struct mmc_host *mmc;
14156 + void __iomem *regs;
14157 + struct atmel_mci_dma dma;
14158 +
14159 + struct mmc_request *mrq;
14160 + struct mmc_command *cmd;
14161 + struct mmc_data *data;
14162 +
14163 + u32 cmd_status;
14164 + u32 data_status;
14165 + u32 stop_status;
14166 + u32 stop_cmdr;
14167 +
14168 + struct tasklet_struct tasklet;
14169 + unsigned long pending_events;
14170 + unsigned long completed_events;
14171 +
14172 + int present;
14173 + int detect_pin;
14174 + int wp_pin;
14175 +
14176 + /* For detect pin debouncing */
14177 + struct timer_list detect_timer;
14178 +
14179 + unsigned long bus_hz;
14180 + unsigned long mapbase;
14181 + struct clk *mck;
14182 + struct platform_device *pdev;
14183 +
14184 +#ifdef CONFIG_DEBUG_FS
14185 + struct dentry *debugfs_root;
14186 + struct dentry *debugfs_regs;
14187 + struct dentry *debugfs_req;
14188 + struct dentry *debugfs_pending_events;
14189 + struct dentry *debugfs_completed_events;
14190 +#endif
14191 +};
14192 +
14193 +/* Those printks take an awful lot of time... */
14194 +#ifndef DEBUG
14195 +static unsigned int fmax = 15000000U;
14196 +#else
14197 +static unsigned int fmax = 1000000U;
14198 +#endif
14199 +module_param(fmax, uint, 0444);
14200 +MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
14201 +
14202 +/* Test bit macros for completed events */
14203 +#define mci_cmd_is_complete(host) \
14204 + test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
14205 +#define mci_data_is_complete(host) \
14206 + test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
14207 +#define mci_data_error_is_complete(host) \
14208 + test_bit(EVENT_DATA_ERROR, &host->completed_events)
14209 +#define mci_stop_sent_is_complete(host) \
14210 + test_bit(EVENT_STOP_SENT, &host->completed_events)
14211 +#define mci_stop_is_complete(host) \
14212 + test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
14213 +#define mci_dma_is_complete(host) \
14214 + test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
14215 +#define mci_dma_error_is_complete(host) \
14216 + test_bit(EVENT_DMA_ERROR, &host->completed_events)
14217 +
14218 +/* Test and clear bit macros for pending events */
14219 +#define mci_clear_cmd_is_pending(host) \
14220 + test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
14221 +#define mci_clear_data_is_pending(host) \
14222 + test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
14223 +#define mci_clear_data_error_is_pending(host) \
14224 + test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
14225 +#define mci_clear_stop_sent_is_pending(host) \
14226 + test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
14227 +#define mci_clear_stop_is_pending(host) \
14228 + test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
14229 +#define mci_clear_dma_error_is_pending(host) \
14230 + test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
14231 +
14232 +/* Test and set bit macros for completed events */
14233 +#define mci_set_cmd_is_completed(host) \
14234 + test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
14235 +#define mci_set_data_is_completed(host) \
14236 + test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
14237 +#define mci_set_data_error_is_completed(host) \
14238 + test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
14239 +#define mci_set_stop_sent_is_completed(host) \
14240 + test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
14241 +#define mci_set_stop_is_completed(host) \
14242 + test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
14243 +#define mci_set_dma_error_is_completed(host) \
14244 + test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
14245 +
14246 +/* Set bit macros for completed events */
14247 +#define mci_set_cmd_complete(host) \
14248 + set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
14249 +#define mci_set_data_complete(host) \
14250 + set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
14251 +#define mci_set_data_error_complete(host) \
14252 + set_bit(EVENT_DATA_ERROR, &host->completed_events)
14253 +#define mci_set_stop_sent_complete(host) \
14254 + set_bit(EVENT_STOP_SENT, &host->completed_events)
14255 +#define mci_set_stop_complete(host) \
14256 + set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
14257 +#define mci_set_dma_complete(host) \
14258 + set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
14259 +#define mci_set_dma_error_complete(host) \
14260 + set_bit(EVENT_DMA_ERROR, &host->completed_events)
14261 +
14262 +/* Set bit macros for pending events */
14263 +#define mci_set_cmd_pending(host) \
14264 + set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
14265 +#define mci_set_data_pending(host) \
14266 + set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
14267 +#define mci_set_data_error_pending(host) \
14268 + set_bit(EVENT_DATA_ERROR, &host->pending_events)
14269 +#define mci_set_stop_sent_pending(host) \
14270 + set_bit(EVENT_STOP_SENT, &host->pending_events)
14271 +#define mci_set_stop_pending(host) \
14272 + set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
14273 +#define mci_set_dma_error_pending(host) \
14274 + set_bit(EVENT_DMA_ERROR, &host->pending_events)
14275 +
14276 +/* Clear bit macros for pending events */
14277 +#define mci_clear_cmd_pending(host) \
14278 + clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
14279 +#define mci_clear_data_pending(host) \
14280 + clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
14281 +#define mci_clear_data_error_pending(host) \
14282 + clear_bit(EVENT_DATA_ERROR, &host->pending_events)
14283 +#define mci_clear_stop_sent_pending(host) \
14284 + clear_bit(EVENT_STOP_SENT, &host->pending_events)
14285 +#define mci_clear_stop_pending(host) \
14286 + clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
14287 +#define mci_clear_dma_error_pending(host) \
14288 + clear_bit(EVENT_DMA_ERROR, &host->pending_events)
14289 +
14290 +
14291 +#ifdef CONFIG_DEBUG_FS
14292 +#include <linux/debugfs.h>
14293 +
14294 +#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int))
14295 +
14296 +struct req_dbg_data {
14297 + unsigned int nbytes;
14298 + char str[DBG_REQ_BUF_SIZE];
14299 +};
14300 +
14301 +static int req_dbg_open(struct inode *inode, struct file *file)
14302 +{
14303 + struct atmel_mci *host;
14304 + struct mmc_request *mrq;
14305 + struct mmc_command *cmd, *stop;
14306 + struct mmc_data *data;
14307 + struct req_dbg_data *priv;
14308 + char *str;
14309 + unsigned long n = 0;
14310 +
14311 + priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
14312 + if (!priv)
14313 + return -ENOMEM;
14314 + str = priv->str;
14315 +
14316 + mutex_lock(&inode->i_mutex);
14317 + host = inode->i_private;
14318 +
14319 + spin_lock_irq(&host->mmc->lock);
14320 + mrq = host->mrq;
14321 + if (mrq) {
14322 + cmd = mrq->cmd;
14323 + data = mrq->data;
14324 + stop = mrq->stop;
14325 + n = snprintf(str, DBG_REQ_BUF_SIZE,
14326 + "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
14327 + cmd->opcode, cmd->arg, cmd->flags,
14328 + cmd->resp[0], cmd->resp[1], cmd->resp[2],
14329 + cmd->resp[3], cmd->error);
14330 + if (n < DBG_REQ_BUF_SIZE && data)
14331 + n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
14332 + "DATA %u * %u (%u) %x (err %u)\n",
14333 + data->blocks, data->blksz,
14334 + data->bytes_xfered, data->flags,
14335 + data->error);
14336 + if (n < DBG_REQ_BUF_SIZE && stop)
14337 + n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
14338 + "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
14339 + stop->opcode, stop->arg, stop->flags,
14340 + stop->resp[0], stop->resp[1],
14341 + stop->resp[2], stop->resp[3],
14342 + stop->error);
14343 + }
14344 + spin_unlock_irq(&host->mmc->lock);
14345 + mutex_unlock(&inode->i_mutex);
14346 +
14347 + priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
14348 + file->private_data = priv;
14349 +
14350 + return 0;
14351 +}
14352 +
14353 +static ssize_t req_dbg_read(struct file *file, char __user *buf,
14354 + size_t nbytes, loff_t *ppos)
14355 +{
14356 + struct req_dbg_data *priv = file->private_data;
14357 +
14358 + return simple_read_from_buffer(buf, nbytes, ppos,
14359 + priv->str, priv->nbytes);
14360 +}
14361 +
14362 +static int req_dbg_release(struct inode *inode, struct file *file)
14363 +{
14364 + kfree(file->private_data);
14365 + return 0;
14366 +}
14367 +
14368 +static const struct file_operations req_dbg_fops = {
14369 + .owner = THIS_MODULE,
14370 + .open = req_dbg_open,
14371 + .llseek = no_llseek,
14372 + .read = req_dbg_read,
14373 + .release = req_dbg_release,
14374 +};
14375 +
14376 +static int regs_dbg_open(struct inode *inode, struct file *file)
14377 +{
14378 + struct atmel_mci *host;
14379 + unsigned int i;
14380 + u32 *data;
14381 + int ret = -ENOMEM;
14382 +
14383 + mutex_lock(&inode->i_mutex);
14384 + host = inode->i_private;
14385 + data = kmalloc(inode->i_size, GFP_KERNEL);
14386 + if (!data)
14387 + goto out;
14388 +
14389 + spin_lock_irq(&host->mmc->lock);
14390 + for (i = 0; i < inode->i_size / 4; i++)
14391 + data[i] = __raw_readl(host->regs + i * 4);
14392 + spin_unlock_irq(&host->mmc->lock);
14393 +
14394 + file->private_data = data;
14395 + ret = 0;
14396 +
14397 +out:
14398 + mutex_unlock(&inode->i_mutex);
14399 +
14400 + return ret;
14401 +}
14402 +
14403 +static ssize_t regs_dbg_read(struct file *file, char __user *buf,
14404 + size_t nbytes, loff_t *ppos)
14405 +{
14406 + struct inode *inode = file->f_dentry->d_inode;
14407 + int ret;
14408 +
14409 + mutex_lock(&inode->i_mutex);
14410 + ret = simple_read_from_buffer(buf, nbytes, ppos,
14411 + file->private_data,
14412 + file->f_dentry->d_inode->i_size);
14413 + mutex_unlock(&inode->i_mutex);
14414 +
14415 + return ret;
14416 +}
14417 +
14418 +static int regs_dbg_release(struct inode *inode, struct file *file)
14419 +{
14420 + kfree(file->private_data);
14421 + return 0;
14422 +}
14423 +
14424 +static const struct file_operations regs_dbg_fops = {
14425 + .owner = THIS_MODULE,
14426 + .open = regs_dbg_open,
14427 + .llseek = generic_file_llseek,
14428 + .read = regs_dbg_read,
14429 + .release = regs_dbg_release,
14430 +};
14431 +
14432 +static void atmci_init_debugfs(struct atmel_mci *host)
14433 +{
14434 + struct mmc_host *mmc;
14435 + struct dentry *root, *regs;
14436 + struct resource *res;
14437 +
14438 + mmc = host->mmc;
14439 + root = debugfs_create_dir(mmc_hostname(mmc), NULL);
14440 + if (IS_ERR(root) || !root)
14441 + goto err_root;
14442 + host->debugfs_root = root;
14443 +
14444 + regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
14445 + if (!regs)
14446 + goto err_regs;
14447 +
14448 + res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
14449 + regs->d_inode->i_size = res->end - res->start + 1;
14450 + host->debugfs_regs = regs;
14451 +
14452 + host->debugfs_req = debugfs_create_file("req", 0400, root,
14453 + host, &req_dbg_fops);
14454 + if (!host->debugfs_req)
14455 + goto err_req;
14456 +
14457 + host->debugfs_pending_events
14458 + = debugfs_create_u32("pending_events", 0400, root,
14459 + (u32 *)&host->pending_events);
14460 + if (!host->debugfs_pending_events)
14461 + goto err_pending_events;
14462 +
14463 + host->debugfs_completed_events
14464 + = debugfs_create_u32("completed_events", 0400, root,
14465 + (u32 *)&host->completed_events);
14466 + if (!host->debugfs_completed_events)
14467 + goto err_completed_events;
14468 +
14469 + return;
14470 +
14471 +err_completed_events:
14472 + debugfs_remove(host->debugfs_pending_events);
14473 +err_pending_events:
14474 + debugfs_remove(host->debugfs_req);
14475 +err_req:
14476 + debugfs_remove(host->debugfs_regs);
14477 +err_regs:
14478 + debugfs_remove(host->debugfs_root);
14479 +err_root:
14480 + host->debugfs_root = NULL;
14481 + dev_err(&host->pdev->dev,
14482 + "failed to initialize debugfs for %s\n",
14483 + mmc_hostname(mmc));
14484 +}
14485 +
14486 +static void atmci_cleanup_debugfs(struct atmel_mci *host)
14487 +{
14488 + if (host->debugfs_root) {
14489 + debugfs_remove(host->debugfs_completed_events);
14490 + debugfs_remove(host->debugfs_pending_events);
14491 + debugfs_remove(host->debugfs_req);
14492 + debugfs_remove(host->debugfs_regs);
14493 + debugfs_remove(host->debugfs_root);
14494 + host->debugfs_root = NULL;
14495 + }
14496 +}
14497 +#else
14498 +static inline void atmci_init_debugfs(struct atmel_mci *host)
14499 +{
14500 +
14501 +}
14502 +
14503 +static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
14504 +{
14505 +
14506 +}
14507 +#endif /* CONFIG_DEBUG_FS */
14508 +
14509 +static inline unsigned int ns_to_clocks(struct atmel_mci *host,
14510 + unsigned int ns)
14511 +{
14512 + return (ns * (host->bus_hz / 1000000) + 999) / 1000;
14513 +}
14514 +
14515 +static void atmci_set_timeout(struct atmel_mci *host,
14516 + struct mmc_data *data)
14517 +{
14518 + static unsigned dtomul_to_shift[] = {
14519 + 0, 4, 7, 8, 10, 12, 16, 20
14520 + };
14521 + unsigned timeout;
14522 + unsigned dtocyc, dtomul;
14523 +
14524 + timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
14525 +
14526 + for (dtomul = 0; dtomul < 8; dtomul++) {
14527 + unsigned shift = dtomul_to_shift[dtomul];
14528 + dtocyc = (timeout + (1 << shift) - 1) >> shift;
14529 + if (dtocyc < 15)
14530 + break;
14531 + }
14532 +
14533 + if (dtomul >= 8) {
14534 + dtomul = 7;
14535 + dtocyc = 15;
14536 + }
14537 +
14538 + dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
14539 + dtocyc << dtomul_to_shift[dtomul]);
14540 + mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
14541 + | MCI_BF(DTOCYC, dtocyc)));
14542 +}
14543 +
14544 +/*
14545 + * Return mask with command flags to be enabled for this command.
14546 + */
14547 +static u32 atmci_prepare_command(struct mmc_host *mmc,
14548 + struct mmc_command *cmd)
14549 +{
14550 + u32 cmdr;
14551 +
14552 + cmd->error = 0;
14553 +
14554 + cmdr = MCI_BF(CMDNB, cmd->opcode);
14555 +
14556 + if (cmd->flags & MMC_RSP_PRESENT) {
14557 + if (cmd->flags & MMC_RSP_136)
14558 + cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
14559 + else
14560 + cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
14561 + }
14562 +
14563 + /*
14564 + * This should really be MAXLAT_5 for CMD2 and ACMD41, but
14565 + * it's too difficult to determine whether this is an ACMD or
14566 + * not. Better make it 64.
14567 + */
14568 + cmdr |= MCI_BIT(MAXLAT);
14569 +
14570 + if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
14571 + cmdr |= MCI_BIT(OPDCMD);
14572 +
14573 + dev_dbg(&mmc->class_dev,
14574 + "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
14575 + cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
14576 +
14577 + return cmdr;
14578 +}
14579 +
14580 +static void atmci_start_command(struct atmel_mci *host,
14581 + struct mmc_command *cmd,
14582 + u32 cmd_flags)
14583 +{
14584 + WARN_ON(host->cmd);
14585 + host->cmd = cmd;
14586 +
14587 + mci_writel(host, ARGR, cmd->arg);
14588 + mci_writel(host, CMDR, cmd_flags);
14589 +
14590 + if (cmd->data)
14591 + dma_start_request(host->dma.req.req.dmac,
14592 + host->dma.req.req.channel);
14593 +}
14594 +
14595 +/*
14596 + * Returns a mask of flags to be set in the command register when the
14597 + * command to start the transfer is to be sent.
14598 + */
14599 +static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
14600 +{
14601 + struct atmel_mci *host = mmc_priv(mmc);
14602 + u32 cmd_flags;
14603 +
14604 + WARN_ON(host->data);
14605 + host->data = data;
14606 +
14607 + atmci_set_timeout(host, data);
14608 + mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
14609 + | MCI_BF(BLKLEN, data->blksz)));
14610 + host->dma.req.block_size = data->blksz;
14611 + host->dma.req.nr_blocks = data->blocks;
14612 +
14613 + cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
14614 + if (data->flags & MMC_DATA_STREAM)
14615 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
14616 + else if (data->blocks > 1)
14617 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
14618 + else
14619 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
14620 +
14621 + if (data->flags & MMC_DATA_READ) {
14622 + cmd_flags |= MCI_BIT(TRDIR);
14623 + host->dma.req.nr_sg
14624 + = dma_map_sg(&host->pdev->dev, data->sg,
14625 + data->sg_len, DMA_FROM_DEVICE);
14626 + host->dma.req.periph_id = host->dma.rx_periph_id;
14627 + host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
14628 + host->dma.req.data_reg = host->mapbase + MCI_RDR;
14629 + } else {
14630 + host->dma.req.nr_sg
14631 + = dma_map_sg(&host->pdev->dev, data->sg,
14632 + data->sg_len, DMA_TO_DEVICE);
14633 + host->dma.req.periph_id = host->dma.tx_periph_id;
14634 + host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
14635 + host->dma.req.data_reg = host->mapbase + MCI_TDR;
14636 + }
14637 + host->dma.req.sg = data->sg;
14638 +
14639 + dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
14640 +
14641 + return cmd_flags;
14642 +}
14643 +
14644 +static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
14645 +{
14646 + struct atmel_mci *host = mmc_priv(mmc);
14647 + struct mmc_data *data = mrq->data;
14648 + u32 iflags;
14649 + u32 cmdflags = 0;
14650 +
14651 + iflags = mci_readl(host, IMR);
14652 + if (iflags)
14653 + dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
14654 + mci_readl(host, IMR));
14655 +
14656 + WARN_ON(host->mrq != NULL);
14657 +
14658 + /*
14659 + * We may "know" the card is gone even though there's still an
14660 + * electrical connection. If so, we really need to communicate
14661 + * this to the MMC core since there won't be any more
14662 + * interrupts as the card is completely removed. Otherwise,
14663 + * the MMC core might believe the card is still there even
14664 + * though the card was just removed very slowly.
14665 + */
14666 + if (!host->present) {
14667 + mrq->cmd->error = -ENOMEDIUM;
14668 + mmc_request_done(mmc, mrq);
14669 + return;
14670 + }
14671 +
14672 + host->mrq = mrq;
14673 + host->pending_events = 0;
14674 + host->completed_events = 0;
14675 +
14676 + iflags = MCI_BIT(CMDRDY);
14677 + cmdflags = atmci_prepare_command(mmc, mrq->cmd);
14678 +
14679 + if (mrq->stop) {
14680 + WARN_ON(!data);
14681 +
14682 + host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
14683 + host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
14684 + if (!(data->flags & MMC_DATA_WRITE))
14685 + host->stop_cmdr |= MCI_BIT(TRDIR);
14686 + if (data->flags & MMC_DATA_STREAM)
14687 + host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
14688 + else
14689 + host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
14690 + }
14691 + if (data) {
14692 + cmdflags |= atmci_prepare_data(mmc, data);
14693 + iflags |= MCI_DATA_ERROR_FLAGS;
14694 + }
14695 +
14696 + atmci_start_command(host, mrq->cmd, cmdflags);
14697 + mci_writel(host, IER, iflags);
14698 +}
14699 +
14700 +static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
14701 +{
14702 + struct atmel_mci *host = mmc_priv(mmc);
14703 + u32 mr;
14704 +
14705 + if (ios->clock) {
14706 + u32 clkdiv;
14707 +
14708 + /* Set clock rate */
14709 + clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * ios->clock) - 1;
14710 + if (clkdiv > 255) {
14711 + dev_warn(&mmc->class_dev,
14712 + "clock %u too slow; using %lu\n",
14713 + ios->clock, host->bus_hz / (2 * 256));
14714 + clkdiv = 255;
14715 + }
14716 +
14717 + mr = mci_readl(host, MR);
14718 + mr = MCI_BFINS(CLKDIV, clkdiv, mr)
14719 + | MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
14720 + mci_writel(host, MR, mr);
14721 +
14722 + /* Enable the MCI controller */
14723 + mci_writel(host, CR, MCI_BIT(MCIEN));
14724 + } else {
14725 + /* Disable the MCI controller */
14726 + mci_writel(host, CR, MCI_BIT(MCIDIS));
14727 + }
14728 +
14729 + switch (ios->bus_width) {
14730 + case MMC_BUS_WIDTH_1:
14731 + mci_writel(host, SDCR, 0);
14732 + break;
14733 + case MMC_BUS_WIDTH_4:
14734 + mci_writel(host, SDCR, MCI_BIT(SDCBUS));
14735 + break;
14736 + }
14737 +
14738 + switch (ios->power_mode) {
14739 + case MMC_POWER_ON:
14740 + /* Send init sequence (74 clock cycles) */
14741 + mci_writel(host, IDR, ~0UL);
14742 + mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
14743 + while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
14744 + cpu_relax();
14745 + break;
14746 + default:
14747 + /*
14748 + * TODO: None of the currently available AVR32-based
14749 + * boards allow MMC power to be turned off. Implement
14750 + * power control when this can be tested properly.
14751 + */
14752 + break;
14753 + }
14754 +}
14755 +
14756 +static int atmci_get_ro(struct mmc_host *mmc)
14757 +{
14758 + int read_only = 0;
14759 + struct atmel_mci *host = mmc_priv(mmc);
14760 +
14761 + if (host->wp_pin >= 0) {
14762 + read_only = gpio_get_value(host->wp_pin);
14763 + dev_dbg(&mmc->class_dev, "card is %s\n",
14764 + read_only ? "read-only" : "read-write");
14765 + } else {
14766 + dev_dbg(&mmc->class_dev,
14767 + "no pin for checking read-only switch."
14768 + " Assuming write-enable.\n");
14769 + }
14770 +
14771 + return read_only;
14772 +}
14773 +
14774 +static struct mmc_host_ops atmci_ops = {
14775 + .request = atmci_request,
14776 + .set_ios = atmci_set_ios,
14777 + .get_ro = atmci_get_ro,
14778 +};
14779 +
14780 +static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
14781 +{
14782 + struct atmel_mci *host = mmc_priv(mmc);
14783 +
14784 + WARN_ON(host->cmd || host->data);
14785 + host->mrq = NULL;
14786 +
14787 + mmc_request_done(mmc, mrq);
14788 +}
14789 +
14790 +static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
14791 + u32 flags)
14792 +{
14793 + struct atmel_mci *host = mmc_priv(mmc);
14794 +
14795 + atmci_start_command(host, data->stop, host->stop_cmdr | flags);
14796 + mci_writel(host, IER, MCI_BIT(CMDRDY));
14797 +}
14798 +
14799 +static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
14800 +{
14801 + host->data = NULL;
14802 + dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
14803 + ((data->flags & MMC_DATA_WRITE)
14804 + ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
14805 +
14806 + /*
14807 + * Data might complete before command for very short transfers
14808 + * (like READ_SCR)
14809 + */
14810 + if (mci_cmd_is_complete(host)
14811 + && (!data->stop || mci_stop_is_complete(host)))
14812 + atmci_request_end(host->mmc, data->mrq);
14813 +}
14814 +
14815 +static void atmci_command_complete(struct atmel_mci *host,
14816 + struct mmc_command *cmd, u32 status)
14817 +{
14818 + if (status & MCI_BIT(RTOE))
14819 + cmd->error = -ETIMEDOUT;
14820 + else if ((cmd->flags & MMC_RSP_CRC)
14821 + && (status & MCI_BIT(RCRCE)))
14822 + cmd->error = -EILSEQ;
14823 + else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
14824 + cmd->error = -EIO;
14825 +
14826 + if (cmd->error) {
14827 + dev_dbg(&host->mmc->class_dev,
14828 + "command error: op=0x%x status=0x%08x\n",
14829 + cmd->opcode, status);
14830 +
14831 + if (cmd->data) {
14832 + dma_stop_request(host->dma.req.req.dmac,
14833 + host->dma.req.req.channel);
14834 + mci_writel(host, IDR, MCI_BIT(NOTBUSY)
14835 + | MCI_DATA_ERROR_FLAGS);
14836 + host->data = NULL;
14837 + }
14838 + }
14839 +}
14840 +
14841 +static void atmci_detect_change(unsigned long data)
14842 +{
14843 + struct atmel_mci *host = (struct atmel_mci *)data;
14844 + struct mmc_request *mrq = host->mrq;
14845 + int present;
14846 +
14847 + /*
14848 + * atmci_remove() sets detect_pin to -1 before freeing the
14849 + * interrupt. We must not re-enable the interrupt if it has
14850 + * been freed.
14851 + */
14852 + smp_rmb();
14853 + if (host->detect_pin < 0)
14854 + return;
14855 +
14856 + enable_irq(gpio_to_irq(host->detect_pin));
14857 + present = !gpio_get_value(host->detect_pin);
14858 +
14859 + dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n",
14860 + present, host->present);
14861 +
14862 + if (present != host->present) {
14863 + dev_dbg(&host->mmc->class_dev, "card %s\n",
14864 + present ? "inserted" : "removed");
14865 + host->present = present;
14866 +
14867 + /* Reset controller if card is gone */
14868 + if (!present) {
14869 + mci_writel(host, CR, MCI_BIT(SWRST));
14870 + mci_writel(host, IDR, ~0UL);
14871 + mci_writel(host, CR, MCI_BIT(MCIEN));
14872 + }
14873 +
14874 + /* Clean up queue if present */
14875 + if (mrq) {
14876 + if (!mci_cmd_is_complete(host))
14877 + mrq->cmd->error = -ENOMEDIUM;
14878 + if (mrq->data && !mci_data_is_complete(host)
14879 + && !mci_data_error_is_complete(host)) {
14880 + dma_stop_request(host->dma.req.req.dmac,
14881 + host->dma.req.req.channel);
14882 + host->data->error = -ENOMEDIUM;
14883 + atmci_data_complete(host, host->data);
14884 + }
14885 + if (mrq->stop && !mci_stop_is_complete(host))
14886 + mrq->stop->error = -ENOMEDIUM;
14887 +
14888 + host->cmd = NULL;
14889 + atmci_request_end(host->mmc, mrq);
14890 + }
14891 +
14892 + mmc_detect_change(host->mmc, 0);
14893 + }
14894 +}
14895 +
14896 +static void atmci_tasklet_func(unsigned long priv)
14897 +{
14898 + struct mmc_host *mmc = (struct mmc_host *)priv;
14899 + struct atmel_mci *host = mmc_priv(mmc);
14900 + struct mmc_request *mrq = host->mrq;
14901 + struct mmc_data *data = host->data;
14902 +
14903 + dev_vdbg(&mmc->class_dev,
14904 + "tasklet: pending/completed/mask %lx/%lx/%x\n",
14905 + host->pending_events, host->completed_events,
14906 + mci_readl(host, IMR));
14907 +
14908 + if (mci_clear_cmd_is_pending(host)) {
14909 + mci_set_cmd_complete(host);
14910 + atmci_command_complete(host, mrq->cmd, host->cmd_status);
14911 + if (!host->data || mci_data_is_complete(host)
14912 + || mci_data_error_is_complete(host))
14913 + atmci_request_end(mmc, mrq);
14914 + }
14915 + if (mci_clear_stop_is_pending(host)) {
14916 + mci_set_stop_complete(host);
14917 + atmci_command_complete(host, mrq->stop, host->stop_status);
14918 + if (mci_data_is_complete(host)
14919 + || mci_data_error_is_complete(host))
14920 + atmci_request_end(mmc, mrq);
14921 + }
14922 + if (mci_clear_dma_error_is_pending(host)) {
14923 + mci_set_dma_error_complete(host);
14924 + mci_clear_data_pending(host);
14925 +
14926 + /* DMA controller got bus error => invalid address */
14927 + data->error = -EIO;
14928 +
14929 + dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
14930 + host->data->bytes_xfered);
14931 +
14932 + if (data->stop
14933 + && !mci_set_stop_sent_is_completed(host))
14934 + /* TODO: Check if card is still present */
14935 + send_stop_cmd(host->mmc, data, 0);
14936 +
14937 + atmci_data_complete(host, data);
14938 + }
14939 + if (mci_clear_data_error_is_pending(host)) {
14940 + u32 status = host->data_status;
14941 +
14942 + mci_set_data_error_complete(host);
14943 + mci_clear_data_pending(host);
14944 +
14945 + dma_stop_request(host->dma.req.req.dmac,
14946 + host->dma.req.req.channel);
14947 +
14948 + if (status & MCI_BIT(DCRCE)) {
14949 + dev_dbg(&mmc->class_dev, "data CRC error\n");
14950 + data->error = -EILSEQ;
14951 + } else if (status & MCI_BIT(DTOE)) {
14952 + dev_dbg(&mmc->class_dev, "data timeout error\n");
14953 + data->error = -ETIMEDOUT;
14954 + } else {
14955 + dev_dbg(&mmc->class_dev, "data FIFO error\n");
14956 + data->error = -EIO;
14957 + }
14958 + dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
14959 + data->bytes_xfered);
14960 +
14961 + if (data->stop
14962 + && !mci_set_stop_sent_is_completed(host))
14963 + /* TODO: Check if card is still present */
14964 + send_stop_cmd(host->mmc, data, 0);
14965 +
14966 + atmci_data_complete(host, data);
14967 + }
14968 + if (mci_clear_data_is_pending(host)) {
14969 + mci_set_data_complete(host);
14970 + data->bytes_xfered = data->blocks * data->blksz;
14971 + atmci_data_complete(host, data);
14972 + }
14973 +}
14974 +
14975 +static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
14976 +{
14977 + struct atmel_mci *host = mmc_priv(mmc);
14978 + struct mmc_command *cmd = host->cmd;
14979 +
14980 + /*
14981 + * Read the response now so that we're free to send a new
14982 + * command immediately.
14983 + */
14984 + cmd->resp[0] = mci_readl(host, RSPR);
14985 + cmd->resp[1] = mci_readl(host, RSPR);
14986 + cmd->resp[2] = mci_readl(host, RSPR);
14987 + cmd->resp[3] = mci_readl(host, RSPR);
14988 +
14989 + mci_writel(host, IDR, MCI_BIT(CMDRDY));
14990 + host->cmd = NULL;
14991 +
14992 + if (mci_stop_sent_is_complete(host)) {
14993 + host->stop_status = status;
14994 + mci_set_stop_pending(host);
14995 + } else {
14996 + struct mmc_request *mrq = host->mrq;
14997 +
14998 + if (mrq->stop && mci_dma_is_complete(host)
14999 + && !mci_set_stop_sent_is_completed(host))
15000 + send_stop_cmd(host->mmc, mrq->data, 0);
15001 + host->cmd_status = status;
15002 + mci_set_cmd_pending(host);
15003 + }
15004 +
15005 + tasklet_schedule(&host->tasklet);
15006 +}
15007 +
15008 +static void atmci_xfer_complete(struct dma_request *_req)
15009 +{
15010 + struct dma_request_sg *req = to_dma_request_sg(_req);
15011 + struct atmel_mci_dma *dma;
15012 + struct atmel_mci *host;
15013 + struct mmc_data *data;
15014 +
15015 + dma = container_of(req, struct atmel_mci_dma, req);
15016 + host = container_of(dma, struct atmel_mci, dma);
15017 + data = host->data;
15018 +
15019 + /*
15020 + * This callback may be called before we see the CMDRDY
15021 + * interrupt under heavy irq load (possibly caused by other
15022 + * drivers) or when interrupts are disabled for a long time.
15023 + */
15024 + mci_set_dma_complete(host);
15025 + if (data->stop && mci_cmd_is_complete(host)
15026 + && !mci_set_stop_sent_is_completed(host))
15027 + send_stop_cmd(host->mmc, data, 0);
15028 +
15029 + /*
15030 + * Regardless of what the documentation says, we have to wait
15031 + * for NOTBUSY even after block read operations.
15032 + *
15033 + * When the DMA transfer is complete, the controller may still
15034 + * be reading the CRC from the card, i.e. the data transfer is
15035 + * still in progress and we haven't seen all the potential
15036 + * error bits yet.
15037 + */
15038 + mci_writel(host, IER, MCI_BIT(NOTBUSY));
15039 +}
15040 +
15041 +static void atmci_dma_error(struct dma_request *_req)
15042 +{
15043 + struct dma_request_sg *req = to_dma_request_sg(_req);
15044 + struct atmel_mci_dma *dma;
15045 + struct atmel_mci *host;
15046 +
15047 + dma = container_of(req, struct atmel_mci_dma, req);
15048 + host = container_of(dma, struct atmel_mci, dma);
15049 +
15050 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
15051 + | MCI_DATA_ERROR_FLAGS));
15052 +
15053 + mci_set_dma_error_pending(host);
15054 + tasklet_schedule(&host->tasklet);
15055 +}
15056 +
15057 +static irqreturn_t atmci_interrupt(int irq, void *dev_id)
15058 +{
15059 + struct mmc_host *mmc = dev_id;
15060 + struct atmel_mci *host = mmc_priv(mmc);
15061 + u32 status, mask, pending;
15062 +
15063 + spin_lock(&mmc->lock);
15064 +
15065 + status = mci_readl(host, SR);
15066 + mask = mci_readl(host, IMR);
15067 + pending = status & mask;
15068 +
15069 + do {
15070 + if (pending & MCI_DATA_ERROR_FLAGS) {
15071 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
15072 + | MCI_DATA_ERROR_FLAGS));
15073 + host->data_status = status;
15074 + mci_set_data_error_pending(host);
15075 + tasklet_schedule(&host->tasklet);
15076 + break;
15077 + }
15078 + if (pending & MCI_BIT(CMDRDY))
15079 + atmci_cmd_interrupt(mmc, status);
15080 + if (pending & MCI_BIT(NOTBUSY)) {
15081 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
15082 + | MCI_DATA_ERROR_FLAGS));
15083 + mci_set_data_pending(host);
15084 + tasklet_schedule(&host->tasklet);
15085 + }
15086 +
15087 + status = mci_readl(host, SR);
15088 + mask = mci_readl(host, IMR);
15089 + pending = status & mask;
15090 + } while (pending);
15091 +
15092 + spin_unlock(&mmc->lock);
15093 +
15094 + return IRQ_HANDLED;
15095 +}
15096 +
15097 +static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
15098 +{
15099 + struct mmc_host *mmc = dev_id;
15100 + struct atmel_mci *host = mmc_priv(mmc);
15101 +
15102 + /*
15103 + * Disable interrupts until the pin has stabilized and check
15104 + * the state then. Use mod_timer() since we may be in the
15105 + * middle of the timer routine when this interrupt triggers.
15106 + */
15107 + disable_irq_nosync(irq);
15108 + mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
15109 +
15110 + return IRQ_HANDLED;
15111 +}
15112 +
15113 +static int __devinit atmci_probe(struct platform_device *pdev)
15114 +{
15115 + struct mci_platform_data *board;
15116 + struct atmel_mci *host;
15117 + struct mmc_host *mmc;
15118 + struct resource *regs;
15119 + int irq;
15120 + int ret;
15121 +
15122 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
15123 + if (!regs)
15124 + return -ENXIO;
15125 + irq = platform_get_irq(pdev, 0);
15126 + if (irq < 0)
15127 + return irq;
15128 +
15129 + board = pdev->dev.platform_data;
15130 +
15131 + mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
15132 + if (!mmc)
15133 + return -ENOMEM;
15134 +
15135 + host = mmc_priv(mmc);
15136 + host->pdev = pdev;
15137 + host->mmc = mmc;
15138 + if (board) {
15139 + host->detect_pin = board->detect_pin;
15140 + host->wp_pin = board->wp_pin;
15141 + } else {
15142 + host->detect_pin = -1;
15143 + host->wp_pin = -1;
15144 + }
15145 +
15146 + host->mck = clk_get(&pdev->dev, "mci_clk");
15147 + if (IS_ERR(host->mck)) {
15148 + ret = PTR_ERR(host->mck);
15149 + goto out_free_host;
15150 + }
15151 + clk_enable(host->mck);
15152 +
15153 + ret = -ENOMEM;
15154 + host->regs = ioremap(regs->start, regs->end - regs->start + 1);
15155 + if (!host->regs)
15156 + goto out_disable_clk;
15157 +
15158 + host->bus_hz = clk_get_rate(host->mck);
15159 + host->mapbase = regs->start;
15160 +
15161 + mmc->ops = &atmci_ops;
15162 + mmc->f_min = (host->bus_hz + 511) / 512;
15163 + mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
15164 + mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
15165 + mmc->caps |= MMC_CAP_4_BIT_DATA;
15166 +
15167 + tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
15168 +
15169 + ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
15170 + if (ret)
15171 + goto out_unmap;
15172 +
15173 + /* Assume card is present if we don't have a detect pin */
15174 + host->present = 1;
15175 + if (host->detect_pin >= 0) {
15176 + if (gpio_request(host->detect_pin, "mmc_detect")) {
15177 + dev_dbg(&mmc->class_dev, "no detect pin available\n");
15178 + host->detect_pin = -1;
15179 + } else {
15180 + host->present = !gpio_get_value(host->detect_pin);
15181 + }
15182 + }
15183 + if (host->wp_pin >= 0) {
15184 + if (gpio_request(host->wp_pin, "mmc_wp")) {
15185 + dev_dbg(&mmc->class_dev, "no WP pin available\n");
15186 + host->wp_pin = -1;
15187 + }
15188 + }
15189 +
15190 + /* TODO: Get this information from platform data */
15191 + ret = -ENOMEM;
15192 + host->dma.req.req.dmac = find_dma_controller(0);
15193 + if (!host->dma.req.req.dmac) {
15194 + dev_dbg(&mmc->class_dev, "no DMA controller available\n");
15195 + goto out_free_irq;
15196 + }
15197 + ret = dma_alloc_channel(host->dma.req.req.dmac);
15198 + if (ret < 0) {
15199 + dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
15200 + goto out_free_irq;
15201 + }
15202 + host->dma.req.req.channel = ret;
15203 + host->dma.req.width = DMA_WIDTH_32BIT;
15204 + host->dma.req.req.xfer_complete = atmci_xfer_complete;
15205 + host->dma.req.req.block_complete = NULL; // atmci_block_complete;
15206 + host->dma.req.req.error = atmci_dma_error;
15207 + host->dma.rx_periph_id = 0;
15208 + host->dma.tx_periph_id = 1;
15209 +
15210 + mci_writel(host, CR, MCI_BIT(SWRST));
15211 + mci_writel(host, IDR, ~0UL);
15212 +
15213 + platform_set_drvdata(pdev, host);
15214 +
15215 + mmc_add_host(mmc);
15216 +
15217 + if (host->detect_pin >= 0) {
15218 + setup_timer(&host->detect_timer, atmci_detect_change,
15219 + (unsigned long)host);
15220 +
15221 + ret = request_irq(gpio_to_irq(host->detect_pin),
15222 + atmci_detect_interrupt,
15223 + IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
15224 + DRIVER_NAME, mmc);
15225 + if (ret) {
15226 + dev_dbg(&mmc->class_dev,
15227 + "could not request IRQ %d for detect pin\n",
15228 + gpio_to_irq(host->detect_pin));
15229 + gpio_free(host->detect_pin);
15230 + host->detect_pin = -1;
15231 + }
15232 + }
15233 +
15234 + dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
15235 + host->mapbase, irq);
15236 +
15237 + atmci_init_debugfs(host);
15238 +
15239 + return 0;
15240 +
15241 +out_free_irq:
15242 + if (host->detect_pin >= 0)
15243 + gpio_free(host->detect_pin);
15244 + if (host->wp_pin >= 0)
15245 + gpio_free(host->wp_pin);
15246 + free_irq(irq, mmc);
15247 +out_unmap:
15248 + iounmap(host->regs);
15249 +out_disable_clk:
15250 + clk_disable(host->mck);
15251 + clk_put(host->mck);
15252 +out_free_host:
15253 + mmc_free_host(mmc);
15254 + return ret;
15255 +}
15256 +
15257 +static int __devexit atmci_remove(struct platform_device *pdev)
15258 +{
15259 + struct atmel_mci *host = platform_get_drvdata(pdev);
15260 +
15261 + platform_set_drvdata(pdev, NULL);
15262 +
15263 + if (host) {
15264 + atmci_cleanup_debugfs(host);
15265 +
15266 + if (host->detect_pin >= 0) {
15267 + int pin = host->detect_pin;
15268 +
15269 + /* Make sure our timer doesn't enable the interrupt */
15270 + host->detect_pin = -1;
15271 + smp_wmb();
15272 +
15273 + free_irq(gpio_to_irq(pin), host->mmc);
15274 + del_timer_sync(&host->detect_timer);
15275 + cancel_delayed_work(&host->mmc->detect);
15276 + gpio_free(pin);
15277 + }
15278 +
15279 + mmc_remove_host(host->mmc);
15280 +
15281 + mci_writel(host, IDR, ~0UL);
15282 + mci_writel(host, CR, MCI_BIT(MCIDIS));
15283 + mci_readl(host, SR);
15284 +
15285 + dma_release_channel(host->dma.req.req.dmac,
15286 + host->dma.req.req.channel);
15287 +
15288 + if (host->wp_pin >= 0)
15289 + gpio_free(host->wp_pin);
15290 +
15291 + free_irq(platform_get_irq(pdev, 0), host->mmc);
15292 + iounmap(host->regs);
15293 +
15294 + clk_disable(host->mck);
15295 + clk_put(host->mck);
15296 +
15297 + mmc_free_host(host->mmc);
15298 + }
15299 + return 0;
15300 +}
15301 +
15302 +static struct platform_driver atmci_driver = {
15303 + .probe = atmci_probe,
15304 + .remove = __devexit_p(atmci_remove),
15305 + .driver = {
15306 + .name = DRIVER_NAME,
15307 + },
15308 +};
15309 +
15310 +static int __init atmci_init(void)
15311 +{
15312 + return platform_driver_register(&atmci_driver);
15313 +}
15314 +
15315 +static void __exit atmci_exit(void)
15316 +{
15317 + platform_driver_unregister(&atmci_driver);
15318 +}
15319 +
15320 +module_init(atmci_init);
15321 +module_exit(atmci_exit);
15322 +
15323 +MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
15324 +MODULE_LICENSE("GPL");
15325 Index: linux-2.6.24.7/drivers/mmc/host/atmel-mci.h
15326 ===================================================================
15327 --- /dev/null
15328 +++ linux-2.6.24.7/drivers/mmc/host/atmel-mci.h
15329 @@ -0,0 +1,192 @@
15330 +/*
15331 + * Atmel MultiMedia Card Interface driver
15332 + *
15333 + * Copyright (C) 2004-2006 Atmel Corporation
15334 + *
15335 + * This program is free software; you can redistribute it and/or modify
15336 + * it under the terms of the GNU General Public License version 2 as
15337 + * published by the Free Software Foundation.
15338 + */
15339 +#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
15340 +#define __DRIVERS_MMC_ATMEL_MCI_H__
15341 +
15342 +/* MCI register offsets */
15343 +#define MCI_CR 0x0000
15344 +#define MCI_MR 0x0004
15345 +#define MCI_DTOR 0x0008
15346 +#define MCI_SDCR 0x000c
15347 +#define MCI_ARGR 0x0010
15348 +#define MCI_CMDR 0x0014
15349 +#define MCI_BLKR 0x0018
15350 +#define MCI_RSPR 0x0020
15351 +#define MCI_RSPR1 0x0024
15352 +#define MCI_RSPR2 0x0028
15353 +#define MCI_RSPR3 0x002c
15354 +#define MCI_RDR 0x0030
15355 +#define MCI_TDR 0x0034
15356 +#define MCI_SR 0x0040
15357 +#define MCI_IER 0x0044
15358 +#define MCI_IDR 0x0048
15359 +#define MCI_IMR 0x004c
15360 +
15361 +/* Bitfields in CR */
15362 +#define MCI_MCIEN_OFFSET 0
15363 +#define MCI_MCIEN_SIZE 1
15364 +#define MCI_MCIDIS_OFFSET 1
15365 +#define MCI_MCIDIS_SIZE 1
15366 +#define MCI_PWSEN_OFFSET 2
15367 +#define MCI_PWSEN_SIZE 1
15368 +#define MCI_PWSDIS_OFFSET 3
15369 +#define MCI_PWSDIS_SIZE 1
15370 +#define MCI_SWRST_OFFSET 7
15371 +#define MCI_SWRST_SIZE 1
15372 +
15373 +/* Bitfields in MR */
15374 +#define MCI_CLKDIV_OFFSET 0
15375 +#define MCI_CLKDIV_SIZE 8
15376 +#define MCI_PWSDIV_OFFSET 8
15377 +#define MCI_PWSDIV_SIZE 3
15378 +#define MCI_RDPROOF_OFFSET 11
15379 +#define MCI_RDPROOF_SIZE 1
15380 +#define MCI_WRPROOF_OFFSET 12
15381 +#define MCI_WRPROOF_SIZE 1
15382 +#define MCI_DMAPADV_OFFSET 14
15383 +#define MCI_DMAPADV_SIZE 1
15384 +#define MCI_BLKLEN_OFFSET 16
15385 +#define MCI_BLKLEN_SIZE 16
15386 +
15387 +/* Bitfields in DTOR */
15388 +#define MCI_DTOCYC_OFFSET 0
15389 +#define MCI_DTOCYC_SIZE 4
15390 +#define MCI_DTOMUL_OFFSET 4
15391 +#define MCI_DTOMUL_SIZE 3
15392 +
15393 +/* Bitfields in SDCR */
15394 +#define MCI_SDCSEL_OFFSET 0
15395 +#define MCI_SDCSEL_SIZE 4
15396 +#define MCI_SDCBUS_OFFSET 7
15397 +#define MCI_SDCBUS_SIZE 1
15398 +
15399 +/* Bitfields in ARGR */
15400 +#define MCI_ARG_OFFSET 0
15401 +#define MCI_ARG_SIZE 32
15402 +
15403 +/* Bitfields in CMDR */
15404 +#define MCI_CMDNB_OFFSET 0
15405 +#define MCI_CMDNB_SIZE 6
15406 +#define MCI_RSPTYP_OFFSET 6
15407 +#define MCI_RSPTYP_SIZE 2
15408 +#define MCI_SPCMD_OFFSET 8
15409 +#define MCI_SPCMD_SIZE 3
15410 +#define MCI_OPDCMD_OFFSET 11
15411 +#define MCI_OPDCMD_SIZE 1
15412 +#define MCI_MAXLAT_OFFSET 12
15413 +#define MCI_MAXLAT_SIZE 1
15414 +#define MCI_TRCMD_OFFSET 16
15415 +#define MCI_TRCMD_SIZE 2
15416 +#define MCI_TRDIR_OFFSET 18
15417 +#define MCI_TRDIR_SIZE 1
15418 +#define MCI_TRTYP_OFFSET 19
15419 +#define MCI_TRTYP_SIZE 2
15420 +
15421 +/* Bitfields in BLKR */
15422 +#define MCI_BCNT_OFFSET 0
15423 +#define MCI_BCNT_SIZE 16
15424 +
15425 +/* Bitfields in RSPRn */
15426 +#define MCI_RSP_OFFSET 0
15427 +#define MCI_RSP_SIZE 32
15428 +
15429 +/* Bitfields in SR/IER/IDR/IMR */
15430 +#define MCI_CMDRDY_OFFSET 0
15431 +#define MCI_CMDRDY_SIZE 1
15432 +#define MCI_RXRDY_OFFSET 1
15433 +#define MCI_RXRDY_SIZE 1
15434 +#define MCI_TXRDY_OFFSET 2
15435 +#define MCI_TXRDY_SIZE 1
15436 +#define MCI_BLKE_OFFSET 3
15437 +#define MCI_BLKE_SIZE 1
15438 +#define MCI_DTIP_OFFSET 4
15439 +#define MCI_DTIP_SIZE 1
15440 +#define MCI_NOTBUSY_OFFSET 5
15441 +#define MCI_NOTBUSY_SIZE 1
15442 +#define MCI_ENDRX_OFFSET 6
15443 +#define MCI_ENDRX_SIZE 1
15444 +#define MCI_ENDTX_OFFSET 7
15445 +#define MCI_ENDTX_SIZE 1
15446 +#define MCI_RXBUFF_OFFSET 14
15447 +#define MCI_RXBUFF_SIZE 1
15448 +#define MCI_TXBUFE_OFFSET 15
15449 +#define MCI_TXBUFE_SIZE 1
15450 +#define MCI_RINDE_OFFSET 16
15451 +#define MCI_RINDE_SIZE 1
15452 +#define MCI_RDIRE_OFFSET 17
15453 +#define MCI_RDIRE_SIZE 1
15454 +#define MCI_RCRCE_OFFSET 18
15455 +#define MCI_RCRCE_SIZE 1
15456 +#define MCI_RENDE_OFFSET 19
15457 +#define MCI_RENDE_SIZE 1
15458 +#define MCI_RTOE_OFFSET 20
15459 +#define MCI_RTOE_SIZE 1
15460 +#define MCI_DCRCE_OFFSET 21
15461 +#define MCI_DCRCE_SIZE 1
15462 +#define MCI_DTOE_OFFSET 22
15463 +#define MCI_DTOE_SIZE 1
15464 +#define MCI_OVRE_OFFSET 30
15465 +#define MCI_OVRE_SIZE 1
15466 +#define MCI_UNRE_OFFSET 31
15467 +#define MCI_UNRE_SIZE 1
15468 +
15469 +/* Constants for DTOMUL */
15470 +#define MCI_DTOMUL_1_CYCLE 0
15471 +#define MCI_DTOMUL_16_CYCLES 1
15472 +#define MCI_DTOMUL_128_CYCLES 2
15473 +#define MCI_DTOMUL_256_CYCLES 3
15474 +#define MCI_DTOMUL_1024_CYCLES 4
15475 +#define MCI_DTOMUL_4096_CYCLES 5
15476 +#define MCI_DTOMUL_65536_CYCLES 6
15477 +#define MCI_DTOMUL_1048576_CYCLES 7
15478 +
15479 +/* Constants for RSPTYP */
15480 +#define MCI_RSPTYP_NO_RESP 0
15481 +#define MCI_RSPTYP_48_BIT 1
15482 +#define MCI_RSPTYP_136_BIT 2
15483 +
15484 +/* Constants for SPCMD */
15485 +#define MCI_SPCMD_NO_SPEC_CMD 0
15486 +#define MCI_SPCMD_INIT_CMD 1
15487 +#define MCI_SPCMD_SYNC_CMD 2
15488 +#define MCI_SPCMD_INT_CMD 4
15489 +#define MCI_SPCMD_INT_RESP 5
15490 +
15491 +/* Constants for TRCMD */
15492 +#define MCI_TRCMD_NO_TRANS 0
15493 +#define MCI_TRCMD_START_TRANS 1
15494 +#define MCI_TRCMD_STOP_TRANS 2
15495 +
15496 +/* Constants for TRTYP */
15497 +#define MCI_TRTYP_BLOCK 0
15498 +#define MCI_TRTYP_MULTI_BLOCK 1
15499 +#define MCI_TRTYP_STREAM 2
15500 +
15501 +/* Bit manipulation macros */
15502 +#define MCI_BIT(name) \
15503 + (1 << MCI_##name##_OFFSET)
15504 +#define MCI_BF(name,value) \
15505 + (((value) & ((1 << MCI_##name##_SIZE) - 1)) \
15506 + << MCI_##name##_OFFSET)
15507 +#define MCI_BFEXT(name,value) \
15508 + (((value) >> MCI_##name##_OFFSET) \
15509 + & ((1 << MCI_##name##_SIZE) - 1))
15510 +#define MCI_BFINS(name,value,old) \
15511 + (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \
15512 + << MCI_##name##_OFFSET)) \
15513 + | MCI_BF(name,value))
15514 +
15515 +/* Register access macros */
15516 +#define mci_readl(port,reg) \
15517 + __raw_readl((port)->regs + MCI_##reg)
15518 +#define mci_writel(port,reg,value) \
15519 + __raw_writel((value), (port)->regs + MCI_##reg)
15520 +
15521 +#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
15522 Index: linux-2.6.24.7/drivers/mmc/host/Kconfig
15523 ===================================================================
15524 --- linux-2.6.24.7.orig/drivers/mmc/host/Kconfig
15525 +++ linux-2.6.24.7/drivers/mmc/host/Kconfig
15526 @@ -91,6 +91,16 @@ config MMC_AT91
15527
15528 If unsure, say N.
15529
15530 +config MMC_ATMELMCI
15531 + tristate "Atmel Multimedia Card Interface support"
15532 + depends on AVR32 && MMC
15533 + help
15534 + This selects the Atmel Multimedia Card Interface. If you have
15535 + a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
15536 + slot, say Y or M here.
15537 +
15538 + If unsure, say N.
15539 +
15540 config MMC_IMX
15541 tristate "Motorola i.MX Multimedia Card Interface support"
15542 depends on ARCH_IMX
15543 Index: linux-2.6.24.7/drivers/mmc/host/Makefile
15544 ===================================================================
15545 --- linux-2.6.24.7.orig/drivers/mmc/host/Makefile
15546 +++ linux-2.6.24.7/drivers/mmc/host/Makefile
15547 @@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o
15548 obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
15549 obj-$(CONFIG_MMC_OMAP) += omap.o
15550 obj-$(CONFIG_MMC_AT91) += at91_mci.o
15551 +obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
15552 obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
15553 obj-$(CONFIG_MMC_SPI) += mmc_spi.o
15554
15555 Index: linux-2.6.24.7/drivers/mtd/chips/cfi_cmdset_0001.c
15556 ===================================================================
15557 --- linux-2.6.24.7.orig/drivers/mtd/chips/cfi_cmdset_0001.c
15558 +++ linux-2.6.24.7/drivers/mtd/chips/cfi_cmdset_0001.c
15559 @@ -50,6 +50,7 @@
15560 #define I82802AC 0x00ac
15561 #define MANUFACTURER_ST 0x0020
15562 #define M50LPW080 0x002F
15563 +#define AT49BV640D 0x02de
15564
15565 static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
15566 static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
15567 @@ -157,6 +158,47 @@ static void cfi_tell_features(struct cfi
15568 }
15569 #endif
15570
15571 +/* Atmel chips don't use the same PRI format as Intel chips */
15572 +static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
15573 +{
15574 + struct map_info *map = mtd->priv;
15575 + struct cfi_private *cfi = map->fldrv_priv;
15576 + struct cfi_pri_intelext *extp = cfi->cmdset_priv;
15577 + struct cfi_pri_atmel atmel_pri;
15578 + uint32_t features = 0;
15579 +
15580 + /* Reverse byteswapping */
15581 + extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
15582 + extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
15583 + extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
15584 +
15585 + memcpy(&atmel_pri, extp, sizeof(atmel_pri));
15586 + memset((char *)extp + 5, 0, sizeof(*extp) - 5);
15587 +
15588 + printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
15589 +
15590 + if (atmel_pri.Features & 0x01) /* chip erase supported */
15591 + features |= (1<<0);
15592 + if (atmel_pri.Features & 0x02) /* erase suspend supported */
15593 + features |= (1<<1);
15594 + if (atmel_pri.Features & 0x04) /* program suspend supported */
15595 + features |= (1<<2);
15596 + if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
15597 + features |= (1<<9);
15598 + if (atmel_pri.Features & 0x20) /* page mode read supported */
15599 + features |= (1<<7);
15600 + if (atmel_pri.Features & 0x40) /* queued erase supported */
15601 + features |= (1<<4);
15602 + if (atmel_pri.Features & 0x80) /* Protection bits supported */
15603 + features |= (1<<6);
15604 +
15605 + extp->FeatureSupport = features;
15606 +
15607 + /* burst write mode not supported */
15608 + cfi->cfiq->BufWriteTimeoutTyp = 0;
15609 + cfi->cfiq->BufWriteTimeoutMax = 0;
15610 +}
15611 +
15612 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
15613 /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
15614 static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
15615 @@ -234,6 +276,7 @@ static void fixup_use_powerup_lock(struc
15616 }
15617
15618 static struct cfi_fixup cfi_fixup_table[] = {
15619 + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
15620 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
15621 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
15622 #endif
15623 Index: linux-2.6.24.7/drivers/mtd/chips/cfi_cmdset_0002.c
15624 ===================================================================
15625 --- linux-2.6.24.7.orig/drivers/mtd/chips/cfi_cmdset_0002.c
15626 +++ linux-2.6.24.7/drivers/mtd/chips/cfi_cmdset_0002.c
15627 @@ -186,6 +186,10 @@ static void fixup_convert_atmel_pri(stru
15628 extp->TopBottom = 2;
15629 else
15630 extp->TopBottom = 3;
15631 +
15632 + /* burst write mode not supported */
15633 + cfi->cfiq->BufWriteTimeoutTyp = 0;
15634 + cfi->cfiq->BufWriteTimeoutMax = 0;
15635 }
15636
15637 static void fixup_use_secsi(struct mtd_info *mtd, void *param)
15638 @@ -218,6 +222,7 @@ static void fixup_use_atmel_lock(struct
15639 }
15640
15641 static struct cfi_fixup cfi_fixup_table[] = {
15642 + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
15643 #ifdef AMD_BOOTLOC_BUG
15644 { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
15645 #endif
15646 @@ -230,7 +235,6 @@ static struct cfi_fixup cfi_fixup_table[
15647 #if !FORCE_WORD_WRITE
15648 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
15649 #endif
15650 - { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
15651 { 0, 0, NULL, NULL }
15652 };
15653 static struct cfi_fixup jedec_fixup_table[] = {
15654 Index: linux-2.6.24.7/drivers/pcmcia/at32_cf.c
15655 ===================================================================
15656 --- /dev/null
15657 +++ linux-2.6.24.7/drivers/pcmcia/at32_cf.c
15658 @@ -0,0 +1,533 @@
15659 +/*
15660 + * Driver for AVR32 Static Memory Controller: CompactFlash support
15661 + *
15662 + * Copyright (C) 2006 Atmel Norway
15663 + *
15664 + * This program is free software; you can redistribute it and/or
15665 + * modify it under the terms of the GNU General Public License as
15666 + * published by the Free Software Foundation; either version 2 of the
15667 + * License, or (at your option) any later version.
15668 + *
15669 + * This program is distributed in the hope that it will be useful, but
15670 + * WITHOUT ANY WARRANTY; without even the implied warranty of
15671 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15672 + * General Public License for more details.
15673 + *
15674 + * You should have received a copy of the GNU General Public License
15675 + * along with this program; if not, write to the Free Software
15676 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
15677 + * 02111-1307, USA.
15678 + *
15679 + * The full GNU General Public License is included in this
15680 + * distribution in the file called COPYING.
15681 + */
15682 +#include <linux/module.h>
15683 +#include <linux/kernel.h>
15684 +#include <linux/platform_device.h>
15685 +#include <linux/init.h>
15686 +#include <linux/device.h>
15687 +#include <linux/delay.h>
15688 +#include <linux/interrupt.h>
15689 +#include <linux/err.h>
15690 +#include <linux/clk.h>
15691 +#include <linux/dma-mapping.h>
15692 +
15693 +#include <pcmcia/ss.h>
15694 +
15695 +#include <asm/gpio.h>
15696 +#include <asm/io.h>
15697 +#include <asm/arch/board.h>
15698 +
15699 +#include <asm/arch/smc.h>
15700 +
15701 +struct at32_cf_socket {
15702 + struct pcmcia_socket socket;
15703 + int detect_pin;
15704 + int reset_pin;
15705 + int vcc_pin;
15706 + int ready_pin;
15707 + struct resource res_attr;
15708 + struct resource res_mem;
15709 + struct resource res_io;
15710 + struct smc_config smc;
15711 + unsigned int irq;
15712 + unsigned int cf_cs;
15713 + socket_state_t state;
15714 + unsigned present:1;
15715 +};
15716 +#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
15717 +
15718 +/*
15719 + * We have the following memory layout relative to the base address:
15720 + *
15721 + * Alt IDE Mode: 00e0 0000 -> 00ff ffff
15722 + * True IDE Mode: 00c0 0000 -> 00df ffff
15723 + * I/O memory: 0080 0000 -> 00bf ffff
15724 + * Common memory: 0040 0000 -> 007f ffff
15725 + * Attribute memory: 0000 0000 -> 003f ffff
15726 + */
15727 +#define CF_ATTR_OFFSET 0x00000000
15728 +#define CF_MEM_OFFSET 0x00400000
15729 +#define CF_IO_OFFSET 0x00800000
15730 +#define CF_RES_SIZE 4096
15731 +
15732 +#ifdef DEBUG
15733 +
15734 +static int pc_debug;
15735 +module_param(pc_debug, int, 0644);
15736 +
15737 +static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
15738 + int level, const char *fmt, ...)
15739 +{
15740 + va_list args;
15741 +
15742 + if (pc_debug > level) {
15743 + printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
15744 + va_start(args, fmt);
15745 + vprintk(fmt, args);
15746 + va_end(args);
15747 + }
15748 +}
15749 +
15750 +#define debug(cf, lvl, fmt, arg...) \
15751 + at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
15752 +
15753 +#else
15754 +#define debug(cf, lvl, fmt, arg...) do { } while (0)
15755 +#endif
15756 +
15757 +static inline int at32_cf_present(struct at32_cf_socket *cf)
15758 +{
15759 + int present = 1;
15760 +
15761 + /* If we don't have a detect pin, assume the card is present */
15762 + if (cf->detect_pin >= 0)
15763 + present = !gpio_get_value(cf->detect_pin);
15764 +
15765 + return present;
15766 +}
15767 +
15768 +static irqreturn_t at32_cf_irq(int irq, void *dev_id)
15769 +{
15770 + struct at32_cf_socket *cf = dev_id;
15771 + unsigned int present;
15772 +
15773 + present = at32_cf_present(cf);
15774 + if (present != cf->present) {
15775 + cf->present = present;
15776 + debug(cf, 3, "card %s\n", present ? "present" : "gone");
15777 + pcmcia_parse_events(&cf->socket, SS_DETECT);
15778 + }
15779 +
15780 + return IRQ_HANDLED;
15781 +}
15782 +
15783 +static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
15784 +{
15785 + struct at32_cf_socket *cf;
15786 + u_int status = 0;
15787 +
15788 + cf = container_of(sock, struct at32_cf_socket, socket);
15789 +
15790 + if (at32_cf_present(cf)) {
15791 + /* NOTE: gpio on AP7xxx is 3.3V */
15792 + status = SS_DETECT | SS_3VCARD;
15793 + if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
15794 + status |= SS_READY;
15795 + if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
15796 + status |= SS_POWERON;
15797 + }
15798 +
15799 + *value = status;
15800 + return 0;
15801 +}
15802 +
15803 +static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
15804 +{
15805 + struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
15806 +
15807 + debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
15808 + (state->csc_mask==0)?"<NONE> ":"",
15809 + (state->csc_mask&SS_DETECT)?"DETECT ":"",
15810 + (state->csc_mask&SS_READY)?"READY ":"",
15811 + (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
15812 + (state->csc_mask&SS_BATWARN)?"BATWARN ":"",
15813 + (state->csc_mask&SS_STSCHG)?"STSCHG ":"",
15814 + (state->flags==0)?"<NONE> ":"",
15815 + (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
15816 + (state->flags&SS_IOCARD)?"IOCARD ":"",
15817 + (state->flags&SS_RESET)?"RESET ":"",
15818 + (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
15819 + (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
15820 + state->Vcc, state->Vpp, state->io_irq);
15821 +
15822 + /*
15823 + * TODO: Allow boards to override this in case they have level
15824 + * converters.
15825 + */
15826 + switch (state->Vcc) {
15827 + case 0:
15828 + if (cf->vcc_pin >= 0)
15829 + gpio_set_value(cf->vcc_pin, 0);
15830 + break;
15831 + case 33:
15832 + if (cf->vcc_pin >= 0)
15833 + gpio_set_value(cf->vcc_pin, 1);
15834 + break;
15835 + default:
15836 + return -EINVAL;
15837 + }
15838 +
15839 + if (cf->reset_pin >= 0)
15840 + gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
15841 +
15842 + cf->state = *state;
15843 +
15844 + return 0;
15845 +}
15846 +
15847 +static int at32_cf_socket_init(struct pcmcia_socket *sock)
15848 +{
15849 + debug(to_at32_cf(sock), 2, "called\n");
15850 +
15851 + return 0;
15852 +}
15853 +
15854 +static int at32_cf_suspend(struct pcmcia_socket *sock)
15855 +{
15856 + debug(to_at32_cf(sock), 2, "called\n");
15857 +
15858 + at32_cf_set_socket(sock, &dead_socket);
15859 +
15860 + return 0;
15861 +}
15862 +
15863 +static int at32_cf_set_io_map(struct pcmcia_socket *sock,
15864 + struct pccard_io_map *map)
15865 +{
15866 + struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
15867 + int retval;
15868 +
15869 + debug(cf, 2, "map %u speed %u start 0x%08x stop 0x%08x\n",
15870 + map->map, map->speed, map->start, map->stop);
15871 + debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
15872 + (map->flags == 0) ? "<NONE>":"",
15873 + (map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
15874 + (map->flags & MAP_16BIT) ? "16BIT " : "",
15875 + (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
15876 + (map->flags & MAP_0WS) ? "0WS " : "",
15877 + (map->flags & MAP_WRPROT) ? "WRPROT " : "",
15878 + (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
15879 + (map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
15880 +
15881 + map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
15882 +
15883 + if (map->flags & MAP_16BIT)
15884 + cf->smc.bus_width = 2;
15885 + else
15886 + cf->smc.bus_width = 1;
15887 +
15888 + if (map->flags & MAP_USE_WAIT)
15889 + cf->smc.nwait_mode = 3;
15890 + else
15891 + cf->smc.nwait_mode = 0;
15892 +
15893 + retval = smc_set_configuration(cf->cf_cs, &cf->smc);
15894 + if (retval) {
15895 + printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
15896 + return retval;
15897 + }
15898 +
15899 + map->start = cf->socket.io_offset;
15900 + map->stop = map->start + CF_RES_SIZE - 1;
15901 +
15902 + return 0;
15903 +}
15904 +
15905 +static int
15906 +at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
15907 +{
15908 + struct at32_cf_socket *cf;
15909 + struct resource *res;
15910 + int retval;
15911 +
15912 + cf = container_of(sock, struct at32_cf_socket, socket);
15913 +
15914 + debug(cf, 2, "map %u speed %u card_start %08x\n",
15915 + map->map, map->speed, map->card_start);
15916 + debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
15917 + (map->flags==0)?"<NONE>":"",
15918 + (map->flags&MAP_ACTIVE)?"ACTIVE ":"",
15919 + (map->flags&MAP_16BIT)?"16BIT ":"",
15920 + (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
15921 + (map->flags&MAP_0WS)?"0WS ":"",
15922 + (map->flags&MAP_WRPROT)?"WRPROT ":"",
15923 + (map->flags&MAP_ATTRIB)?"ATTRIB ":"",
15924 + (map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
15925 +
15926 + if (map->card_start)
15927 + return -EINVAL;
15928 +
15929 + map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
15930 +
15931 + if (map->flags & MAP_ATTRIB) {
15932 + res = &cf->res_attr;
15933 +
15934 + /* Linksys WCF12 seems to use WAIT when reading CIS */
15935 + map->flags |= MAP_USE_WAIT;
15936 + } else {
15937 + res = &cf->res_mem;
15938 + }
15939 +
15940 + if (map->flags & MAP_USE_WAIT)
15941 + cf->smc.nwait_mode = 3;
15942 + else
15943 + cf->smc.nwait_mode = 0;
15944 +
15945 + retval = smc_set_configuration(cf->cf_cs, &cf->smc);
15946 + if (retval) {
15947 + printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
15948 + return retval;
15949 + }
15950 +
15951 + map->static_start = res->start;
15952 +
15953 + return 0;
15954 +}
15955 +
15956 +static struct pccard_operations at32_cf_ops = {
15957 + .init = at32_cf_socket_init,
15958 + .suspend = at32_cf_suspend,
15959 + .get_status = at32_cf_get_status,
15960 + .set_socket = at32_cf_set_socket,
15961 + .set_io_map = at32_cf_set_io_map,
15962 + .set_mem_map = at32_cf_set_mem_map,
15963 +};
15964 +
15965 +static int __init request_pin(struct platform_device *pdev,
15966 + unsigned int pin, const char *name)
15967 +{
15968 + if (gpio_request(pin, name)) {
15969 + dev_warn(&pdev->dev, "failed to request %s pin\n", name);
15970 + return -1;
15971 + }
15972 +
15973 + return pin;
15974 +}
15975 +
15976 +static struct smc_timing at32_cf_timing __initdata = {
15977 + .ncs_read_setup = 30,
15978 + .nrd_setup = 100,
15979 + .ncs_write_setup = 30,
15980 + .nwe_setup = 100,
15981 +
15982 + .ncs_read_pulse = 360,
15983 + .nrd_pulse = 290,
15984 + .ncs_write_pulse = 360,
15985 + .nwe_pulse = 290,
15986 +
15987 + .read_cycle = 420,
15988 + .write_cycle = 420,
15989 +};
15990 +
15991 +static int __init at32_cf_probe(struct platform_device *pdev)
15992 +{
15993 + struct at32_cf_socket *cf;
15994 + struct cf_platform_data *board = pdev->dev.platform_data;
15995 + struct resource *res_skt;
15996 + int irq;
15997 + int ret;
15998 +
15999 + dev_dbg(&pdev->dev, "probe");
16000 +
16001 + if (!board)
16002 + return -ENXIO;
16003 +
16004 + res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
16005 + if (!res_skt)
16006 + return -ENXIO;
16007 +
16008 + irq = platform_get_irq(pdev, 0);
16009 + if (irq < 0)
16010 + return irq;
16011 +
16012 + cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
16013 + if (!cf)
16014 + return -ENOMEM;
16015 +
16016 + cf->detect_pin = -1;
16017 + cf->reset_pin = -1;
16018 + cf->vcc_pin = -1;
16019 + cf->ready_pin = -1;
16020 + cf->cf_cs = board->cs;
16021 +
16022 + if (board->detect_pin != GPIO_PIN_NONE)
16023 + cf->detect_pin = request_pin(pdev, board->detect_pin,
16024 + "cf_detect");
16025 + if (board->reset_pin != GPIO_PIN_NONE)
16026 + cf->reset_pin = request_pin(pdev, board->reset_pin,
16027 + "cf_reset");
16028 + if (board->vcc_pin != GPIO_PIN_NONE)
16029 + cf->vcc_pin = request_pin(pdev, board->vcc_pin,
16030 + "cf_vcc");
16031 + if (board->ready_pin != GPIO_PIN_NONE)
16032 + /* READY is also used for irq through EIM */
16033 + cf->ready_pin = board->ready_pin;
16034 +
16035 + debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
16036 + cf->detect_pin, cf->reset_pin, cf->vcc_pin);
16037 +
16038 + cf->socket.pci_irq = irq;
16039 + cf->socket.ops = &at32_cf_ops;
16040 + cf->socket.resource_ops = &pccard_static_ops;
16041 + cf->socket.dev.parent = &pdev->dev;
16042 + cf->socket.owner = THIS_MODULE;
16043 + cf->socket.features =
16044 + SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
16045 + cf->socket.map_size = CF_RES_SIZE;
16046 +
16047 + cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
16048 + cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
16049 + cf->res_attr.name = "attribute";
16050 + cf->res_attr.flags = IORESOURCE_MEM;
16051 + ret = request_resource(res_skt, &cf->res_attr);
16052 + if (ret)
16053 + goto err_request_res_attr;
16054 +
16055 + cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
16056 + cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
16057 + cf->res_mem.name = "memory";
16058 + cf->res_mem.flags = IORESOURCE_MEM;
16059 + ret = request_resource(res_skt, &cf->res_mem);
16060 + if (ret)
16061 + goto err_request_res_mem;
16062 +
16063 + cf->res_io.start = res_skt->start + CF_IO_OFFSET;
16064 + cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
16065 + cf->res_io.name = "io";
16066 + cf->res_io.flags = IORESOURCE_MEM;
16067 + ret = request_resource(res_skt, &cf->res_io);
16068 + if (ret)
16069 + goto err_request_res_io;
16070 +
16071 + cf->socket.io_offset = cf->res_io.start;
16072 +
16073 + if (cf->detect_pin >= 0) {
16074 + ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
16075 + IRQF_SHARED, "cf_detect", cf);
16076 + if (ret) {
16077 + debug(cf, 1,
16078 + "failed to request cf_detect interrupt\n");
16079 + goto err_detect_irq;
16080 + }
16081 + }
16082 +
16083 + cf->present = at32_cf_present(cf);
16084 +
16085 + /* Setup SMC timings */
16086 + smc_set_timing(&cf->smc, &at32_cf_timing);
16087 +
16088 + cf->smc.bus_width = 2;
16089 + cf->smc.nrd_controlled = 1;
16090 + cf->smc.nwe_controlled = 1;
16091 + cf->smc.nwait_mode = 0;
16092 + cf->smc.byte_write = 0;
16093 + cf->smc.tdf_cycles = 8;
16094 + cf->smc.tdf_mode = 0;
16095 +
16096 + ret = smc_set_configuration(cf->cf_cs, &cf->smc);
16097 + if (ret) {
16098 + debug(cf, 1, "failed to configure SMC\n", ret);
16099 + goto err_smc;
16100 + }
16101 +
16102 + ret = pcmcia_register_socket(&cf->socket);
16103 + if (ret) {
16104 + debug(cf, 1, "failed to register socket: %d\n", ret);
16105 + goto err_register_socket;
16106 + }
16107 +
16108 + if (cf->reset_pin >= 0)
16109 + gpio_direction_output(cf->reset_pin, 0);
16110 +
16111 + platform_set_drvdata(pdev, cf);
16112 +
16113 + dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
16114 + (unsigned long)res_skt->start);
16115 +
16116 + return 0;
16117 +
16118 +err_register_socket:
16119 +err_smc:
16120 + if (cf->detect_pin >= 0)
16121 + free_irq(gpio_to_irq(cf->detect_pin), cf);
16122 +err_detect_irq:
16123 + release_resource(&cf->res_io);
16124 +err_request_res_io:
16125 + release_resource(&cf->res_mem);
16126 +err_request_res_mem:
16127 + release_resource(&cf->res_attr);
16128 +err_request_res_attr:
16129 + if (cf->vcc_pin >= 0)
16130 + gpio_free(cf->vcc_pin);
16131 + if (cf->reset_pin >= 0)
16132 + gpio_free(cf->reset_pin);
16133 + if (cf->detect_pin >= 0)
16134 + gpio_free(cf->detect_pin);
16135 + kfree(cf);
16136 +
16137 + return ret;
16138 +}
16139 +
16140 +static int __exit at32_cf_remove(struct platform_device *pdev)
16141 +{
16142 + struct at32_cf_socket *cf = platform_get_drvdata(pdev);
16143 +
16144 + pcmcia_unregister_socket(&cf->socket);
16145 + if (cf->detect_pin >= 0) {
16146 + free_irq(gpio_to_irq(cf->detect_pin), cf);
16147 + gpio_free(cf->detect_pin);
16148 + }
16149 + if (cf->vcc_pin >= 0)
16150 + gpio_free(cf->vcc_pin);
16151 + if (cf->reset_pin >= 0)
16152 + gpio_free(cf->reset_pin);
16153 +
16154 + release_resource(&cf->res_io);
16155 + release_resource(&cf->res_mem);
16156 + release_resource(&cf->res_attr);
16157 + kfree(cf);
16158 + platform_set_drvdata(pdev, NULL);
16159 +
16160 + return 0;
16161 +}
16162 +
16163 +static struct platform_driver at32_cf_driver = {
16164 + .remove = __exit_p(at32_cf_remove),
16165 + .driver = {
16166 + .name = "at32_cf",
16167 + .owner = THIS_MODULE,
16168 + },
16169 +};
16170 +
16171 +static int __init at32_cf_init(void)
16172 +{
16173 + int ret;
16174 +
16175 + ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
16176 + if (ret)
16177 + printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
16178 + return ret;
16179 +}
16180 +
16181 +static void __exit at32_cf_exit(void)
16182 +{
16183 + platform_driver_unregister(&at32_cf_driver);
16184 +}
16185 +
16186 +module_init(at32_cf_init);
16187 +module_exit(at32_cf_exit);
16188 +
16189 +MODULE_LICENSE("GPL");
16190 +MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
16191 +MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
16192 Index: linux-2.6.24.7/drivers/pcmcia/Kconfig
16193 ===================================================================
16194 --- linux-2.6.24.7.orig/drivers/pcmcia/Kconfig
16195 +++ linux-2.6.24.7/drivers/pcmcia/Kconfig
16196 @@ -276,6 +276,13 @@ config ELECTRA_CF
16197 Say Y here to support the CompactFlash controller on the
16198 PA Semi Electra eval board.
16199
16200 +config AT32_CF
16201 + tristate "AT32AP CompactFlash Controller"
16202 + depends on PCMCIA && AVR32 && PLATFORM_AT32AP
16203 + help
16204 + Say Y here to support the CompactFlash controller on AT32 chips.
16205 + Or choose M to compile the driver as a module named "at32_cf".
16206 +
16207 config PCCARD_NONSTATIC
16208 tristate
16209
16210 Index: linux-2.6.24.7/drivers/pcmcia/Makefile
16211 ===================================================================
16212 --- linux-2.6.24.7.orig/drivers/pcmcia/Makefile
16213 +++ linux-2.6.24.7/drivers/pcmcia/Makefile
16214 @@ -38,6 +38,7 @@ obj-$(CONFIG_PCMCIA_VRC4173) += vrc417
16215 obj-$(CONFIG_OMAP_CF) += omap_cf.o
16216 obj-$(CONFIG_AT91_CF) += at91_cf.o
16217 obj-$(CONFIG_ELECTRA_CF) += electra_cf.o
16218 +obj-$(CONFIG_AT32_CF) += at32_cf.o
16219
16220 sa11xx_core-y += soc_common.o sa11xx_base.o
16221 pxa2xx_core-y += soc_common.o pxa2xx_base.o
16222 Index: linux-2.6.24.7/drivers/serial/atmel_serial.c
16223 ===================================================================
16224 --- linux-2.6.24.7.orig/drivers/serial/atmel_serial.c
16225 +++ linux-2.6.24.7/drivers/serial/atmel_serial.c
16226 @@ -7,6 +7,8 @@
16227 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
16228 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
16229 *
16230 + * DMA support added by Chip Coldwell.
16231 + *
16232 * This program is free software; you can redistribute it and/or modify
16233 * it under the terms of the GNU General Public License as published by
16234 * the Free Software Foundation; either version 2 of the License, or
16235 @@ -33,7 +35,9 @@
16236 #include <linux/sysrq.h>
16237 #include <linux/tty_flip.h>
16238 #include <linux/platform_device.h>
16239 +#include <linux/dma-mapping.h>
16240 #include <linux/atmel_pdc.h>
16241 +#include <linux/atmel_serial.h>
16242
16243 #include <asm/io.h>
16244
16245 @@ -45,7 +49,9 @@
16246 #include <asm/arch/gpio.h>
16247 #endif
16248
16249 -#include "atmel_serial.h"
16250 +#define PDC_BUFFER_SIZE 512
16251 +/* Revisit: We should calculate this based on the actual port settings */
16252 +#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
16253
16254 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
16255 #define SUPPORT_SYSRQ
16256 @@ -74,6 +80,7 @@
16257
16258 #define ATMEL_ISR_PASS_LIMIT 256
16259
16260 +/* UART registers. CR is write-only, hence no GET macro */
16261 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
16262 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
16263 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
16264 @@ -87,8 +94,6 @@
16265 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
16266 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
16267
16268 -// #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only
16269 -
16270 /* PDC registers */
16271 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
16272 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
16273 @@ -101,12 +106,24 @@
16274
16275 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
16276 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
16277 -//#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
16278 -//#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
16279
16280 static int (*atmel_open_hook)(struct uart_port *);
16281 static void (*atmel_close_hook)(struct uart_port *);
16282
16283 +struct atmel_dma_buffer {
16284 + unsigned char *buf;
16285 + dma_addr_t dma_addr;
16286 + unsigned int dma_size;
16287 + unsigned int ofs;
16288 +};
16289 +
16290 +struct atmel_uart_char {
16291 + u16 status;
16292 + u16 ch;
16293 +};
16294 +
16295 +#define ATMEL_SERIAL_RINGSIZE 1024
16296 +
16297 /*
16298 * We wrap our port structure around the generic uart_port.
16299 */
16300 @@ -115,6 +132,19 @@ struct atmel_uart_port {
16301 struct clk *clk; /* uart clock */
16302 unsigned short suspended; /* is port suspended? */
16303 int break_active; /* break being received */
16304 +
16305 + short use_dma_rx; /* enable PDC receiver */
16306 + short pdc_rx_idx; /* current PDC RX buffer */
16307 + struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
16308 +
16309 + short use_dma_tx; /* enable PDC transmitter */
16310 + struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
16311 +
16312 + struct tasklet_struct tasklet;
16313 + unsigned int irq_status;
16314 + unsigned int irq_status_prev;
16315 +
16316 + struct circ_buf rx_ring;
16317 };
16318
16319 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
16320 @@ -123,6 +153,38 @@ static struct atmel_uart_port atmel_port
16321 static struct console atmel_console;
16322 #endif
16323
16324 +static inline struct atmel_uart_port *
16325 +to_atmel_uart_port(struct uart_port *uart)
16326 +{
16327 + return container_of(uart, struct atmel_uart_port, uart);
16328 +}
16329 +
16330 +#ifdef CONFIG_SERIAL_ATMEL_PDC
16331 +static bool atmel_use_dma_rx(struct uart_port *port)
16332 +{
16333 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16334 +
16335 + return atmel_port->use_dma_rx;
16336 +}
16337 +
16338 +static bool atmel_use_dma_tx(struct uart_port *port)
16339 +{
16340 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16341 +
16342 + return atmel_port->use_dma_tx;
16343 +}
16344 +#else
16345 +static bool atmel_use_dma_rx(struct uart_port *port)
16346 +{
16347 + return false;
16348 +}
16349 +
16350 +static bool atmel_use_dma_tx(struct uart_port *port)
16351 +{
16352 + return false;
16353 +}
16354 +#endif
16355 +
16356 /*
16357 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
16358 */
16359 @@ -142,8 +204,8 @@ static void atmel_set_mctrl(struct uart_
16360 #ifdef CONFIG_ARCH_AT91RM9200
16361 if (cpu_is_at91rm9200()) {
16362 /*
16363 - * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
16364 - * We need to drive the pin manually.
16365 + * AT91RM9200 Errata #39: RTS0 is not internally connected
16366 + * to PA21. We need to drive the pin manually.
16367 */
16368 if (port->mapbase == AT91RM9200_BASE_US0) {
16369 if (mctrl & TIOCM_RTS)
16370 @@ -204,7 +266,12 @@ static u_int atmel_get_mctrl(struct uart
16371 */
16372 static void atmel_stop_tx(struct uart_port *port)
16373 {
16374 - UART_PUT_IDR(port, ATMEL_US_TXRDY);
16375 + if (atmel_use_dma_tx(port)) {
16376 + /* disable PDC transmit */
16377 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
16378 + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16379 + } else
16380 + UART_PUT_IDR(port, ATMEL_US_TXRDY);
16381 }
16382
16383 /*
16384 @@ -212,7 +279,17 @@ static void atmel_stop_tx(struct uart_po
16385 */
16386 static void atmel_start_tx(struct uart_port *port)
16387 {
16388 - UART_PUT_IER(port, ATMEL_US_TXRDY);
16389 + if (atmel_use_dma_tx(port)) {
16390 + if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
16391 + /* The transmitter is already running. Yes, we
16392 + really need this.*/
16393 + return;
16394 +
16395 + UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16396 + /* re-enable PDC transmit */
16397 + UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
16398 + } else
16399 + UART_PUT_IER(port, ATMEL_US_TXRDY);
16400 }
16401
16402 /*
16403 @@ -220,7 +297,12 @@ static void atmel_start_tx(struct uart_p
16404 */
16405 static void atmel_stop_rx(struct uart_port *port)
16406 {
16407 - UART_PUT_IDR(port, ATMEL_US_RXRDY);
16408 + if (atmel_use_dma_rx(port)) {
16409 + /* disable PDC receive */
16410 + UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
16411 + UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
16412 + } else
16413 + UART_PUT_IDR(port, ATMEL_US_RXRDY);
16414 }
16415
16416 /*
16417 @@ -228,7 +310,8 @@ static void atmel_stop_rx(struct uart_po
16418 */
16419 static void atmel_enable_ms(struct uart_port *port)
16420 {
16421 - UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
16422 + UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
16423 + | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
16424 }
16425
16426 /*
16427 @@ -243,22 +326,63 @@ static void atmel_break_ctl(struct uart_
16428 }
16429
16430 /*
16431 + * Stores the incoming character in the ring buffer
16432 + */
16433 +static void
16434 +atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
16435 + unsigned int ch)
16436 +{
16437 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16438 + struct circ_buf *ring = &atmel_port->rx_ring;
16439 + struct atmel_uart_char *c;
16440 +
16441 + if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
16442 + /* Buffer overflow, ignore char */
16443 + return;
16444 +
16445 + c = &((struct atmel_uart_char *)ring->buf)[ring->head];
16446 + c->status = status;
16447 + c->ch = ch;
16448 +
16449 + /* Make sure the character is stored before we update head. */
16450 + smp_wmb();
16451 +
16452 + ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
16453 +}
16454 +
16455 +/*
16456 + * Deal with parity, framing and overrun errors.
16457 + */
16458 +static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
16459 +{
16460 + /* clear error */
16461 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
16462 +
16463 + if (status & ATMEL_US_RXBRK) {
16464 + /* ignore side-effect */
16465 + status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
16466 + port->icount.brk++;
16467 + }
16468 + if (status & ATMEL_US_PARE)
16469 + port->icount.parity++;
16470 + if (status & ATMEL_US_FRAME)
16471 + port->icount.frame++;
16472 + if (status & ATMEL_US_OVRE)
16473 + port->icount.overrun++;
16474 +}
16475 +
16476 +/*
16477 * Characters received (called from interrupt handler)
16478 */
16479 static void atmel_rx_chars(struct uart_port *port)
16480 {
16481 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
16482 - struct tty_struct *tty = port->info->tty;
16483 - unsigned int status, ch, flg;
16484 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16485 + unsigned int status, ch;
16486
16487 status = UART_GET_CSR(port);
16488 while (status & ATMEL_US_RXRDY) {
16489 ch = UART_GET_CHAR(port);
16490
16491 - port->icount.rx++;
16492 -
16493 - flg = TTY_NORMAL;
16494 -
16495 /*
16496 * note that the error handling code is
16497 * out of the main execution path
16498 @@ -266,15 +390,14 @@ static void atmel_rx_chars(struct uart_p
16499 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
16500 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
16501 || atmel_port->break_active)) {
16502 - UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */
16503 +
16504 + /* clear error */
16505 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
16506 +
16507 if (status & ATMEL_US_RXBRK
16508 && !atmel_port->break_active) {
16509 - status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
16510 - port->icount.brk++;
16511 atmel_port->break_active = 1;
16512 UART_PUT_IER(port, ATMEL_US_RXBRK);
16513 - if (uart_handle_break(port))
16514 - goto ignore_char;
16515 } else {
16516 /*
16517 * This is either the end-of-break
16518 @@ -287,52 +410,30 @@ static void atmel_rx_chars(struct uart_p
16519 status &= ~ATMEL_US_RXBRK;
16520 atmel_port->break_active = 0;
16521 }
16522 - if (status & ATMEL_US_PARE)
16523 - port->icount.parity++;
16524 - if (status & ATMEL_US_FRAME)
16525 - port->icount.frame++;
16526 - if (status & ATMEL_US_OVRE)
16527 - port->icount.overrun++;
16528 -
16529 - status &= port->read_status_mask;
16530 -
16531 - if (status & ATMEL_US_RXBRK)
16532 - flg = TTY_BREAK;
16533 - else if (status & ATMEL_US_PARE)
16534 - flg = TTY_PARITY;
16535 - else if (status & ATMEL_US_FRAME)
16536 - flg = TTY_FRAME;
16537 }
16538
16539 - if (uart_handle_sysrq_char(port, ch))
16540 - goto ignore_char;
16541 -
16542 - uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
16543 -
16544 - ignore_char:
16545 + atmel_buffer_rx_char(port, status, ch);
16546 status = UART_GET_CSR(port);
16547 }
16548
16549 - tty_flip_buffer_push(tty);
16550 + tasklet_schedule(&atmel_port->tasklet);
16551 }
16552
16553 /*
16554 - * Transmit characters (called from interrupt handler)
16555 + * Transmit characters (called from tasklet with TXRDY interrupt
16556 + * disabled)
16557 */
16558 static void atmel_tx_chars(struct uart_port *port)
16559 {
16560 struct circ_buf *xmit = &port->info->xmit;
16561
16562 - if (port->x_char) {
16563 + if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
16564 UART_PUT_CHAR(port, port->x_char);
16565 port->icount.tx++;
16566 port->x_char = 0;
16567 - return;
16568 }
16569 - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
16570 - atmel_stop_tx(port);
16571 + if (uart_circ_empty(xmit) || uart_tx_stopped(port))
16572 return;
16573 - }
16574
16575 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
16576 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
16577 @@ -345,8 +446,88 @@ static void atmel_tx_chars(struct uart_p
16578 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
16579 uart_write_wakeup(port);
16580
16581 - if (uart_circ_empty(xmit))
16582 - atmel_stop_tx(port);
16583 + if (!uart_circ_empty(xmit))
16584 + UART_PUT_IER(port, ATMEL_US_TXRDY);
16585 +}
16586 +
16587 +/*
16588 + * receive interrupt handler.
16589 + */
16590 +static void
16591 +atmel_handle_receive(struct uart_port *port, unsigned int pending)
16592 +{
16593 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16594 +
16595 + if (atmel_use_dma_rx(port)) {
16596 + /*
16597 + * PDC receive. Just schedule the tasklet and let it
16598 + * figure out the details.
16599 + *
16600 + * TODO: We're not handling error flags correctly at
16601 + * the moment.
16602 + */
16603 + if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
16604 + UART_PUT_IDR(port, (ATMEL_US_ENDRX
16605 + | ATMEL_US_TIMEOUT));
16606 + tasklet_schedule(&atmel_port->tasklet);
16607 + }
16608 +
16609 + if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
16610 + ATMEL_US_FRAME | ATMEL_US_PARE))
16611 + atmel_pdc_rxerr(port, pending);
16612 + }
16613 +
16614 + /* Interrupt receive */
16615 + if (pending & ATMEL_US_RXRDY)
16616 + atmel_rx_chars(port);
16617 + else if (pending & ATMEL_US_RXBRK) {
16618 + /*
16619 + * End of break detected. If it came along with a
16620 + * character, atmel_rx_chars will handle it.
16621 + */
16622 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
16623 + UART_PUT_IDR(port, ATMEL_US_RXBRK);
16624 + atmel_port->break_active = 0;
16625 + }
16626 +}
16627 +
16628 +/*
16629 + * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
16630 + */
16631 +static void
16632 +atmel_handle_transmit(struct uart_port *port, unsigned int pending)
16633 +{
16634 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16635 +
16636 + if (atmel_use_dma_tx(port)) {
16637 + /* PDC transmit */
16638 + if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
16639 + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16640 + tasklet_schedule(&atmel_port->tasklet);
16641 + }
16642 + } else {
16643 + /* Interrupt transmit */
16644 + if (pending & ATMEL_US_TXRDY) {
16645 + UART_PUT_IDR(port, ATMEL_US_TXRDY);
16646 + tasklet_schedule(&atmel_port->tasklet);
16647 + }
16648 + }
16649 +}
16650 +
16651 +/*
16652 + * status flags interrupt handler.
16653 + */
16654 +static void
16655 +atmel_handle_status(struct uart_port *port, unsigned int pending,
16656 + unsigned int status)
16657 +{
16658 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16659 +
16660 + if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
16661 + | ATMEL_US_CTSIC)) {
16662 + atmel_port->irq_status = status;
16663 + tasklet_schedule(&atmel_port->tasklet);
16664 + }
16665 }
16666
16667 /*
16668 @@ -355,47 +536,255 @@ static void atmel_tx_chars(struct uart_p
16669 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
16670 {
16671 struct uart_port *port = dev_id;
16672 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
16673 unsigned int status, pending, pass_counter = 0;
16674
16675 - status = UART_GET_CSR(port);
16676 - pending = status & UART_GET_IMR(port);
16677 - while (pending) {
16678 - /* Interrupt receive */
16679 - if (pending & ATMEL_US_RXRDY)
16680 - atmel_rx_chars(port);
16681 - else if (pending & ATMEL_US_RXBRK) {
16682 + do {
16683 + status = UART_GET_CSR(port);
16684 + pending = status & UART_GET_IMR(port);
16685 + if (!pending)
16686 + break;
16687 +
16688 + atmel_handle_receive(port, pending);
16689 + atmel_handle_status(port, pending, status);
16690 + atmel_handle_transmit(port, pending);
16691 + } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
16692 +
16693 + return IRQ_HANDLED;
16694 +}
16695 +
16696 +/*
16697 + * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
16698 + */
16699 +static void atmel_tx_dma(struct uart_port *port)
16700 +{
16701 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16702 + struct circ_buf *xmit = &port->info->xmit;
16703 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
16704 + int count;
16705 +
16706 + xmit->tail += pdc->ofs;
16707 + xmit->tail &= UART_XMIT_SIZE - 1;
16708 +
16709 + port->icount.tx += pdc->ofs;
16710 + pdc->ofs = 0;
16711 +
16712 + if (!uart_circ_empty(xmit)) {
16713 + /* more to transmit - setup next transfer */
16714 +
16715 + /* disable PDC transmit */
16716 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
16717 + dma_sync_single_for_device(port->dev,
16718 + pdc->dma_addr,
16719 + pdc->dma_size,
16720 + DMA_TO_DEVICE);
16721 +
16722 + count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
16723 + pdc->ofs = count;
16724 +
16725 + UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
16726 + UART_PUT_TCR(port, count);
16727 + /* re-enable PDC transmit and interrupts */
16728 + UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
16729 + UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16730 + } else {
16731 + /* nothing left to transmit - disable the transmitter */
16732 +
16733 + /* disable PDC transmit */
16734 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
16735 + }
16736 +
16737 + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
16738 + uart_write_wakeup(port);
16739 +}
16740 +
16741 +static void atmel_rx_from_ring(struct uart_port *port)
16742 +{
16743 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16744 + struct circ_buf *ring = &atmel_port->rx_ring;
16745 + unsigned int flg;
16746 + unsigned int status;
16747 +
16748 + while (ring->head != ring->tail) {
16749 + struct atmel_uart_char c;
16750 +
16751 + /* Make sure c is loaded after head. */
16752 + smp_rmb();
16753 +
16754 + c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
16755 +
16756 + ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
16757 +
16758 + port->icount.rx++;
16759 + status = c.status;
16760 + flg = TTY_NORMAL;
16761 +
16762 + /*
16763 + * note that the error handling code is
16764 + * out of the main execution path
16765 + */
16766 + if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
16767 + | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
16768 + if (status & ATMEL_US_RXBRK) {
16769 + /* ignore side-effect */
16770 + status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
16771 +
16772 + port->icount.brk++;
16773 + if (uart_handle_break(port))
16774 + continue;
16775 + }
16776 + if (status & ATMEL_US_PARE)
16777 + port->icount.parity++;
16778 + if (status & ATMEL_US_FRAME)
16779 + port->icount.frame++;
16780 + if (status & ATMEL_US_OVRE)
16781 + port->icount.overrun++;
16782 +
16783 + status &= port->read_status_mask;
16784 +
16785 + if (status & ATMEL_US_RXBRK)
16786 + flg = TTY_BREAK;
16787 + else if (status & ATMEL_US_PARE)
16788 + flg = TTY_PARITY;
16789 + else if (status & ATMEL_US_FRAME)
16790 + flg = TTY_FRAME;
16791 + }
16792 +
16793 +
16794 + if (uart_handle_sysrq_char(port, c.ch))
16795 + continue;
16796 +
16797 + uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
16798 + }
16799 +
16800 + /*
16801 + * Drop the lock here since it might end up calling
16802 + * uart_start(), which takes the lock.
16803 + */
16804 + spin_unlock(&port->lock);
16805 + tty_flip_buffer_push(port->info->tty);
16806 + spin_lock(&port->lock);
16807 +}
16808 +
16809 +static void atmel_rx_from_dma(struct uart_port *port)
16810 +{
16811 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16812 + struct tty_struct *tty = port->info->tty;
16813 + struct atmel_dma_buffer *pdc;
16814 + int rx_idx = atmel_port->pdc_rx_idx;
16815 + unsigned int head;
16816 + unsigned int tail;
16817 + unsigned int count;
16818 +
16819 + do {
16820 + /* Reset the UART timeout early so that we don't miss one */
16821 + UART_PUT_CR(port, ATMEL_US_STTTO);
16822 +
16823 + pdc = &atmel_port->pdc_rx[rx_idx];
16824 + head = UART_GET_RPR(port) - pdc->dma_addr;
16825 + tail = pdc->ofs;
16826 +
16827 + /* If the PDC has switched buffers, RPR won't contain
16828 + * any address within the current buffer. Since head
16829 + * is unsigned, we just need a one-way comparison to
16830 + * find out.
16831 + *
16832 + * In this case, we just need to consume the entire
16833 + * buffer and resubmit it for DMA. This will clear the
16834 + * ENDRX bit as well, so that we can safely re-enable
16835 + * all interrupts below.
16836 + */
16837 + head = min(head, pdc->dma_size);
16838 +
16839 + if (likely(head != tail)) {
16840 + dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
16841 + pdc->dma_size, DMA_FROM_DEVICE);
16842 +
16843 /*
16844 - * End of break detected. If it came along
16845 - * with a character, atmel_rx_chars will
16846 - * handle it.
16847 + * head will only wrap around when we recycle
16848 + * the DMA buffer, and when that happens, we
16849 + * explicitly set tail to 0. So head will
16850 + * always be greater than tail.
16851 */
16852 - UART_PUT_CR(port, ATMEL_US_RSTSTA);
16853 - UART_PUT_IDR(port, ATMEL_US_RXBRK);
16854 - atmel_port->break_active = 0;
16855 + count = head - tail;
16856 +
16857 + tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
16858 +
16859 + dma_sync_single_for_device(port->dev, pdc->dma_addr,
16860 + pdc->dma_size, DMA_FROM_DEVICE);
16861 +
16862 + port->icount.rx += count;
16863 + pdc->ofs = head;
16864 + }
16865 +
16866 + /*
16867 + * If the current buffer is full, we need to check if
16868 + * the next one contains any additional data.
16869 + */
16870 + if (head >= pdc->dma_size) {
16871 + pdc->ofs = 0;
16872 + UART_PUT_RNPR(port, pdc->dma_addr);
16873 + UART_PUT_RNCR(port, pdc->dma_size);
16874 +
16875 + rx_idx = !rx_idx;
16876 + atmel_port->pdc_rx_idx = rx_idx;
16877 }
16878 + } while (head >= pdc->dma_size);
16879 +
16880 + /*
16881 + * Drop the lock here since it might end up calling
16882 + * uart_start(), which takes the lock.
16883 + */
16884 + spin_unlock(&port->lock);
16885 + tty_flip_buffer_push(tty);
16886 + spin_lock(&port->lock);
16887 +
16888 + UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
16889 +}
16890
16891 - // TODO: All reads to CSR will clear these interrupts!
16892 - if (pending & ATMEL_US_RIIC) port->icount.rng++;
16893 - if (pending & ATMEL_US_DSRIC) port->icount.dsr++;
16894 - if (pending & ATMEL_US_DCDIC)
16895 +/*
16896 + * tasklet handling tty stuff outside the interrupt handler.
16897 + */
16898 +static void atmel_tasklet_func(unsigned long data)
16899 +{
16900 + struct uart_port *port = (struct uart_port *)data;
16901 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16902 + unsigned int status;
16903 + unsigned int status_change;
16904 +
16905 + /* The interrupt handler does not take the lock */
16906 + spin_lock(&port->lock);
16907 +
16908 + if (atmel_use_dma_tx(port))
16909 + atmel_tx_dma(port);
16910 + else
16911 + atmel_tx_chars(port);
16912 +
16913 + status = atmel_port->irq_status;
16914 + status_change = status ^ atmel_port->irq_status_prev;
16915 +
16916 + if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
16917 + | ATMEL_US_DCD | ATMEL_US_CTS)) {
16918 + /* TODO: All reads to CSR will clear these interrupts! */
16919 + if (status_change & ATMEL_US_RI)
16920 + port->icount.rng++;
16921 + if (status_change & ATMEL_US_DSR)
16922 + port->icount.dsr++;
16923 + if (status_change & ATMEL_US_DCD)
16924 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
16925 - if (pending & ATMEL_US_CTSIC)
16926 + if (status_change & ATMEL_US_CTS)
16927 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
16928 - if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
16929 - wake_up_interruptible(&port->info->delta_msr_wait);
16930 -
16931 - /* Interrupt transmit */
16932 - if (pending & ATMEL_US_TXRDY)
16933 - atmel_tx_chars(port);
16934
16935 - if (pass_counter++ > ATMEL_ISR_PASS_LIMIT)
16936 - break;
16937 + wake_up_interruptible(&port->info->delta_msr_wait);
16938
16939 - status = UART_GET_CSR(port);
16940 - pending = status & UART_GET_IMR(port);
16941 + atmel_port->irq_status_prev = status;
16942 }
16943 - return IRQ_HANDLED;
16944 +
16945 + if (atmel_use_dma_rx(port))
16946 + atmel_rx_from_dma(port);
16947 + else
16948 + atmel_rx_from_ring(port);
16949 +
16950 + spin_unlock(&port->lock);
16951 }
16952
16953 /*
16954 @@ -403,6 +792,8 @@ static irqreturn_t atmel_interrupt(int i
16955 */
16956 static int atmel_startup(struct uart_port *port)
16957 {
16958 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16959 + struct tty_struct *tty = port->info->tty;
16960 int retval;
16961
16962 /*
16963 @@ -415,13 +806,64 @@ static int atmel_startup(struct uart_por
16964 /*
16965 * Allocate the IRQ
16966 */
16967 - retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port);
16968 + retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
16969 + tty ? tty->name : "atmel_serial", port);
16970 if (retval) {
16971 printk("atmel_serial: atmel_startup - Can't get irq\n");
16972 return retval;
16973 }
16974
16975 /*
16976 + * Initialize DMA (if necessary)
16977 + */
16978 + if (atmel_use_dma_rx(port)) {
16979 + int i;
16980 +
16981 + for (i = 0; i < 2; i++) {
16982 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
16983 +
16984 + pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
16985 + if (pdc->buf == NULL) {
16986 + if (i != 0) {
16987 + dma_unmap_single(port->dev,
16988 + atmel_port->pdc_rx[0].dma_addr,
16989 + PDC_BUFFER_SIZE,
16990 + DMA_FROM_DEVICE);
16991 + kfree(atmel_port->pdc_rx[0].buf);
16992 + }
16993 + free_irq(port->irq, port);
16994 + return -ENOMEM;
16995 + }
16996 + pdc->dma_addr = dma_map_single(port->dev,
16997 + pdc->buf,
16998 + PDC_BUFFER_SIZE,
16999 + DMA_FROM_DEVICE);
17000 + pdc->dma_size = PDC_BUFFER_SIZE;
17001 + pdc->ofs = 0;
17002 + }
17003 +
17004 + atmel_port->pdc_rx_idx = 0;
17005 +
17006 + UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
17007 + UART_PUT_RCR(port, PDC_BUFFER_SIZE);
17008 +
17009 + UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
17010 + UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
17011 + }
17012 + if (atmel_use_dma_tx(port)) {
17013 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
17014 + struct circ_buf *xmit = &port->info->xmit;
17015 +
17016 + pdc->buf = xmit->buf;
17017 + pdc->dma_addr = dma_map_single(port->dev,
17018 + pdc->buf,
17019 + UART_XMIT_SIZE,
17020 + DMA_TO_DEVICE);
17021 + pdc->dma_size = UART_XMIT_SIZE;
17022 + pdc->ofs = 0;
17023 + }
17024 +
17025 + /*
17026 * If there is a specific "open" function (to register
17027 * control line interrupts)
17028 */
17029 @@ -437,9 +879,21 @@ static int atmel_startup(struct uart_por
17030 * Finally, enable the serial port
17031 */
17032 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
17033 - UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */
17034 + /* enable xmit & rcvr */
17035 + UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
17036
17037 - UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */
17038 + if (atmel_use_dma_rx(port)) {
17039 + /* set UART timeout */
17040 + UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
17041 + UART_PUT_CR(port, ATMEL_US_STTTO);
17042 +
17043 + UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
17044 + /* enable PDC controller */
17045 + UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
17046 + } else {
17047 + /* enable receive only */
17048 + UART_PUT_IER(port, ATMEL_US_RXRDY);
17049 + }
17050
17051 return 0;
17052 }
17053 @@ -449,6 +903,38 @@ static int atmel_startup(struct uart_por
17054 */
17055 static void atmel_shutdown(struct uart_port *port)
17056 {
17057 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17058 + /*
17059 + * Ensure everything is stopped.
17060 + */
17061 + atmel_stop_rx(port);
17062 + atmel_stop_tx(port);
17063 +
17064 + /*
17065 + * Shut-down the DMA.
17066 + */
17067 + if (atmel_use_dma_rx(port)) {
17068 + int i;
17069 +
17070 + for (i = 0; i < 2; i++) {
17071 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
17072 +
17073 + dma_unmap_single(port->dev,
17074 + pdc->dma_addr,
17075 + pdc->dma_size,
17076 + DMA_FROM_DEVICE);
17077 + kfree(pdc->buf);
17078 + }
17079 + }
17080 + if (atmel_use_dma_tx(port)) {
17081 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
17082 +
17083 + dma_unmap_single(port->dev,
17084 + pdc->dma_addr,
17085 + pdc->dma_size,
17086 + DMA_TO_DEVICE);
17087 + }
17088 +
17089 /*
17090 * Disable all interrupts, port and break condition.
17091 */
17092 @@ -471,45 +957,48 @@ static void atmel_shutdown(struct uart_p
17093 /*
17094 * Power / Clock management.
17095 */
17096 -static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
17097 +static void atmel_serial_pm(struct uart_port *port, unsigned int state,
17098 + unsigned int oldstate)
17099 {
17100 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17101 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17102
17103 switch (state) {
17104 - case 0:
17105 - /*
17106 - * Enable the peripheral clock for this serial port.
17107 - * This is called on uart_open() or a resume event.
17108 - */
17109 - clk_enable(atmel_port->clk);
17110 - break;
17111 - case 3:
17112 - /*
17113 - * Disable the peripheral clock for this serial port.
17114 - * This is called on uart_close() or a suspend event.
17115 - */
17116 - clk_disable(atmel_port->clk);
17117 - break;
17118 - default:
17119 - printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
17120 + case 0:
17121 + /*
17122 + * Enable the peripheral clock for this serial port.
17123 + * This is called on uart_open() or a resume event.
17124 + */
17125 + clk_enable(atmel_port->clk);
17126 + break;
17127 + case 3:
17128 + /*
17129 + * Disable the peripheral clock for this serial port.
17130 + * This is called on uart_close() or a suspend event.
17131 + */
17132 + clk_disable(atmel_port->clk);
17133 + break;
17134 + default:
17135 + printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
17136 }
17137 }
17138
17139 /*
17140 * Change the port parameters
17141 */
17142 -static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
17143 +static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
17144 + struct ktermios *old)
17145 {
17146 unsigned long flags;
17147 unsigned int mode, imr, quot, baud;
17148
17149 /* Get current mode register */
17150 - mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
17151 + mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
17152 + | ATMEL_US_NBSTOP | ATMEL_US_PAR);
17153
17154 - baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
17155 + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
17156 quot = uart_get_divisor(port, baud);
17157
17158 - if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
17159 + if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
17160 quot /= 8;
17161 mode |= ATMEL_US_USCLKS_MCK_DIV8;
17162 }
17163 @@ -536,18 +1025,17 @@ static void atmel_set_termios(struct uar
17164
17165 /* parity */
17166 if (termios->c_cflag & PARENB) {
17167 - if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
17168 + /* Mark or Space parity */
17169 + if (termios->c_cflag & CMSPAR) {
17170 if (termios->c_cflag & PARODD)
17171 mode |= ATMEL_US_PAR_MARK;
17172 else
17173 mode |= ATMEL_US_PAR_SPACE;
17174 - }
17175 - else if (termios->c_cflag & PARODD)
17176 + } else if (termios->c_cflag & PARODD)
17177 mode |= ATMEL_US_PAR_ODD;
17178 else
17179 mode |= ATMEL_US_PAR_EVEN;
17180 - }
17181 - else
17182 + } else
17183 mode |= ATMEL_US_PAR_NONE;
17184
17185 spin_lock_irqsave(&port->lock, flags);
17186 @@ -558,6 +1046,10 @@ static void atmel_set_termios(struct uar
17187 if (termios->c_iflag & (BRKINT | PARMRK))
17188 port->read_status_mask |= ATMEL_US_RXBRK;
17189
17190 + if (atmel_use_dma_rx(port))
17191 + /* need to enable error interrupts */
17192 + UART_PUT_IER(port, port->read_status_mask);
17193 +
17194 /*
17195 * Characters to ignore
17196 */
17197 @@ -573,16 +1065,16 @@ static void atmel_set_termios(struct uar
17198 if (termios->c_iflag & IGNPAR)
17199 port->ignore_status_mask |= ATMEL_US_OVRE;
17200 }
17201 -
17202 - // TODO: Ignore all characters if CREAD is set.
17203 + /* TODO: Ignore all characters if CREAD is set.*/
17204
17205 /* update the per-port timeout */
17206 uart_update_timeout(port, termios->c_cflag, baud);
17207
17208 - /* disable interrupts and drain transmitter */
17209 - imr = UART_GET_IMR(port); /* get interrupt mask */
17210 - UART_PUT_IDR(port, -1); /* disable all interrupts */
17211 - while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); }
17212 + /* save/disable interrupts and drain transmitter */
17213 + imr = UART_GET_IMR(port);
17214 + UART_PUT_IDR(port, -1);
17215 + while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
17216 + cpu_relax();
17217
17218 /* disable receiver and transmitter */
17219 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
17220 @@ -708,7 +1200,8 @@ static struct uart_ops atmel_pops = {
17221 /*
17222 * Configure the port from the platform device resource info.
17223 */
17224 -static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev)
17225 +static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
17226 + struct platform_device *pdev)
17227 {
17228 struct uart_port *port = &atmel_port->uart;
17229 struct atmel_uart_data *data = pdev->dev.platform_data;
17230 @@ -723,6 +1216,11 @@ static void __devinit atmel_init_port(st
17231 port->mapbase = pdev->resource[0].start;
17232 port->irq = pdev->resource[1].start;
17233
17234 + tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
17235 + (unsigned long)port);
17236 +
17237 + memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
17238 +
17239 if (data->regs)
17240 /* Already mapped by setup code */
17241 port->membase = data->regs;
17242 @@ -731,11 +1229,17 @@ static void __devinit atmel_init_port(st
17243 port->membase = NULL;
17244 }
17245
17246 - if (!atmel_port->clk) { /* for console, the clock could already be configured */
17247 + /* for console, the clock could already be configured */
17248 + if (!atmel_port->clk) {
17249 atmel_port->clk = clk_get(&pdev->dev, "usart");
17250 clk_enable(atmel_port->clk);
17251 port->uartclk = clk_get_rate(atmel_port->clk);
17252 }
17253 +
17254 + atmel_port->use_dma_rx = data->use_dma_rx;
17255 + atmel_port->use_dma_tx = data->use_dma_tx;
17256 + if (atmel_use_dma_tx(port))
17257 + port->fifosize = PDC_BUFFER_SIZE;
17258 }
17259
17260 /*
17261 @@ -755,12 +1259,11 @@ void __init atmel_register_uart_fns(stru
17262 atmel_pops.set_wake = fns->set_wake;
17263 }
17264
17265 -
17266 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
17267 static void atmel_console_putchar(struct uart_port *port, int ch)
17268 {
17269 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
17270 - barrier();
17271 + cpu_relax();
17272 UART_PUT_CHAR(port, ch);
17273 }
17274
17275 @@ -773,38 +1276,40 @@ static void atmel_console_write(struct c
17276 unsigned int status, imr;
17277
17278 /*
17279 - * First, save IMR and then disable interrupts
17280 + * First, save IMR and then disable interrupts
17281 */
17282 - imr = UART_GET_IMR(port); /* get interrupt mask */
17283 + imr = UART_GET_IMR(port);
17284 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
17285
17286 uart_console_write(port, s, count, atmel_console_putchar);
17287
17288 /*
17289 - * Finally, wait for transmitter to become empty
17290 - * and restore IMR
17291 + * Finally, wait for transmitter to become empty
17292 + * and restore IMR
17293 */
17294 do {
17295 status = UART_GET_CSR(port);
17296 } while (!(status & ATMEL_US_TXRDY));
17297 - UART_PUT_IER(port, imr); /* set interrupts back the way they were */
17298 + /* set interrupts back the way they were */
17299 + UART_PUT_IER(port, imr);
17300 }
17301
17302 /*
17303 - * If the port was already initialised (eg, by a boot loader), try to determine
17304 - * the current setup.
17305 + * If the port was already initialised (eg, by a boot loader),
17306 + * try to determine the current setup.
17307 */
17308 -static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
17309 +static void __init atmel_console_get_options(struct uart_port *port, int *baud,
17310 + int *parity, int *bits)
17311 {
17312 unsigned int mr, quot;
17313
17314 -// TODO: CR is a write-only register
17315 -// unsigned int cr;
17316 -//
17317 -// cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN);
17318 -// if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) {
17319 -// /* ok, the port was enabled */
17320 -// }
17321 + /*
17322 + * If the baud rate generator isn't running, the port wasn't
17323 + * initialized by the boot loader.
17324 + */
17325 + quot = UART_GET_BRGR(port);
17326 + if (!quot)
17327 + return;
17328
17329 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
17330 if (mr == ATMEL_US_CHRL_8)
17331 @@ -824,7 +1329,6 @@ static void __init atmel_console_get_opt
17332 * lower than one of those, as it would make us fall through
17333 * to a much lower baud rate than we really want.
17334 */
17335 - quot = UART_GET_BRGR(port);
17336 *baud = port->uartclk / (16 * (quot - 1));
17337 }
17338
17339 @@ -836,10 +1340,12 @@ static int __init atmel_console_setup(st
17340 int parity = 'n';
17341 int flow = 'n';
17342
17343 - if (port->membase == 0) /* Port not initialized yet - delay setup */
17344 + if (port->membase == NULL) {
17345 + /* Port not initialized yet - delay setup */
17346 return -ENODEV;
17347 + }
17348
17349 - UART_PUT_IDR(port, -1); /* disable interrupts */
17350 + UART_PUT_IDR(port, -1);
17351 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
17352 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
17353
17354 @@ -871,13 +1377,16 @@ static struct console atmel_console = {
17355 static int __init atmel_console_init(void)
17356 {
17357 if (atmel_default_console_device) {
17358 - add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL);
17359 - atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device);
17360 + add_preferred_console(ATMEL_DEVICENAME,
17361 + atmel_default_console_device->id, NULL);
17362 + atmel_init_port(&atmel_ports[atmel_default_console_device->id],
17363 + atmel_default_console_device);
17364 register_console(&atmel_console);
17365 }
17366
17367 return 0;
17368 }
17369 +
17370 console_initcall(atmel_console_init);
17371
17372 /*
17373 @@ -885,34 +1394,48 @@ console_initcall(atmel_console_init);
17374 */
17375 static int __init atmel_late_console_init(void)
17376 {
17377 - if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED))
17378 + if (atmel_default_console_device
17379 + && !(atmel_console.flags & CON_ENABLED))
17380 register_console(&atmel_console);
17381
17382 return 0;
17383 }
17384 +
17385 core_initcall(atmel_late_console_init);
17386
17387 +static inline bool atmel_is_console_port(struct uart_port *port)
17388 +{
17389 + return port->cons && port->cons->index == port->line;
17390 +}
17391 +
17392 #else
17393 #define ATMEL_CONSOLE_DEVICE NULL
17394 +
17395 +static inline bool atmel_is_console_port(struct uart_port *port)
17396 +{
17397 + return false;
17398 +}
17399 #endif
17400
17401 static struct uart_driver atmel_uart = {
17402 - .owner = THIS_MODULE,
17403 - .driver_name = "atmel_serial",
17404 - .dev_name = ATMEL_DEVICENAME,
17405 - .major = SERIAL_ATMEL_MAJOR,
17406 - .minor = MINOR_START,
17407 - .nr = ATMEL_MAX_UART,
17408 - .cons = ATMEL_CONSOLE_DEVICE,
17409 + .owner = THIS_MODULE,
17410 + .driver_name = "atmel_serial",
17411 + .dev_name = ATMEL_DEVICENAME,
17412 + .major = SERIAL_ATMEL_MAJOR,
17413 + .minor = MINOR_START,
17414 + .nr = ATMEL_MAX_UART,
17415 + .cons = ATMEL_CONSOLE_DEVICE,
17416 };
17417
17418 #ifdef CONFIG_PM
17419 -static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state)
17420 +static int atmel_serial_suspend(struct platform_device *pdev,
17421 + pm_message_t state)
17422 {
17423 struct uart_port *port = platform_get_drvdata(pdev);
17424 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17425 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17426
17427 - if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
17428 + if (device_may_wakeup(&pdev->dev)
17429 + && !at91_suspend_entering_slow_clock())
17430 enable_irq_wake(port->irq);
17431 else {
17432 uart_suspend_port(&atmel_uart, port);
17433 @@ -925,13 +1448,12 @@ static int atmel_serial_suspend(struct p
17434 static int atmel_serial_resume(struct platform_device *pdev)
17435 {
17436 struct uart_port *port = platform_get_drvdata(pdev);
17437 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17438 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17439
17440 if (atmel_port->suspended) {
17441 uart_resume_port(&atmel_uart, port);
17442 atmel_port->suspended = 0;
17443 - }
17444 - else
17445 + } else
17446 disable_irq_wake(port->irq);
17447
17448 return 0;
17449 @@ -944,15 +1466,40 @@ static int atmel_serial_resume(struct pl
17450 static int __devinit atmel_serial_probe(struct platform_device *pdev)
17451 {
17452 struct atmel_uart_port *port;
17453 + void *data;
17454 int ret;
17455
17456 + BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
17457 +
17458 port = &atmel_ports[pdev->id];
17459 atmel_init_port(port, pdev);
17460
17461 + if (!atmel_use_dma_rx(&port->uart)) {
17462 + ret = -ENOMEM;
17463 + data = kmalloc(sizeof(struct atmel_uart_char)
17464 + * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
17465 + if (!data)
17466 + goto err_alloc_ring;
17467 + port->rx_ring.buf = data;
17468 + }
17469 +
17470 ret = uart_add_one_port(&atmel_uart, &port->uart);
17471 - if (!ret) {
17472 - device_init_wakeup(&pdev->dev, 1);
17473 - platform_set_drvdata(pdev, port);
17474 + if (ret)
17475 + goto err_add_port;
17476 +
17477 + device_init_wakeup(&pdev->dev, 1);
17478 + platform_set_drvdata(pdev, port);
17479 +
17480 + return 0;
17481 +
17482 +err_add_port:
17483 + kfree(port->rx_ring.buf);
17484 + port->rx_ring.buf = NULL;
17485 +err_alloc_ring:
17486 + if (!atmel_is_console_port(&port->uart)) {
17487 + clk_disable(port->clk);
17488 + clk_put(port->clk);
17489 + port->clk = NULL;
17490 }
17491
17492 return ret;
17493 @@ -961,19 +1508,21 @@ static int __devinit atmel_serial_probe(
17494 static int __devexit atmel_serial_remove(struct platform_device *pdev)
17495 {
17496 struct uart_port *port = platform_get_drvdata(pdev);
17497 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17498 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17499 int ret = 0;
17500
17501 - clk_disable(atmel_port->clk);
17502 - clk_put(atmel_port->clk);
17503 -
17504 device_init_wakeup(&pdev->dev, 0);
17505 platform_set_drvdata(pdev, NULL);
17506
17507 - if (port) {
17508 - ret = uart_remove_one_port(&atmel_uart, port);
17509 - kfree(port);
17510 - }
17511 + ret = uart_remove_one_port(&atmel_uart, port);
17512 +
17513 + tasklet_kill(&atmel_port->tasklet);
17514 + kfree(atmel_port->rx_ring.buf);
17515 +
17516 + /* "port" is allocated statically, so we shouldn't free it */
17517 +
17518 + clk_disable(atmel_port->clk);
17519 + clk_put(atmel_port->clk);
17520
17521 return ret;
17522 }
17523 Index: linux-2.6.24.7/drivers/serial/atmel_serial.h
17524 ===================================================================
17525 --- linux-2.6.24.7.orig/drivers/serial/atmel_serial.h
17526 +++ /dev/null
17527 @@ -1,127 +0,0 @@
17528 -/*
17529 - * drivers/serial/atmel_serial.h
17530 - *
17531 - * Copyright (C) 2005 Ivan Kokshaysky
17532 - * Copyright (C) SAN People
17533 - *
17534 - * USART registers.
17535 - * Based on AT91RM9200 datasheet revision E.
17536 - *
17537 - * This program is free software; you can redistribute it and/or modify
17538 - * it under the terms of the GNU General Public License as published by
17539 - * the Free Software Foundation; either version 2 of the License, or
17540 - * (at your option) any later version.
17541 - */
17542 -
17543 -#ifndef ATMEL_SERIAL_H
17544 -#define ATMEL_SERIAL_H
17545 -
17546 -#define ATMEL_US_CR 0x00 /* Control Register */
17547 -#define ATMEL_US_RSTRX (1 << 2) /* Reset Receiver */
17548 -#define ATMEL_US_RSTTX (1 << 3) /* Reset Transmitter */
17549 -#define ATMEL_US_RXEN (1 << 4) /* Receiver Enable */
17550 -#define ATMEL_US_RXDIS (1 << 5) /* Receiver Disable */
17551 -#define ATMEL_US_TXEN (1 << 6) /* Transmitter Enable */
17552 -#define ATMEL_US_TXDIS (1 << 7) /* Transmitter Disable */
17553 -#define ATMEL_US_RSTSTA (1 << 8) /* Reset Status Bits */
17554 -#define ATMEL_US_STTBRK (1 << 9) /* Start Break */
17555 -#define ATMEL_US_STPBRK (1 << 10) /* Stop Break */
17556 -#define ATMEL_US_STTTO (1 << 11) /* Start Time-out */
17557 -#define ATMEL_US_SENDA (1 << 12) /* Send Address */
17558 -#define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */
17559 -#define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */
17560 -#define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */
17561 -#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */
17562 -#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */
17563 -#define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */
17564 -#define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */
17565 -
17566 -#define ATMEL_US_MR 0x04 /* Mode Register */
17567 -#define ATMEL_US_USMODE (0xf << 0) /* Mode of the USART */
17568 -#define ATMEL_US_USMODE_NORMAL 0
17569 -#define ATMEL_US_USMODE_RS485 1
17570 -#define ATMEL_US_USMODE_HWHS 2
17571 -#define ATMEL_US_USMODE_MODEM 3
17572 -#define ATMEL_US_USMODE_ISO7816_T0 4
17573 -#define ATMEL_US_USMODE_ISO7816_T1 6
17574 -#define ATMEL_US_USMODE_IRDA 8
17575 -#define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
17576 -#define ATMEL_US_USCLKS_MCK (0 << 4)
17577 -#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
17578 -#define ATMEL_US_USCLKS_SCK (3 << 4)
17579 -#define ATMEL_US_CHRL (3 << 6) /* Character Length */
17580 -#define ATMEL_US_CHRL_5 (0 << 6)
17581 -#define ATMEL_US_CHRL_6 (1 << 6)
17582 -#define ATMEL_US_CHRL_7 (2 << 6)
17583 -#define ATMEL_US_CHRL_8 (3 << 6)
17584 -#define ATMEL_US_SYNC (1 << 8) /* Synchronous Mode Select */
17585 -#define ATMEL_US_PAR (7 << 9) /* Parity Type */
17586 -#define ATMEL_US_PAR_EVEN (0 << 9)
17587 -#define ATMEL_US_PAR_ODD (1 << 9)
17588 -#define ATMEL_US_PAR_SPACE (2 << 9)
17589 -#define ATMEL_US_PAR_MARK (3 << 9)
17590 -#define ATMEL_US_PAR_NONE (4 << 9)
17591 -#define ATMEL_US_PAR_MULTI_DROP (6 << 9)
17592 -#define ATMEL_US_NBSTOP (3 << 12) /* Number of Stop Bits */
17593 -#define ATMEL_US_NBSTOP_1 (0 << 12)
17594 -#define ATMEL_US_NBSTOP_1_5 (1 << 12)
17595 -#define ATMEL_US_NBSTOP_2 (2 << 12)
17596 -#define ATMEL_US_CHMODE (3 << 14) /* Channel Mode */
17597 -#define ATMEL_US_CHMODE_NORMAL (0 << 14)
17598 -#define ATMEL_US_CHMODE_ECHO (1 << 14)
17599 -#define ATMEL_US_CHMODE_LOC_LOOP (2 << 14)
17600 -#define ATMEL_US_CHMODE_REM_LOOP (3 << 14)
17601 -#define ATMEL_US_MSBF (1 << 16) /* Bit Order */
17602 -#define ATMEL_US_MODE9 (1 << 17) /* 9-bit Character Length */
17603 -#define ATMEL_US_CLKO (1 << 18) /* Clock Output Select */
17604 -#define ATMEL_US_OVER (1 << 19) /* Oversampling Mode */
17605 -#define ATMEL_US_INACK (1 << 20) /* Inhibit Non Acknowledge */
17606 -#define ATMEL_US_DSNACK (1 << 21) /* Disable Successive NACK */
17607 -#define ATMEL_US_MAX_ITER (7 << 24) /* Max Iterations */
17608 -#define ATMEL_US_FILTER (1 << 28) /* Infrared Receive Line Filter */
17609 -
17610 -#define ATMEL_US_IER 0x08 /* Interrupt Enable Register */
17611 -#define ATMEL_US_RXRDY (1 << 0) /* Receiver Ready */
17612 -#define ATMEL_US_TXRDY (1 << 1) /* Transmitter Ready */
17613 -#define ATMEL_US_RXBRK (1 << 2) /* Break Received / End of Break */
17614 -#define ATMEL_US_ENDRX (1 << 3) /* End of Receiver Transfer */
17615 -#define ATMEL_US_ENDTX (1 << 4) /* End of Transmitter Transfer */
17616 -#define ATMEL_US_OVRE (1 << 5) /* Overrun Error */
17617 -#define ATMEL_US_FRAME (1 << 6) /* Framing Error */
17618 -#define ATMEL_US_PARE (1 << 7) /* Parity Error */
17619 -#define ATMEL_US_TIMEOUT (1 << 8) /* Receiver Time-out */
17620 -#define ATMEL_US_TXEMPTY (1 << 9) /* Transmitter Empty */
17621 -#define ATMEL_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */
17622 -#define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */
17623 -#define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */
17624 -#define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */
17625 -#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */
17626 -#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */
17627 -#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */
17628 -#define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */
17629 -#define ATMEL_US_RI (1 << 20) /* RI */
17630 -#define ATMEL_US_DSR (1 << 21) /* DSR */
17631 -#define ATMEL_US_DCD (1 << 22) /* DCD */
17632 -#define ATMEL_US_CTS (1 << 23) /* CTS */
17633 -
17634 -#define ATMEL_US_IDR 0x0c /* Interrupt Disable Register */
17635 -#define ATMEL_US_IMR 0x10 /* Interrupt Mask Register */
17636 -#define ATMEL_US_CSR 0x14 /* Channel Status Register */
17637 -#define ATMEL_US_RHR 0x18 /* Receiver Holding Register */
17638 -#define ATMEL_US_THR 0x1c /* Transmitter Holding Register */
17639 -#define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */
17640 -
17641 -#define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */
17642 -#define ATMEL_US_CD (0xffff << 0) /* Clock Divider */
17643 -
17644 -#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */
17645 -#define ATMEL_US_TO (0xffff << 0) /* Time-out Value */
17646 -
17647 -#define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */
17648 -#define ATMEL_US_TG (0xff << 0) /* Timeguard Value */
17649 -
17650 -#define ATMEL_US_FIDI 0x40 /* FI DI Ratio Register */
17651 -#define ATMEL_US_NER 0x44 /* Number of Errors Register */
17652 -#define ATMEL_US_IF 0x4c /* IrDA Filter Register */
17653 -
17654 -#endif
17655 Index: linux-2.6.24.7/drivers/serial/Kconfig
17656 ===================================================================
17657 --- linux-2.6.24.7.orig/drivers/serial/Kconfig
17658 +++ linux-2.6.24.7/drivers/serial/Kconfig
17659 @@ -380,6 +380,21 @@ config SERIAL_ATMEL_CONSOLE
17660 console is the device which receives all kernel messages and
17661 warnings and which allows logins in single user mode).
17662
17663 +config SERIAL_ATMEL_PDC
17664 + bool "Support DMA transfers on AT91 / AT32 serial port"
17665 + depends on SERIAL_ATMEL
17666 + default y
17667 + help
17668 + Say Y here if you wish to use the PDC to do DMA transfers to
17669 + and from the Atmel AT91 / AT32 serial port. In order to
17670 + actually use DMA transfers, make sure that the use_dma_tx
17671 + and use_dma_rx members in the atmel_uart_data struct is set
17672 + appropriately for each port.
17673 +
17674 + Note that break and error handling currently doesn't work
17675 + properly when DMA is enabled. Make sure that ports where
17676 + this matters don't use DMA.
17677 +
17678 config SERIAL_ATMEL_TTYAT
17679 bool "Install as device ttyATn instead of ttySn"
17680 depends on SERIAL_ATMEL=y
17681 Index: linux-2.6.24.7/drivers/spi/atmel_spi.c
17682 ===================================================================
17683 --- linux-2.6.24.7.orig/drivers/spi/atmel_spi.c
17684 +++ linux-2.6.24.7/drivers/spi/atmel_spi.c
17685 @@ -51,7 +51,9 @@ struct atmel_spi {
17686 u8 stopping;
17687 struct list_head queue;
17688 struct spi_transfer *current_transfer;
17689 - unsigned long remaining_bytes;
17690 + unsigned long current_remaining_bytes;
17691 + struct spi_transfer *next_transfer;
17692 + unsigned long next_remaining_bytes;
17693
17694 void *buffer;
17695 dma_addr_t buffer_dma;
17696 @@ -113,6 +115,16 @@ static void cs_deactivate(struct atmel_s
17697 unsigned gpio = (unsigned) spi->controller_data;
17698 unsigned active = spi->mode & SPI_CS_HIGH;
17699 u32 mr;
17700 + int i;
17701 + u32 csr;
17702 + u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0;
17703 +
17704 + /* Make sure clock polarity is correct */
17705 + for (i = 0; i < spi->master->num_chipselect; i++) {
17706 + csr = spi_readl(as, CSR0 + 4 * i);
17707 + if ((csr ^ cpol) & SPI_BIT(CPOL))
17708 + spi_writel(as, CSR0 + 4 * i, csr ^ SPI_BIT(CPOL));
17709 + }
17710
17711 /* only deactivate *this* device; sometimes transfers to
17712 * another device may be active when this routine is called.
17713 @@ -131,6 +143,48 @@ static void cs_deactivate(struct atmel_s
17714 gpio_set_value(gpio, !active);
17715 }
17716
17717 +static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
17718 + struct spi_transfer *xfer)
17719 +{
17720 + return msg->transfers.prev == &xfer->transfer_list;
17721 +}
17722 +
17723 +static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
17724 +{
17725 + return xfer->delay_usecs == 0 && !xfer->cs_change;
17726 +}
17727 +
17728 +static void atmel_spi_next_xfer_data(struct spi_master *master,
17729 + struct spi_transfer *xfer,
17730 + dma_addr_t *tx_dma,
17731 + dma_addr_t *rx_dma,
17732 + u32 *plen)
17733 +{
17734 + struct atmel_spi *as = spi_master_get_devdata(master);
17735 + u32 len = *plen;
17736 +
17737 + /* use scratch buffer only when rx or tx data is unspecified */
17738 + if (xfer->rx_buf)
17739 + *rx_dma = xfer->rx_dma + xfer->len - len;
17740 + else {
17741 + *rx_dma = as->buffer_dma;
17742 + if (len > BUFFER_SIZE)
17743 + len = BUFFER_SIZE;
17744 + }
17745 + if (xfer->tx_buf)
17746 + *tx_dma = xfer->tx_dma + xfer->len - len;
17747 + else {
17748 + *tx_dma = as->buffer_dma;
17749 + if (len > BUFFER_SIZE)
17750 + len = BUFFER_SIZE;
17751 + memset(as->buffer, 0, len);
17752 + dma_sync_single_for_device(&as->pdev->dev,
17753 + as->buffer_dma, len, DMA_TO_DEVICE);
17754 + }
17755 +
17756 + *plen = len;
17757 +}
17758 +
17759 /*
17760 * Submit next transfer for DMA.
17761 * lock is held, spi irq is blocked
17762 @@ -140,53 +194,78 @@ static void atmel_spi_next_xfer(struct s
17763 {
17764 struct atmel_spi *as = spi_master_get_devdata(master);
17765 struct spi_transfer *xfer;
17766 - u32 len;
17767 + u32 len, remaining, total;
17768 dma_addr_t tx_dma, rx_dma;
17769
17770 - xfer = as->current_transfer;
17771 - if (!xfer || as->remaining_bytes == 0) {
17772 - if (xfer)
17773 - xfer = list_entry(xfer->transfer_list.next,
17774 - struct spi_transfer, transfer_list);
17775 - else
17776 - xfer = list_entry(msg->transfers.next,
17777 - struct spi_transfer, transfer_list);
17778 - as->remaining_bytes = xfer->len;
17779 - as->current_transfer = xfer;
17780 + if (!as->current_transfer)
17781 + xfer = list_entry(msg->transfers.next,
17782 + struct spi_transfer, transfer_list);
17783 + else if (!as->next_transfer)
17784 + xfer = list_entry(as->current_transfer->transfer_list.next,
17785 + struct spi_transfer, transfer_list);
17786 + else
17787 + xfer = NULL;
17788 +
17789 + if (xfer) {
17790 + len = xfer->len;
17791 + atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
17792 + remaining = xfer->len - len;
17793 +
17794 + spi_writel(as, RPR, rx_dma);
17795 + spi_writel(as, TPR, tx_dma);
17796 +
17797 + if (msg->spi->bits_per_word > 8)
17798 + len >>= 1;
17799 + spi_writel(as, RCR, len);
17800 + spi_writel(as, TCR, len);
17801 +
17802 + dev_dbg(&msg->spi->dev,
17803 + " start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
17804 + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
17805 + xfer->rx_buf, xfer->rx_dma);
17806 + } else {
17807 + xfer = as->next_transfer;
17808 + remaining = as->next_remaining_bytes;
17809 }
17810
17811 - len = as->remaining_bytes;
17812 + as->current_transfer = xfer;
17813 + as->current_remaining_bytes = remaining;
17814
17815 - tx_dma = xfer->tx_dma + xfer->len - len;
17816 - rx_dma = xfer->rx_dma + xfer->len - len;
17817 + if (remaining > 0)
17818 + len = remaining;
17819 + else if (!atmel_spi_xfer_is_last(msg, xfer)
17820 + && atmel_spi_xfer_can_be_chained(xfer)) {
17821 + xfer = list_entry(xfer->transfer_list.next,
17822 + struct spi_transfer, transfer_list);
17823 + len = xfer->len;
17824 + } else
17825 + xfer = NULL;
17826
17827 - /* use scratch buffer only when rx or tx data is unspecified */
17828 - if (!xfer->rx_buf) {
17829 - rx_dma = as->buffer_dma;
17830 - if (len > BUFFER_SIZE)
17831 - len = BUFFER_SIZE;
17832 - }
17833 - if (!xfer->tx_buf) {
17834 - tx_dma = as->buffer_dma;
17835 - if (len > BUFFER_SIZE)
17836 - len = BUFFER_SIZE;
17837 - memset(as->buffer, 0, len);
17838 - dma_sync_single_for_device(&as->pdev->dev,
17839 - as->buffer_dma, len, DMA_TO_DEVICE);
17840 - }
17841 + as->next_transfer = xfer;
17842
17843 - spi_writel(as, RPR, rx_dma);
17844 - spi_writel(as, TPR, tx_dma);
17845 + if (xfer) {
17846 + total = len;
17847 + atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
17848 + as->next_remaining_bytes = total - len;
17849 +
17850 + spi_writel(as, RNPR, rx_dma);
17851 + spi_writel(as, TNPR, tx_dma);
17852 +
17853 + if (msg->spi->bits_per_word > 8)
17854 + len >>= 1;
17855 + spi_writel(as, RNCR, len);
17856 + spi_writel(as, TNCR, len);
17857 +
17858 + dev_dbg(&msg->spi->dev,
17859 + " next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
17860 + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
17861 + xfer->rx_buf, xfer->rx_dma);
17862 + } else {
17863 + spi_writel(as, RNCR, 0);
17864 + spi_writel(as, TNCR, 0);
17865 + }
17866
17867 - as->remaining_bytes -= len;
17868 - if (msg->spi->bits_per_word > 8)
17869 - len >>= 1;
17870 -
17871 - /* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer"
17872 - * mechanism might help avoid the IRQ latency between transfers
17873 - * (and improve the nCS0 errata handling on at91rm9200 chips)
17874 - *
17875 - * We're also waiting for ENDRX before we start the next
17876 + /* REVISIT: We're waiting for ENDRX before we start the next
17877 * transfer because we need to handle some difficult timing
17878 * issues otherwise. If we wait for ENDTX in one transfer and
17879 * then starts waiting for ENDRX in the next, it's difficult
17880 @@ -196,17 +275,7 @@ static void atmel_spi_next_xfer(struct s
17881 *
17882 * It should be doable, though. Just not now...
17883 */
17884 - spi_writel(as, TNCR, 0);
17885 - spi_writel(as, RNCR, 0);
17886 spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
17887 -
17888 - dev_dbg(&msg->spi->dev,
17889 - " start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n",
17890 - xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
17891 - xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
17892 -
17893 - spi_writel(as, RCR, len);
17894 - spi_writel(as, TCR, len);
17895 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
17896 }
17897
17898 @@ -304,6 +373,7 @@ atmel_spi_msg_done(struct spi_master *ma
17899 spin_lock(&as->lock);
17900
17901 as->current_transfer = NULL;
17902 + as->next_transfer = NULL;
17903
17904 /* continue if needed */
17905 if (list_empty(&as->queue) || as->stopping)
17906 @@ -387,7 +457,7 @@ atmel_spi_interrupt(int irq, void *dev_i
17907
17908 spi_writel(as, IDR, pending);
17909
17910 - if (as->remaining_bytes == 0) {
17911 + if (as->current_remaining_bytes == 0) {
17912 msg->actual_length += xfer->len;
17913
17914 if (!msg->is_dma_mapped)
17915 @@ -397,7 +467,7 @@ atmel_spi_interrupt(int irq, void *dev_i
17916 if (xfer->delay_usecs)
17917 udelay(xfer->delay_usecs);
17918
17919 - if (msg->transfers.prev == &xfer->transfer_list) {
17920 + if (atmel_spi_xfer_is_last(msg, xfer)) {
17921 /* report completed message */
17922 atmel_spi_msg_done(master, as, msg, 0,
17923 xfer->cs_change);
17924 @@ -500,9 +570,14 @@ static int atmel_spi_setup(struct spi_de
17925 if (!(spi->mode & SPI_CPHA))
17926 csr |= SPI_BIT(NCPHA);
17927
17928 - /* TODO: DLYBS and DLYBCT */
17929 - csr |= SPI_BF(DLYBS, 10);
17930 - csr |= SPI_BF(DLYBCT, 10);
17931 + /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
17932 + *
17933 + * DLYBCT would add delays between words, slowing down transfers.
17934 + * It could potentially be useful to cope with DMA bottlenecks, but
17935 + * in those cases it's probably best to just use a lower bitrate.
17936 + */
17937 + csr |= SPI_BF(DLYBS, 0);
17938 + csr |= SPI_BF(DLYBCT, 0);
17939
17940 /* chipselect must have been muxed as GPIO (e.g. in board setup) */
17941 npcs_pin = (unsigned int)spi->controller_data;
17942 Index: linux-2.6.24.7/drivers/usb/gadget/atmel_usba_udc.c
17943 ===================================================================
17944 --- linux-2.6.24.7.orig/drivers/usb/gadget/atmel_usba_udc.c
17945 +++ linux-2.6.24.7/drivers/usb/gadget/atmel_usba_udc.c
17946 @@ -18,6 +18,7 @@
17947 #include <linux/platform_device.h>
17948 #include <linux/usb/ch9.h>
17949 #include <linux/usb/gadget.h>
17950 +#include <linux/usb/atmel_usba_udc.h>
17951 #include <linux/delay.h>
17952
17953 #include <asm/gpio.h>
17954 @@ -27,6 +28,7 @@
17955
17956
17957 static struct usba_udc the_udc;
17958 +static struct usba_ep *usba_ep;
17959
17960 #ifdef CONFIG_USB_GADGET_DEBUG_FS
17961 #include <linux/debugfs.h>
17962 @@ -324,53 +326,6 @@ static int vbus_is_present(struct usba_u
17963 return 1;
17964 }
17965
17966 -static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
17967 -{
17968 - unsigned long tmp;
17969 -
17970 - DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
17971 - for (; len > 0; len -= 4, buf += 4, fifo += 4) {
17972 - tmp = *(unsigned long *)buf;
17973 - if (len >= 4) {
17974 - DBG(DBG_FIFO, " -> %08lx\n", tmp);
17975 - __raw_writel(tmp, fifo);
17976 - } else {
17977 - do {
17978 - DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24);
17979 - __raw_writeb(tmp >> 24, fifo);
17980 - fifo++;
17981 - tmp <<= 8;
17982 - } while (--len);
17983 - break;
17984 - }
17985 - }
17986 -}
17987 -
17988 -static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
17989 -{
17990 - union {
17991 - unsigned long *w;
17992 - unsigned char *b;
17993 - } p;
17994 - unsigned long tmp;
17995 -
17996 - DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
17997 - for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
17998 - if (len >= 4) {
17999 - tmp = __raw_readl(fifo);
18000 - *p.w = tmp;
18001 - DBG(DBG_FIFO, " -> %08lx\n", tmp);
18002 - } else {
18003 - do {
18004 - tmp = __raw_readb(fifo);
18005 - *p.b = tmp;
18006 - DBG(DBG_FIFO, " -> %02lx\n", tmp);
18007 - fifo++, p.b++;
18008 - } while (--len);
18009 - }
18010 - }
18011 -}
18012 -
18013 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
18014 {
18015 unsigned int transaction_len;
18016 @@ -387,7 +342,7 @@ static void next_fifo_transaction(struct
18017 ep->ep.name, req, transaction_len,
18018 req->last_transaction ? ", done" : "");
18019
18020 - copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
18021 + memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
18022 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
18023 req->req.actual += transaction_len;
18024 }
18025 @@ -476,7 +431,7 @@ static void receive_data(struct usba_ep
18026 bytecount = req->req.length - req->req.actual;
18027 }
18028
18029 - copy_from_fifo(req->req.buf + req->req.actual,
18030 + memcpy_fromio(req->req.buf + req->req.actual,
18031 ep->fifo, bytecount);
18032 req->req.actual += bytecount;
18033
18034 @@ -1029,33 +984,6 @@ static const struct usb_gadget_ops usba_
18035 .set_selfpowered = usba_udc_set_selfpowered,
18036 };
18037
18038 -#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
18039 -{ \
18040 - .ep = { \
18041 - .ops = &usba_ep_ops, \
18042 - .name = nam, \
18043 - .maxpacket = maxpkt, \
18044 - }, \
18045 - .udc = &the_udc, \
18046 - .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \
18047 - .fifo_size = maxpkt, \
18048 - .nr_banks = maxbk, \
18049 - .index = idx, \
18050 - .can_dma = dma, \
18051 - .can_isoc = isoc, \
18052 -}
18053 -
18054 -static struct usba_ep usba_ep[] = {
18055 - EP("ep0", 0, 64, 1, 0, 0),
18056 - EP("ep1in-bulk", 1, 512, 2, 1, 1),
18057 - EP("ep2out-bulk", 2, 512, 2, 1, 1),
18058 - EP("ep3in-int", 3, 64, 3, 1, 0),
18059 - EP("ep4out-int", 4, 64, 3, 1, 0),
18060 - EP("ep5in-iso", 5, 1024, 3, 1, 1),
18061 - EP("ep6out-iso", 6, 1024, 3, 1, 1),
18062 -};
18063 -#undef EP
18064 -
18065 static struct usb_endpoint_descriptor usba_ep0_desc = {
18066 .bLength = USB_DT_ENDPOINT_SIZE,
18067 .bDescriptorType = USB_DT_ENDPOINT,
18068 @@ -1074,7 +1002,6 @@ static void nop_release(struct device *d
18069 static struct usba_udc the_udc = {
18070 .gadget = {
18071 .ops = &usba_udc_ops,
18072 - .ep0 = &usba_ep[0].ep,
18073 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
18074 .is_dualspeed = 1,
18075 .name = "atmel_usba_udc",
18076 @@ -1231,7 +1158,7 @@ static int do_test_mode(struct usba_udc
18077 } else {
18078 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
18079 usba_writel(udc, TST, USBA_TST_PKT_MODE);
18080 - copy_to_fifo(ep->fifo, test_packet_buffer,
18081 + memcpy_toio(ep->fifo, test_packet_buffer,
18082 sizeof(test_packet_buffer));
18083 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
18084 dev_info(dev, "Entering Test_Packet mode...\n");
18085 @@ -1539,7 +1466,7 @@ restart:
18086 }
18087
18088 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
18089 - copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
18090 + memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
18091
18092 /* Free up one bank in the FIFO so that we can
18093 * generate or receive a reply right away. */
18094 @@ -1911,7 +1838,7 @@ static int __init usba_udc_probe(struct
18095
18096 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
18097 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
18098 - if (!regs || !fifo)
18099 + if (!regs || !fifo || !pdata)
18100 return -ENXIO;
18101
18102 irq = platform_get_irq(pdev, 0);
18103 @@ -1959,16 +1886,44 @@ static int __init usba_udc_probe(struct
18104 usba_writel(udc, CTRL, 0);
18105 clk_disable(pclk);
18106
18107 + usba_ep = kmalloc(sizeof(struct usba_ep) * pdata->num_ep,
18108 + GFP_KERNEL);
18109 + if (!usba_ep)
18110 + goto err_alloc_ep;
18111 +
18112 + the_udc.gadget.ep0 = &usba_ep[0].ep;
18113 +
18114 INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
18115 usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
18116 usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
18117 usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
18118 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
18119 + usba_ep[0].ep.ops = &usba_ep_ops;
18120 + usba_ep[0].ep.name = pdata->ep[0].name;
18121 + usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size;
18122 + usba_ep[0].udc = &the_udc;
18123 + INIT_LIST_HEAD(&usba_ep[0].queue);
18124 + usba_ep[0].fifo_size = pdata->ep[0].fifo_size;
18125 + usba_ep[0].nr_banks = pdata->ep[0].nr_banks;
18126 + usba_ep[0].index = pdata->ep[0].index;
18127 + usba_ep[0].can_dma = pdata->ep[0].can_dma;
18128 + usba_ep[0].can_isoc = pdata->ep[0].can_isoc;
18129 +
18130 + for (i = 1; i < pdata->num_ep; i++) {
18131 struct usba_ep *ep = &usba_ep[i];
18132
18133 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
18134 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
18135 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
18136 + ep->ep.ops = &usba_ep_ops;
18137 + ep->ep.name = pdata->ep[i].name;
18138 + ep->ep.maxpacket = pdata->ep[i].fifo_size;
18139 + ep->udc = &the_udc;
18140 + INIT_LIST_HEAD(&ep->queue);
18141 + ep->fifo_size = pdata->ep[i].fifo_size;
18142 + ep->nr_banks = pdata->ep[i].nr_banks;
18143 + ep->index = pdata->ep[i].index;
18144 + ep->can_dma = pdata->ep[i].can_dma;
18145 + ep->can_isoc = pdata->ep[i].can_isoc;
18146
18147 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
18148 }
18149 @@ -1987,7 +1942,7 @@ static int __init usba_udc_probe(struct
18150 goto err_device_add;
18151 }
18152
18153 - if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) {
18154 + if (pdata->vbus_pin >= 0) {
18155 if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
18156 udc->vbus_pin = pdata->vbus_pin;
18157
18158 @@ -2007,7 +1962,7 @@ static int __init usba_udc_probe(struct
18159 }
18160
18161 usba_init_debugfs(udc);
18162 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
18163 + for (i = 1; i < pdata->num_ep; i++)
18164 usba_ep_init_debugfs(udc, &usba_ep[i]);
18165
18166 return 0;
18167 @@ -2015,6 +1970,8 @@ static int __init usba_udc_probe(struct
18168 err_device_add:
18169 free_irq(irq, udc);
18170 err_request_irq:
18171 + kfree(usba_ep);
18172 +err_alloc_ep:
18173 iounmap(udc->fifo);
18174 err_map_fifo:
18175 iounmap(udc->regs);
18176 @@ -2032,10 +1989,11 @@ static int __exit usba_udc_remove(struct
18177 {
18178 struct usba_udc *udc;
18179 int i;
18180 + struct usba_platform_data *pdata = pdev->dev.platform_data;
18181
18182 udc = platform_get_drvdata(pdev);
18183
18184 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
18185 + for (i = 1; i < pdata->num_ep; i++)
18186 usba_ep_cleanup_debugfs(&usba_ep[i]);
18187 usba_cleanup_debugfs(udc);
18188
18189 Index: linux-2.6.24.7/drivers/video/atmel_lcdfb.c
18190 ===================================================================
18191 --- linux-2.6.24.7.orig/drivers/video/atmel_lcdfb.c
18192 +++ linux-2.6.24.7/drivers/video/atmel_lcdfb.c
18193 @@ -16,6 +16,7 @@
18194 #include <linux/fb.h>
18195 #include <linux/init.h>
18196 #include <linux/delay.h>
18197 +#include <linux/backlight.h>
18198
18199 #include <asm/arch/board.h>
18200 #include <asm/arch/cpu.h>
18201 @@ -37,7 +38,9 @@
18202 #endif
18203
18204 #if defined(CONFIG_ARCH_AT91)
18205 -#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
18206 +#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
18207 + | FBINFO_PARTIAL_PAN_OK \
18208 + | FBINFO_HWACCEL_YPAN)
18209
18210 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
18211 struct fb_var_screeninfo *var)
18212 @@ -69,12 +72,113 @@ static void atmel_lcdfb_update_dma2d(str
18213 }
18214 #endif
18215
18216 +static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
18217 + | ATMEL_LCDC_POL_POSITIVE
18218 + | ATMEL_LCDC_ENA_PWMENABLE;
18219 +
18220 +#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
18221 +
18222 +/* some bl->props field just changed */
18223 +static int atmel_bl_update_status(struct backlight_device *bl)
18224 +{
18225 + struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
18226 + int power = sinfo->bl_power;
18227 + int brightness = bl->props.brightness;
18228 +
18229 + /* REVISIT there may be a meaningful difference between
18230 + * fb_blank and power ... there seem to be some cases
18231 + * this doesn't handle correctly.
18232 + */
18233 + if (bl->props.fb_blank != sinfo->bl_power)
18234 + power = bl->props.fb_blank;
18235 + else if (bl->props.power != sinfo->bl_power)
18236 + power = bl->props.power;
18237 +
18238 + if (brightness < 0 && power == FB_BLANK_UNBLANK)
18239 + brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
18240 + else if (power != FB_BLANK_UNBLANK)
18241 + brightness = 0;
18242 +
18243 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
18244 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
18245 + brightness ? contrast_ctr : 0);
18246 +
18247 + bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
18248 +
18249 + return 0;
18250 +}
18251 +
18252 +static int atmel_bl_get_brightness(struct backlight_device *bl)
18253 +{
18254 + struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
18255 +
18256 + return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
18257 +}
18258 +
18259 +static struct backlight_ops atmel_lcdc_bl_ops = {
18260 + .update_status = atmel_bl_update_status,
18261 + .get_brightness = atmel_bl_get_brightness,
18262 +};
18263 +
18264 +static void init_backlight(struct atmel_lcdfb_info *sinfo)
18265 +{
18266 + struct backlight_device *bl;
18267 +
18268 + sinfo->bl_power = FB_BLANK_UNBLANK;
18269 +
18270 + if (sinfo->backlight)
18271 + return;
18272 +
18273 + bl = backlight_device_register("backlight", &sinfo->pdev->dev,
18274 + sinfo, &atmel_lcdc_bl_ops);
18275 + if (IS_ERR(sinfo->backlight)) {
18276 + dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
18277 + PTR_ERR(bl));
18278 + return;
18279 + }
18280 + sinfo->backlight = bl;
18281 +
18282 + bl->props.power = FB_BLANK_UNBLANK;
18283 + bl->props.fb_blank = FB_BLANK_UNBLANK;
18284 + bl->props.max_brightness = 0xff;
18285 + bl->props.brightness = atmel_bl_get_brightness(bl);
18286 +}
18287 +
18288 +static void exit_backlight(struct atmel_lcdfb_info *sinfo)
18289 +{
18290 + if (sinfo->backlight)
18291 + backlight_device_unregister(sinfo->backlight);
18292 +}
18293 +
18294 +#else
18295 +
18296 +static void init_backlight(struct atmel_lcdfb_info *sinfo)
18297 +{
18298 + dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
18299 +}
18300 +
18301 +static void exit_backlight(struct atmel_lcdfb_info *sinfo)
18302 +{
18303 +}
18304 +
18305 +#endif
18306 +
18307 +static void init_contrast(struct atmel_lcdfb_info *sinfo)
18308 +{
18309 + /* have some default contrast/backlight settings */
18310 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
18311 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
18312 +
18313 + if (sinfo->lcdcon_is_backlight)
18314 + init_backlight(sinfo);
18315 +}
18316 +
18317
18318 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
18319 .type = FB_TYPE_PACKED_PIXELS,
18320 .visual = FB_VISUAL_TRUECOLOR,
18321 .xpanstep = 0,
18322 - .ypanstep = 0,
18323 + .ypanstep = 1,
18324 .ywrapstep = 0,
18325 .accel = FB_ACCEL_NONE,
18326 };
18327 @@ -148,6 +252,8 @@ static int atmel_lcdfb_alloc_video_memor
18328 return -ENOMEM;
18329 }
18330
18331 + memset(info->screen_base, 0, info->fix.smem_len);
18332 +
18333 return 0;
18334 }
18335
18336 @@ -203,6 +309,26 @@ static int atmel_lcdfb_check_var(struct
18337 var->transp.offset = var->transp.length = 0;
18338 var->xoffset = var->yoffset = 0;
18339
18340 + /* Saturate vertical and horizontal timings at maximum values */
18341 + var->vsync_len = min_t(u32, var->vsync_len,
18342 + (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
18343 + var->upper_margin = min_t(u32, var->upper_margin,
18344 + ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
18345 + var->lower_margin = min_t(u32, var->lower_margin,
18346 + ATMEL_LCDC_VFP);
18347 + var->right_margin = min_t(u32, var->right_margin,
18348 + (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
18349 + var->hsync_len = min_t(u32, var->hsync_len,
18350 + (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
18351 + var->left_margin = min_t(u32, var->left_margin,
18352 + ATMEL_LCDC_HBP + 1);
18353 +
18354 + /* Some parameters can't be zero */
18355 + var->vsync_len = max_t(u32, var->vsync_len, 1);
18356 + var->right_margin = max_t(u32, var->right_margin, 1);
18357 + var->hsync_len = max_t(u32, var->hsync_len, 1);
18358 + var->left_margin = max_t(u32, var->left_margin, 1);
18359 +
18360 switch (var->bits_per_pixel) {
18361 case 1:
18362 case 2:
18363 @@ -370,10 +496,6 @@ static int atmel_lcdfb_set_par(struct fb
18364 /* Disable all interrupts */
18365 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
18366
18367 - /* Set contrast */
18368 - value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
18369 - lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
18370 - lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
18371 /* ...wait for DMA engine to become idle... */
18372 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
18373 msleep(10);
18374 @@ -516,7 +638,6 @@ static int __init atmel_lcdfb_init_fbinf
18375 struct fb_info *info = sinfo->info;
18376 int ret = 0;
18377
18378 - memset_io(info->screen_base, 0, info->fix.smem_len);
18379 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
18380
18381 dev_info(info->device,
18382 @@ -577,6 +698,7 @@ static int __init atmel_lcdfb_probe(stru
18383 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
18384 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
18385 sinfo->guard_time = pdata_sinfo->guard_time;
18386 + sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
18387 } else {
18388 dev_err(dev, "cannot get default configuration\n");
18389 goto free_info;
18390 @@ -645,6 +767,11 @@ static int __init atmel_lcdfb_probe(stru
18391 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
18392 if (!info->screen_base)
18393 goto release_intmem;
18394 +
18395 + /*
18396 + * Don't clear the framebuffer -- someone may have set
18397 + * up a splash image.
18398 + */
18399 } else {
18400 /* alocate memory buffer */
18401 ret = atmel_lcdfb_alloc_video_memory(sinfo);
18402 @@ -670,6 +797,9 @@ static int __init atmel_lcdfb_probe(stru
18403 goto release_mem;
18404 }
18405
18406 + /* Initialize PWM for contrast or backlight ("off") */
18407 + init_contrast(sinfo);
18408 +
18409 /* interrupt */
18410 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
18411 if (ret) {
18412 @@ -721,6 +851,7 @@ free_cmap:
18413 unregister_irqs:
18414 free_irq(sinfo->irq_base, info);
18415 unmap_mmio:
18416 + exit_backlight(sinfo);
18417 iounmap(sinfo->mmio);
18418 release_mem:
18419 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
18420 @@ -755,6 +886,7 @@ static int __exit atmel_lcdfb_remove(str
18421 if (!sinfo)
18422 return 0;
18423
18424 + exit_backlight(sinfo);
18425 if (sinfo->atmel_lcdfb_power_control)
18426 sinfo->atmel_lcdfb_power_control(0);
18427 unregister_framebuffer(info);
18428 @@ -781,6 +913,9 @@ static int __exit atmel_lcdfb_remove(str
18429
18430 static struct platform_driver atmel_lcdfb_driver = {
18431 .remove = __exit_p(atmel_lcdfb_remove),
18432 +
18433 +// FIXME need suspend, resume
18434 +
18435 .driver = {
18436 .name = "atmel_lcdfb",
18437 .owner = THIS_MODULE,
18438 Index: linux-2.6.24.7/drivers/video/backlight/Kconfig
18439 ===================================================================
18440 --- linux-2.6.24.7.orig/drivers/video/backlight/Kconfig
18441 +++ linux-2.6.24.7/drivers/video/backlight/Kconfig
18442 @@ -50,6 +50,19 @@ config BACKLIGHT_CLASS_DEVICE
18443 To have support for your specific LCD panel you will have to
18444 select the proper drivers which depend on this option.
18445
18446 +config BACKLIGHT_ATMEL_LCDC
18447 + bool "Atmel LCDC Contrast-as-Backlight control"
18448 + depends on BACKLIGHT_CLASS_DEVICE && FB_ATMEL
18449 + default y if MACH_SAM9261EK || MACH_SAM9263EK
18450 + help
18451 + This provides a backlight control internal to the Atmel LCDC
18452 + driver. If the LCD "contrast control" on your board is wired
18453 + so it controls the backlight brightness, select this option to
18454 + export this as a PWM-based backlight control.
18455 +
18456 + If in doubt, it's safe to enable this option; it doesn't kick
18457 + in unless the board's description says it's wired that way.
18458 +
18459 config BACKLIGHT_CORGI
18460 tristate "Generic (aka Sharp Corgi) Backlight Driver"
18461 depends on BACKLIGHT_CLASS_DEVICE
18462 Index: linux-2.6.24.7/drivers/video/console/Kconfig
18463 ===================================================================
18464 --- linux-2.6.24.7.orig/drivers/video/console/Kconfig
18465 +++ linux-2.6.24.7/drivers/video/console/Kconfig
18466 @@ -6,7 +6,7 @@ menu "Console display driver support"
18467
18468 config VGA_CONSOLE
18469 bool "VGA text console" if EMBEDDED || !X86
18470 - depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN
18471 + depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32
18472 default y
18473 help
18474 Saying Y here will allow you to use Linux in text mode through a
18475 Index: linux-2.6.24.7/drivers/watchdog/Kconfig
18476 ===================================================================
18477 --- linux-2.6.24.7.orig/drivers/watchdog/Kconfig
18478 +++ linux-2.6.24.7/drivers/watchdog/Kconfig
18479 @@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
18480
18481 config AT32AP700X_WDT
18482 tristate "AT32AP700x watchdog"
18483 - depends on CPU_AT32AP7000
18484 + depends on CPU_AT32AP700X
18485 help
18486 Watchdog timer embedded into AT32AP700x devices. This will reboot
18487 your system when the timeout is reached.
18488 Index: linux-2.6.24.7/include/asm-avr32/arch-at32ap/at32ap7000.h
18489 ===================================================================
18490 --- linux-2.6.24.7.orig/include/asm-avr32/arch-at32ap/at32ap7000.h
18491 +++ /dev/null
18492 @@ -1,35 +0,0 @@
18493 -/*
18494 - * Pin definitions for AT32AP7000.
18495 - *
18496 - * Copyright (C) 2006 Atmel Corporation
18497 - *
18498 - * This program is free software; you can redistribute it and/or modify
18499 - * it under the terms of the GNU General Public License version 2 as
18500 - * published by the Free Software Foundation.
18501 - */
18502 -#ifndef __ASM_ARCH_AT32AP7000_H__
18503 -#define __ASM_ARCH_AT32AP7000_H__
18504 -
18505 -#define GPIO_PERIPH_A 0
18506 -#define GPIO_PERIPH_B 1
18507 -
18508 -#define NR_GPIO_CONTROLLERS 4
18509 -
18510 -/*
18511 - * Pin numbers identifying specific GPIO pins on the chip. They can
18512 - * also be converted to IRQ numbers by passing them through
18513 - * gpio_to_irq().
18514 - */
18515 -#define GPIO_PIOA_BASE (0)
18516 -#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
18517 -#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
18518 -#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
18519 -#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
18520 -
18521 -#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
18522 -#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
18523 -#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
18524 -#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
18525 -#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
18526 -
18527 -#endif /* __ASM_ARCH_AT32AP7000_H__ */
18528 Index: linux-2.6.24.7/include/asm-avr32/arch-at32ap/at32ap700x.h
18529 ===================================================================
18530 --- /dev/null
18531 +++ linux-2.6.24.7/include/asm-avr32/arch-at32ap/at32ap700x.h
18532 @@ -0,0 +1,35 @@
18533 +/*
18534 + * Pin definitions for AT32AP7000.
18535 + *
18536 + * Copyright (C) 2006 Atmel Corporation
18537 + *
18538 + * This program is free software; you can redistribute it and/or modify
18539 + * it under the terms of the GNU General Public License version 2 as
18540 + * published by the Free Software Foundation.
18541 + */
18542 +#ifndef __ASM_ARCH_AT32AP700X_H__
18543 +#define __ASM_ARCH_AT32AP700X_H__
18544 +
18545 +#define GPIO_PERIPH_A 0
18546 +#define GPIO_PERIPH_B 1
18547 +
18548 +#define NR_GPIO_CONTROLLERS 4
18549 +
18550 +/*
18551 + * Pin numbers identifying specific GPIO pins on the chip. They can
18552 + * also be converted to IRQ numbers by passing them through
18553 + * gpio_to_irq().
18554 + */
18555 +#define GPIO_PIOA_BASE (0)
18556 +#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
18557 +#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
18558 +#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
18559 +#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
18560 +
18561 +#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
18562 +#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
18563 +#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
18564 +#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
18565 +#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
18566 +
18567 +#endif /* __ASM_ARCH_AT32AP700X_H__ */
18568 Index: linux-2.6.24.7/include/asm-avr32/arch-at32ap/board.h
18569 ===================================================================
18570 --- linux-2.6.24.7.orig/include/asm-avr32/arch-at32ap/board.h
18571 +++ linux-2.6.24.7/include/asm-avr32/arch-at32ap/board.h
18572 @@ -38,9 +38,7 @@ struct platform_device *
18573 at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
18574 unsigned long fbmem_start, unsigned long fbmem_len);
18575
18576 -struct usba_platform_data {
18577 - int vbus_pin;
18578 -};
18579 +struct usba_platform_data;
18580 struct platform_device *
18581 at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
18582
18583 @@ -51,6 +49,9 @@ struct platform_device *
18584 at32_add_device_ide(unsigned int id, unsigned int extint,
18585 struct ide_platform_data *data);
18586
18587 +/* mask says which PWM channels to mux */
18588 +struct platform_device *at32_add_device_pwm(u32 mask);
18589 +
18590 /* depending on what's hooked up, not all SSC pins will be used */
18591 #define ATMEL_SSC_TK 0x01
18592 #define ATMEL_SSC_TF 0x02
18593 @@ -65,8 +66,17 @@ at32_add_device_ide(unsigned int id, uns
18594 struct platform_device *
18595 at32_add_device_ssc(unsigned int id, unsigned int flags);
18596
18597 -struct platform_device *at32_add_device_twi(unsigned int id);
18598 -struct platform_device *at32_add_device_mci(unsigned int id);
18599 +struct i2c_board_info;
18600 +struct platform_device *at32_add_device_twi(unsigned int id,
18601 + struct i2c_board_info *b,
18602 + unsigned int n);
18603 +
18604 +struct mci_platform_data {
18605 + int detect_pin;
18606 + int wp_pin;
18607 +};
18608 +struct platform_device *
18609 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
18610 struct platform_device *at32_add_device_ac97c(unsigned int id);
18611 struct platform_device *at32_add_device_abdac(unsigned int id);
18612
18613 @@ -81,4 +91,7 @@ struct platform_device *
18614 at32_add_device_cf(unsigned int id, unsigned int extint,
18615 struct cf_platform_data *data);
18616
18617 +struct platform_device *
18618 +at32_add_device_psif(unsigned int id);
18619 +
18620 #endif /* __ASM_ARCH_BOARD_H */
18621 Index: linux-2.6.24.7/include/asm-avr32/arch-at32ap/cpu.h
18622 ===================================================================
18623 --- linux-2.6.24.7.orig/include/asm-avr32/arch-at32ap/cpu.h
18624 +++ linux-2.6.24.7/include/asm-avr32/arch-at32ap/cpu.h
18625 @@ -14,7 +14,7 @@
18626 * Only AT32AP7000 is defined for now. We can identify the specific
18627 * chip at runtime, but I'm not sure if it's really worth it.
18628 */
18629 -#ifdef CONFIG_CPU_AT32AP7000
18630 +#ifdef CONFIG_CPU_AT32AP700X
18631 # define cpu_is_at32ap7000() (1)
18632 #else
18633 # define cpu_is_at32ap7000() (0)
18634 Index: linux-2.6.24.7/include/asm-avr32/arch-at32ap/io.h
18635 ===================================================================
18636 --- linux-2.6.24.7.orig/include/asm-avr32/arch-at32ap/io.h
18637 +++ linux-2.6.24.7/include/asm-avr32/arch-at32ap/io.h
18638 @@ -4,7 +4,7 @@
18639 /* For "bizarre" halfword swapping */
18640 #include <linux/byteorder/swabb.h>
18641
18642 -#if defined(CONFIG_AP7000_32_BIT_SMC)
18643 +#if defined(CONFIG_AP700X_32_BIT_SMC)
18644 # define __swizzle_addr_b(addr) (addr ^ 3UL)
18645 # define __swizzle_addr_w(addr) (addr ^ 2UL)
18646 # define __swizzle_addr_l(addr) (addr)
18647 @@ -14,7 +14,7 @@
18648 # define __mem_ioswabb(a, x) (x)
18649 # define __mem_ioswabw(a, x) swab16(x)
18650 # define __mem_ioswabl(a, x) swab32(x)
18651 -#elif defined(CONFIG_AP7000_16_BIT_SMC)
18652 +#elif defined(CONFIG_AP700X_16_BIT_SMC)
18653 # define __swizzle_addr_b(addr) (addr ^ 1UL)
18654 # define __swizzle_addr_w(addr) (addr)
18655 # define __swizzle_addr_l(addr) (addr)
18656 Index: linux-2.6.24.7/include/asm-avr32/arch-at32ap/pm.h
18657 ===================================================================
18658 --- /dev/null
18659 +++ linux-2.6.24.7/include/asm-avr32/arch-at32ap/pm.h
18660 @@ -0,0 +1,48 @@
18661 +/*
18662 + * AVR32 AP Power Management.
18663 + *
18664 + * Copyright (C) 2008 Atmel Corporation
18665 + *
18666 + * This program is free software; you can redistribute it and/or modify
18667 + * it under the terms of the GNU General Public License version 2 as
18668 + * published by the Free Software Foundation.
18669 + */
18670 +#ifndef __ASM_AVR32_ARCH_PM_H
18671 +#define __ASM_AVR32_ARCH_PM_H
18672 +
18673 +/* Possible arguments to the "sleep" instruction */
18674 +#define CPU_SLEEP_IDLE 0
18675 +#define CPU_SLEEP_FROZEN 1
18676 +#define CPU_SLEEP_STANDBY 2
18677 +#define CPU_SLEEP_STOP 3
18678 +#define CPU_SLEEP_STATIC 5
18679 +
18680 +#ifndef __ASSEMBLY__
18681 +extern void cpu_enter_idle(void);
18682 +
18683 +extern bool disable_idle_sleep;
18684 +
18685 +static inline void cpu_disable_idle_sleep(void)
18686 +{
18687 + disable_idle_sleep = true;
18688 +}
18689 +
18690 +static inline void cpu_enable_idle_sleep(void)
18691 +{
18692 + disable_idle_sleep = false;
18693 +}
18694 +
18695 +static inline void cpu_idle_sleep(void)
18696 +{
18697 + /*
18698 + * If we're using the COUNT and COMPARE registers for
18699 + * timekeeping, we can't use the IDLE state.
18700 + */
18701 + if (disable_idle_sleep)
18702 + cpu_relax();
18703 + else
18704 + cpu_enter_idle();
18705 +}
18706 +#endif
18707 +
18708 +#endif /* __ASM_AVR32_ARCH_PM_H */
18709 Index: linux-2.6.24.7/include/asm-avr32/arch-at32ap/portmux.h
18710 ===================================================================
18711 --- linux-2.6.24.7.orig/include/asm-avr32/arch-at32ap/portmux.h
18712 +++ linux-2.6.24.7/include/asm-avr32/arch-at32ap/portmux.h
18713 @@ -26,4 +26,16 @@ void at32_select_periph(unsigned int pin
18714 void at32_select_gpio(unsigned int pin, unsigned long flags);
18715 void at32_reserve_pin(unsigned int pin);
18716
18717 +#ifdef CONFIG_GPIO_DEV
18718 +
18719 +/* Gang allocators and accessors; used by the GPIO /dev driver */
18720 +int at32_gpio_port_is_valid(unsigned int port);
18721 +int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
18722 +void at32_deselect_pins(unsigned int port, u32 pins);
18723 +
18724 +u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
18725 +void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
18726 +
18727 +#endif /* CONFIG_GPIO_DEV */
18728 +
18729 #endif /* __ASM_ARCH_PORTMUX_H__ */
18730 Index: linux-2.6.24.7/include/asm-avr32/arch-at32ap/time.h
18731 ===================================================================
18732 --- linux-2.6.24.7.orig/include/asm-avr32/arch-at32ap/time.h
18733 +++ /dev/null
18734 @@ -1,112 +0,0 @@
18735 -/*
18736 - * Copyright (C) 2007 Atmel Corporation
18737 - *
18738 - * This program is free software; you can redistribute it and/or modify
18739 - * it under the terms of the GNU General Public License version 2 as
18740 - * published by the Free Software Foundation.
18741 - */
18742 -
18743 -#ifndef _ASM_AVR32_ARCH_AT32AP_TIME_H
18744 -#define _ASM_AVR32_ARCH_AT32AP_TIME_H
18745 -
18746 -#include <linux/platform_device.h>
18747 -
18748 -extern struct irqaction timer_irqaction;
18749 -extern struct platform_device at32_systc0_device;
18750 -extern void local_timer_interrupt(int irq, void *dev_id);
18751 -
18752 -#define TIMER_BCR 0x000000c0
18753 -#define TIMER_BCR_SYNC 0
18754 -#define TIMER_BMR 0x000000c4
18755 -#define TIMER_BMR_TC0XC0S 0
18756 -#define TIMER_BMR_TC1XC1S 2
18757 -#define TIMER_BMR_TC2XC2S 4
18758 -#define TIMER_CCR 0x00000000
18759 -#define TIMER_CCR_CLKDIS 1
18760 -#define TIMER_CCR_CLKEN 0
18761 -#define TIMER_CCR_SWTRG 2
18762 -#define TIMER_CMR 0x00000004
18763 -#define TIMER_CMR_ABETRG 10
18764 -#define TIMER_CMR_ACPA 16
18765 -#define TIMER_CMR_ACPC 18
18766 -#define TIMER_CMR_AEEVT 20
18767 -#define TIMER_CMR_ASWTRG 22
18768 -#define TIMER_CMR_BCPB 24
18769 -#define TIMER_CMR_BCPC 26
18770 -#define TIMER_CMR_BEEVT 28
18771 -#define TIMER_CMR_BSWTRG 30
18772 -#define TIMER_CMR_BURST 4
18773 -#define TIMER_CMR_CLKI 3
18774 -#define TIMER_CMR_CPCDIS 7
18775 -#define TIMER_CMR_CPCSTOP 6
18776 -#define TIMER_CMR_CPCTRG 14
18777 -#define TIMER_CMR_EEVT 10
18778 -#define TIMER_CMR_EEVTEDG 8
18779 -#define TIMER_CMR_ENETRG 12
18780 -#define TIMER_CMR_ETRGEDG 8
18781 -#define TIMER_CMR_LDBDIS 7
18782 -#define TIMER_CMR_LDBSTOP 6
18783 -#define TIMER_CMR_LDRA 16
18784 -#define TIMER_CMR_LDRB 18
18785 -#define TIMER_CMR_TCCLKS 0
18786 -#define TIMER_CMR_WAVE 15
18787 -#define TIMER_CMR_WAVSEL 13
18788 -#define TIMER_CV 0x00000010
18789 -#define TIMER_CV_CV 0
18790 -#define TIMER_IDR 0x00000028
18791 -#define TIMER_IDR_COVFS 0
18792 -#define TIMER_IDR_CPAS 2
18793 -#define TIMER_IDR_CPBS 3
18794 -#define TIMER_IDR_CPCS 4
18795 -#define TIMER_IDR_ETRGS 7
18796 -#define TIMER_IDR_LDRAS 5
18797 -#define TIMER_IDR_LDRBS 6
18798 -#define TIMER_IDR_LOVRS 1
18799 -#define TIMER_IER 0x00000024
18800 -#define TIMER_IER_COVFS 0
18801 -#define TIMER_IER_CPAS 2
18802 -#define TIMER_IER_CPBS 3
18803 -#define TIMER_IER_CPCS 4
18804 -#define TIMER_IER_ETRGS 7
18805 -#define TIMER_IER_LDRAS 5
18806 -#define TIMER_IER_LDRBS 6
18807 -#define TIMER_IER_LOVRS 1
18808 -#define TIMER_IMR 0x0000002c
18809 -#define TIMER_IMR_COVFS 0
18810 -#define TIMER_IMR_CPAS 2
18811 -#define TIMER_IMR_CPBS 3
18812 -#define TIMER_IMR_CPCS 4
18813 -#define TIMER_IMR_ETRGS 7
18814 -#define TIMER_IMR_LDRAS 5
18815 -#define TIMER_IMR_LDRBS 6
18816 -#define TIMER_IMR_LOVRS 1
18817 -#define TIMER_RA 0x00000014
18818 -#define TIMER_RA_RA 0
18819 -#define TIMER_RB 0x00000018
18820 -#define TIMER_RB_RB 0
18821 -#define TIMER_RC 0x0000001c
18822 -#define TIMER_RC_RC 0
18823 -#define TIMER_SR 0x00000020
18824 -#define TIMER_SR_CLKSTA 16
18825 -#define TIMER_SR_COVFS 0
18826 -#define TIMER_SR_CPAS 2
18827 -#define TIMER_SR_CPBS 3
18828 -#define TIMER_SR_CPCS 4
18829 -#define TIMER_SR_ETRGS 7
18830 -#define TIMER_SR_LDRAS 5
18831 -#define TIMER_SR_LDRBS 6
18832 -#define TIMER_SR_LOVRS 1
18833 -#define TIMER_SR_MTIOA 17
18834 -#define TIMER_SR_MTIOB 18
18835 -
18836 -/* Bit manipulation macros */
18837 -#define TIMER_BIT(name) (1 << TIMER_##name)
18838 -#define TIMER_BF(name,value) ((value) << TIMER_##name)
18839 -
18840 -/* Register access macros */
18841 -#define timer_read(port,instance,reg) \
18842 - __raw_readl(port + (0x40 * instance) + TIMER_##reg)
18843 -#define timer_write(port,instance,reg,value) \
18844 - __raw_writel((value), port + (0x40 * instance) + TIMER_##reg)
18845 -
18846 -#endif /* _ASM_AVR32_ARCH_AT32AP_TIME_H */
18847 Index: linux-2.6.24.7/include/asm-avr32/asm.h
18848 ===================================================================
18849 --- linux-2.6.24.7.orig/include/asm-avr32/asm.h
18850 +++ linux-2.6.24.7/include/asm-avr32/asm.h
18851 @@ -12,10 +12,10 @@
18852 #include <asm/asm-offsets.h>
18853 #include <asm/thread_info.h>
18854
18855 -#define mask_interrupts ssrf SR_GM_BIT
18856 -#define mask_exceptions ssrf SR_EM_BIT
18857 -#define unmask_interrupts csrf SR_GM_BIT
18858 -#define unmask_exceptions csrf SR_EM_BIT
18859 +#define mask_interrupts ssrf SYSREG_GM_OFFSET
18860 +#define mask_exceptions ssrf SYSREG_EM_OFFSET
18861 +#define unmask_interrupts csrf SYSREG_GM_OFFSET
18862 +#define unmask_exceptions csrf SYSREG_EM_OFFSET
18863
18864 #ifdef CONFIG_FRAME_POINTER
18865 .macro save_fp
18866 Index: linux-2.6.24.7/include/asm-avr32/byteorder.h
18867 ===================================================================
18868 --- linux-2.6.24.7.orig/include/asm-avr32/byteorder.h
18869 +++ linux-2.6.24.7/include/asm-avr32/byteorder.h
18870 @@ -12,8 +12,10 @@ extern unsigned long __builtin_bswap_32(
18871 extern unsigned short __builtin_bswap_16(unsigned short x);
18872 #endif
18873
18874 +#if 0
18875 #define __arch__swab32(x) __builtin_bswap_32(x)
18876 #define __arch__swab16(x) __builtin_bswap_16(x)
18877 +#endif
18878
18879 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
18880 # define __BYTEORDER_HAS_U64__
18881 Index: linux-2.6.24.7/include/asm-avr32/dma-controller.h
18882 ===================================================================
18883 --- /dev/null
18884 +++ linux-2.6.24.7/include/asm-avr32/dma-controller.h
18885 @@ -0,0 +1,166 @@
18886 +/*
18887 + * Copyright (C) 2005-2006 Atmel Corporation
18888 + *
18889 + * This program is free software; you can redistribute it and/or modify
18890 + * it under the terms of the GNU General Public License version 2 as
18891 + * published by the Free Software Foundation.
18892 + */
18893 +#ifndef __ASM_AVR32_DMA_CONTROLLER_H
18894 +#define __ASM_AVR32_DMA_CONTROLLER_H
18895 +
18896 +#include <linux/device.h>
18897 +
18898 +#define DMA_DIR_MEM_TO_MEM 0x0000
18899 +#define DMA_DIR_MEM_TO_PERIPH 0x0001
18900 +#define DMA_DIR_PERIPH_TO_MEM 0x0002
18901 +#define DMA_DIR_PERIPH_TO_PERIPH 0x0003
18902 +
18903 +#define DMA_WIDTH_8BIT 0
18904 +#define DMA_WIDTH_16BIT 1
18905 +#define DMA_WIDTH_32BIT 2
18906 +
18907 +struct dma_request {
18908 + struct dma_controller *dmac;
18909 + struct list_head list;
18910 +
18911 + unsigned short channel;
18912 +
18913 + void (*xfer_complete)(struct dma_request *req);
18914 + void (*block_complete)(struct dma_request *req);
18915 + void (*error)(struct dma_request *req);
18916 +};
18917 +
18918 +struct dma_request_sg {
18919 + struct dma_request req;
18920 +
18921 + int nr_sg;
18922 + struct scatterlist *sg;
18923 + unsigned long block_size;
18924 + unsigned int nr_blocks;
18925 +
18926 + dma_addr_t data_reg;
18927 + unsigned short periph_id;
18928 +
18929 + unsigned char direction;
18930 + unsigned char width;
18931 +};
18932 +#define to_dma_request_sg(_req) \
18933 + container_of(_req, struct dma_request_sg, req)
18934 +
18935 +struct dma_request_cyclic {
18936 + struct dma_request req;
18937 +
18938 + int periods;
18939 + unsigned long buffer_size;
18940 +
18941 + dma_addr_t buffer_start;
18942 + dma_addr_t data_reg;
18943 +
18944 + unsigned short periph_id;
18945 + unsigned char direction;
18946 + unsigned char width;
18947 +
18948 + void *dev_id;
18949 +};
18950 +#define to_dma_request_cyclic(_req) \
18951 + container_of(_req, struct dma_request_cyclic, req)
18952 +
18953 +struct dma_request_memcpy {
18954 + struct dma_request req;
18955 +
18956 + dma_addr_t src_addr;
18957 + unsigned int src_width;
18958 + unsigned int src_stride;
18959 +
18960 + dma_addr_t dst_addr;
18961 + unsigned int dst_width;
18962 + unsigned int dst_stride;
18963 +
18964 + size_t length;
18965 +
18966 + unsigned short src_reverse:1;
18967 + unsigned short dst_reverse:1;
18968 +};
18969 +#define to_dma_request_memcpy(_req) \
18970 + container_of(_req, struct dma_request_memcpy, req)
18971 +
18972 +struct dma_controller {
18973 + struct list_head list;
18974 + int id;
18975 + struct device *dev;
18976 +
18977 + int (*alloc_channel)(struct dma_controller *dmac);
18978 + void (*release_channel)(struct dma_controller *dmac,
18979 + int channel);
18980 + int (*prepare_request_sg)(struct dma_controller *dmac,
18981 + struct dma_request_sg *req);
18982 + int (*prepare_request_cyclic)(struct dma_controller *dmac,
18983 + struct dma_request_cyclic *req);
18984 + int (*prepare_request_memcpy)(struct dma_controller *dmac,
18985 + struct dma_request_memcpy *req);
18986 + int (*start_request)(struct dma_controller *dmac,
18987 + unsigned int channel);
18988 + int (*stop_request)(struct dma_controller *dmac,
18989 + unsigned int channel);
18990 + dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
18991 + unsigned int channel);
18992 +};
18993 +
18994 +static inline int
18995 +dma_alloc_channel(struct dma_controller *dmac)
18996 +{
18997 + return dmac->alloc_channel(dmac);
18998 +}
18999 +
19000 +static inline void
19001 +dma_release_channel(struct dma_controller *dmac, int chan)
19002 +{
19003 + dmac->release_channel(dmac, chan);
19004 +}
19005 +
19006 +static inline int
19007 +dma_prepare_request_sg(struct dma_controller *dmac,
19008 + struct dma_request_sg *req)
19009 +{
19010 + return dmac->prepare_request_sg(dmac, req);
19011 +}
19012 +
19013 +static inline int
19014 +dma_prepare_request_cyclic(struct dma_controller *dmac,
19015 + struct dma_request_cyclic *req)
19016 +{
19017 + return dmac->prepare_request_cyclic(dmac, req);
19018 +}
19019 +
19020 +static inline int
19021 +dma_prepare_request_memcpy(struct dma_controller *dmac,
19022 + struct dma_request_memcpy *req)
19023 +{
19024 + return dmac->prepare_request_memcpy(dmac, req);
19025 +}
19026 +
19027 +static inline int
19028 +dma_start_request(struct dma_controller *dmac,
19029 + unsigned int channel)
19030 +{
19031 + return dmac->start_request(dmac, channel);
19032 +}
19033 +
19034 +static inline int
19035 +dma_stop_request(struct dma_controller *dmac,
19036 + unsigned int channel)
19037 +{
19038 + return dmac->stop_request(dmac, channel);
19039 +}
19040 +
19041 +static inline dma_addr_t
19042 +dma_get_current_pos(struct dma_controller *dmac,
19043 + unsigned int channel)
19044 +{
19045 + return dmac->get_current_pos(dmac, channel);
19046 +}
19047 +
19048 +extern int register_dma_controller(struct dma_controller *dmac);
19049 +extern struct dma_controller *find_dma_controller(int id);
19050 +
19051 +#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
19052 Index: linux-2.6.24.7/include/asm-avr32/intc.h
19053 ===================================================================
19054 --- linux-2.6.24.7.orig/include/asm-avr32/intc.h
19055 +++ /dev/null
19056 @@ -1,128 +0,0 @@
19057 -#ifndef __ASM_AVR32_INTC_H
19058 -#define __ASM_AVR32_INTC_H
19059 -
19060 -#include <linux/sysdev.h>
19061 -#include <linux/interrupt.h>
19062 -
19063 -struct irq_controller;
19064 -struct irqaction;
19065 -struct pt_regs;
19066 -
19067 -struct platform_device;
19068 -
19069 -/* Information about the internal interrupt controller */
19070 -struct intc_device {
19071 - /* ioremapped address of configuration block */
19072 - void __iomem *regs;
19073 -
19074 - /* the physical device */
19075 - struct platform_device *pdev;
19076 -
19077 - /* Number of interrupt lines per group. */
19078 - unsigned int irqs_per_group;
19079 -
19080 - /* The highest group ID + 1 */
19081 - unsigned int nr_groups;
19082 -
19083 - /*
19084 - * Bitfield indicating which groups are actually in use. The
19085 - * size of the array is
19086 - * ceil(group_max / (8 * sizeof(unsigned int))).
19087 - */
19088 - unsigned int group_mask[];
19089 -};
19090 -
19091 -struct irq_controller_class {
19092 - /*
19093 - * A short name identifying this kind of controller.
19094 - */
19095 - const char *typename;
19096 - /*
19097 - * Handle the IRQ. Must do any necessary acking and masking.
19098 - */
19099 - irqreturn_t (*handle)(int irq, void *dev_id, struct pt_regs *regs);
19100 - /*
19101 - * Register a new IRQ handler.
19102 - */
19103 - int (*setup)(struct irq_controller *ctrl, unsigned int irq,
19104 - struct irqaction *action);
19105 - /*
19106 - * Unregister a IRQ handler.
19107 - */
19108 - void (*free)(struct irq_controller *ctrl, unsigned int irq,
19109 - void *dev_id);
19110 - /*
19111 - * Mask the IRQ in the interrupt controller.
19112 - */
19113 - void (*mask)(struct irq_controller *ctrl, unsigned int irq);
19114 - /*
19115 - * Unmask the IRQ in the interrupt controller.
19116 - */
19117 - void (*unmask)(struct irq_controller *ctrl, unsigned int irq);
19118 - /*
19119 - * Set the type of the IRQ. See below for possible types.
19120 - * Return -EINVAL if a given type is not supported
19121 - */
19122 - int (*set_type)(struct irq_controller *ctrl, unsigned int irq,
19123 - unsigned int type);
19124 - /*
19125 - * Return the IRQ type currently set
19126 - */
19127 - unsigned int (*get_type)(struct irq_controller *ctrl, unsigned int irq);
19128 -};
19129 -
19130 -struct irq_controller {
19131 - struct irq_controller_class *class;
19132 - unsigned int irq_group;
19133 - unsigned int first_irq;
19134 - unsigned int nr_irqs;
19135 - struct list_head list;
19136 -};
19137 -
19138 -struct intc_group_desc {
19139 - struct irq_controller *ctrl;
19140 - irqreturn_t (*handle)(int, void *, struct pt_regs *);
19141 - unsigned long flags;
19142 - void *dev_id;
19143 - const char *devname;
19144 -};
19145 -
19146 -/*
19147 - * The internal interrupt controller. Defined in board/part-specific
19148 - * devices.c.
19149 - * TODO: Should probably be defined per-cpu.
19150 - */
19151 -extern struct intc_device intc;
19152 -
19153 -extern int request_internal_irq(unsigned int irq,
19154 - irqreturn_t (*handler)(int, void *, struct pt_regs *),
19155 - unsigned long irqflags,
19156 - const char *devname, void *dev_id);
19157 -extern void free_internal_irq(unsigned int irq);
19158 -
19159 -/* Only used by time_init() */
19160 -extern int setup_internal_irq(unsigned int irq, struct intc_group_desc *desc);
19161 -
19162 -/*
19163 - * Set interrupt priority for a given group. `group' can be found by
19164 - * using irq_to_group(irq). Priority can be from 0 (lowest) to 3
19165 - * (highest). Higher-priority interrupts will preempt lower-priority
19166 - * interrupts (unless interrupts are masked globally).
19167 - *
19168 - * This function does not check for conflicts within a group.
19169 - */
19170 -extern int intc_set_priority(unsigned int group,
19171 - unsigned int priority);
19172 -
19173 -/*
19174 - * Returns a bitmask of pending interrupts in a group.
19175 - */
19176 -extern unsigned long intc_get_pending(unsigned int group);
19177 -
19178 -/*
19179 - * Register a new external interrupt controller. Returns the first
19180 - * external IRQ number that is assigned to the new controller.
19181 - */
19182 -extern int intc_register_controller(struct irq_controller *ctrl);
19183 -
19184 -#endif /* __ASM_AVR32_INTC_H */
19185 Index: linux-2.6.24.7/include/asm-avr32/irq.h
19186 ===================================================================
19187 --- linux-2.6.24.7.orig/include/asm-avr32/irq.h
19188 +++ linux-2.6.24.7/include/asm-avr32/irq.h
19189 @@ -11,4 +11,14 @@
19190
19191 #define irq_canonicalize(i) (i)
19192
19193 +#ifndef __ASSEMBLER__
19194 +int nmi_enable(void);
19195 +void nmi_disable(void);
19196 +
19197 +/*
19198 + * Returns a bitmask of pending interrupts in a group.
19199 + */
19200 +extern unsigned long intc_get_pending(unsigned int group);
19201 +#endif
19202 +
19203 #endif /* __ASM_AVR32_IOCTLS_H */
19204 Index: linux-2.6.24.7/include/asm-avr32/kdebug.h
19205 ===================================================================
19206 --- linux-2.6.24.7.orig/include/asm-avr32/kdebug.h
19207 +++ linux-2.6.24.7/include/asm-avr32/kdebug.h
19208 @@ -5,6 +5,7 @@
19209 enum die_val {
19210 DIE_BREAKPOINT,
19211 DIE_SSTEP,
19212 + DIE_NMI,
19213 };
19214
19215 #endif /* __ASM_AVR32_KDEBUG_H */
19216 Index: linux-2.6.24.7/include/asm-avr32/ocd.h
19217 ===================================================================
19218 --- linux-2.6.24.7.orig/include/asm-avr32/ocd.h
19219 +++ linux-2.6.24.7/include/asm-avr32/ocd.h
19220 @@ -533,6 +533,11 @@ static inline void __ocd_write(unsigned
19221 #define ocd_read(reg) __ocd_read(OCD_##reg)
19222 #define ocd_write(reg, value) __ocd_write(OCD_##reg, value)
19223
19224 +struct task_struct;
19225 +
19226 +void ocd_enable(struct task_struct *child);
19227 +void ocd_disable(struct task_struct *child);
19228 +
19229 #endif /* !__ASSEMBLER__ */
19230
19231 #endif /* __ASM_AVR32_OCD_H */
19232 Index: linux-2.6.24.7/include/asm-avr32/pgtable.h
19233 ===================================================================
19234 --- linux-2.6.24.7.orig/include/asm-avr32/pgtable.h
19235 +++ linux-2.6.24.7/include/asm-avr32/pgtable.h
19236 @@ -157,6 +157,7 @@ extern struct page *empty_zero_page;
19237 #define _PAGE_S(x) _PAGE_NORMAL(x)
19238
19239 #define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ)
19240 +#define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ)
19241
19242 #ifndef __ASSEMBLY__
19243 /*
19244 Index: linux-2.6.24.7/include/asm-avr32/processor.h
19245 ===================================================================
19246 --- linux-2.6.24.7.orig/include/asm-avr32/processor.h
19247 +++ linux-2.6.24.7/include/asm-avr32/processor.h
19248 @@ -57,11 +57,25 @@ struct avr32_cpuinfo {
19249 unsigned short cpu_revision;
19250 enum tlb_config tlb_config;
19251 unsigned long features;
19252 + u32 device_id;
19253
19254 struct cache_info icache;
19255 struct cache_info dcache;
19256 };
19257
19258 +static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
19259 +{
19260 + return (cpu->device_id >> 1) & 0x7f;
19261 +}
19262 +static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
19263 +{
19264 + return (cpu->device_id >> 12) & 0xffff;
19265 +}
19266 +static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
19267 +{
19268 + return (cpu->device_id >> 28) & 0x0f;
19269 +}
19270 +
19271 extern struct avr32_cpuinfo boot_cpu_data;
19272
19273 #ifdef CONFIG_SMP
19274 Index: linux-2.6.24.7/include/asm-avr32/ptrace.h
19275 ===================================================================
19276 --- linux-2.6.24.7.orig/include/asm-avr32/ptrace.h
19277 +++ linux-2.6.24.7/include/asm-avr32/ptrace.h
19278 @@ -121,7 +121,15 @@ struct pt_regs {
19279 };
19280
19281 #ifdef __KERNEL__
19282 -# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
19283 +
19284 +#include <asm/ocd.h>
19285 +
19286 +#define arch_ptrace_attach(child) ocd_enable(child)
19287 +
19288 +#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
19289 +#define instruction_pointer(regs) ((regs)->pc)
19290 +#define profile_pc(regs) instruction_pointer(regs)
19291 +
19292 extern void show_regs (struct pt_regs *);
19293
19294 static __inline__ int valid_user_regs(struct pt_regs *regs)
19295 @@ -141,9 +149,6 @@ static __inline__ int valid_user_regs(st
19296 return 0;
19297 }
19298
19299 -#define instruction_pointer(regs) ((regs)->pc)
19300 -
19301 -#define profile_pc(regs) instruction_pointer(regs)
19302
19303 #endif /* __KERNEL__ */
19304
19305 Index: linux-2.6.24.7/include/asm-avr32/thread_info.h
19306 ===================================================================
19307 --- linux-2.6.24.7.orig/include/asm-avr32/thread_info.h
19308 +++ linux-2.6.24.7/include/asm-avr32/thread_info.h
19309 @@ -88,6 +88,7 @@ static inline struct thread_info *curren
19310 #define TIF_MEMDIE 6
19311 #define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */
19312 #define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */
19313 +#define TIF_DEBUG 30 /* debugging enabled */
19314 #define TIF_USERSPACE 31 /* true if FS sets userspace */
19315
19316 #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
19317 Index: linux-2.6.24.7/include/linux/atmel_pwm.h
19318 ===================================================================
19319 --- /dev/null
19320 +++ linux-2.6.24.7/include/linux/atmel_pwm.h
19321 @@ -0,0 +1,70 @@
19322 +#ifndef __LINUX_ATMEL_PWM_H
19323 +#define __LINUX_ATMEL_PWM_H
19324 +
19325 +/**
19326 + * struct pwm_channel - driver handle to a PWM channel
19327 + * @regs: base of this channel's registers
19328 + * @index: number of this channel (0..31)
19329 + * @mck: base clock rate, which can be prescaled and maybe subdivided
19330 + *
19331 + * Drivers initialize a pwm_channel structure using pwm_channel_alloc().
19332 + * Then they configure its clock rate (derived from MCK), alignment,
19333 + * polarity, and duty cycle by writing directly to the channel registers,
19334 + * before enabling the channel by calling pwm_channel_enable().
19335 + *
19336 + * After emitting a PWM signal for the desired length of time, drivers
19337 + * may then pwm_channel_disable() or pwm_channel_free(). Both of these
19338 + * disable the channel, but when it's freed the IRQ is deconfigured and
19339 + * the channel must later be re-allocated and reconfigured.
19340 + *
19341 + * Note that if the period or duty cycle need to be changed while the
19342 + * PWM channel is operating, drivers must use the PWM_CUPD double buffer
19343 + * mechanism, either polling until they change or getting implicitly
19344 + * notified through a once-per-period interrupt handler.
19345 + */
19346 +struct pwm_channel {
19347 + void __iomem *regs;
19348 + unsigned index;
19349 + unsigned long mck;
19350 +};
19351 +
19352 +extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
19353 +extern int pwm_channel_free(struct pwm_channel *ch);
19354 +
19355 +extern int pwm_clk_alloc(unsigned prescale, unsigned div);
19356 +extern void pwm_clk_free(unsigned clk);
19357 +
19358 +extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
19359 +
19360 +#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1)
19361 +#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0)
19362 +
19363 +/* periodic interrupts, mostly for CUPD changes to period or cycle */
19364 +extern int pwm_channel_handler(struct pwm_channel *ch,
19365 + void (*handler)(struct pwm_channel *ch));
19366 +
19367 +/* per-channel registers (banked at pwm_channel->regs) */
19368 +#define PWM_CMR 0x00 /* mode register */
19369 +#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */
19370 +#define PWM_CPR_CPOL (1 << 9) /* set: idle high */
19371 +#define PWM_CPR_CALG (1 << 8) /* set: center align */
19372 +#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */
19373 +#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */
19374 +#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */
19375 +#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */
19376 +#define PWM_CPRD 0x08 /* period (count up from zero) */
19377 +#define PWM_CCNT 0x0c /* counter (20 bits?) */
19378 +#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */
19379 +
19380 +static inline void
19381 +pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
19382 +{
19383 + __raw_writel(val, pwmc->regs + offset);
19384 +}
19385 +
19386 +static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
19387 +{
19388 + return __raw_readl(pwmc->regs + offset);
19389 +}
19390 +
19391 +#endif /* __LINUX_ATMEL_PWM_H */
19392 Index: linux-2.6.24.7/include/linux/atmel_serial.h
19393 ===================================================================
19394 --- /dev/null
19395 +++ linux-2.6.24.7/include/linux/atmel_serial.h
19396 @@ -0,0 +1,127 @@
19397 +/*
19398 + * include/linux/atmel_serial.h
19399 + *
19400 + * Copyright (C) 2005 Ivan Kokshaysky
19401 + * Copyright (C) SAN People
19402 + *
19403 + * USART registers.
19404 + * Based on AT91RM9200 datasheet revision E.
19405 + *
19406 + * This program is free software; you can redistribute it and/or modify
19407 + * it under the terms of the GNU General Public License as published by
19408 + * the Free Software Foundation; either version 2 of the License, or
19409 + * (at your option) any later version.
19410 + */
19411 +
19412 +#ifndef ATMEL_SERIAL_H
19413 +#define ATMEL_SERIAL_H
19414 +
19415 +#define ATMEL_US_CR 0x00 /* Control Register */
19416 +#define ATMEL_US_RSTRX (1 << 2) /* Reset Receiver */
19417 +#define ATMEL_US_RSTTX (1 << 3) /* Reset Transmitter */
19418 +#define ATMEL_US_RXEN (1 << 4) /* Receiver Enable */
19419 +#define ATMEL_US_RXDIS (1 << 5) /* Receiver Disable */
19420 +#define ATMEL_US_TXEN (1 << 6) /* Transmitter Enable */
19421 +#define ATMEL_US_TXDIS (1 << 7) /* Transmitter Disable */
19422 +#define ATMEL_US_RSTSTA (1 << 8) /* Reset Status Bits */
19423 +#define ATMEL_US_STTBRK (1 << 9) /* Start Break */
19424 +#define ATMEL_US_STPBRK (1 << 10) /* Stop Break */
19425 +#define ATMEL_US_STTTO (1 << 11) /* Start Time-out */
19426 +#define ATMEL_US_SENDA (1 << 12) /* Send Address */
19427 +#define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */
19428 +#define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */
19429 +#define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */
19430 +#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */
19431 +#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */
19432 +#define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */
19433 +#define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */
19434 +
19435 +#define ATMEL_US_MR 0x04 /* Mode Register */
19436 +#define ATMEL_US_USMODE (0xf << 0) /* Mode of the USART */
19437 +#define ATMEL_US_USMODE_NORMAL 0
19438 +#define ATMEL_US_USMODE_RS485 1
19439 +#define ATMEL_US_USMODE_HWHS 2
19440 +#define ATMEL_US_USMODE_MODEM 3
19441 +#define ATMEL_US_USMODE_ISO7816_T0 4
19442 +#define ATMEL_US_USMODE_ISO7816_T1 6
19443 +#define ATMEL_US_USMODE_IRDA 8
19444 +#define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
19445 +#define ATMEL_US_USCLKS_MCK (0 << 4)
19446 +#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
19447 +#define ATMEL_US_USCLKS_SCK (3 << 4)
19448 +#define ATMEL_US_CHRL (3 << 6) /* Character Length */
19449 +#define ATMEL_US_CHRL_5 (0 << 6)
19450 +#define ATMEL_US_CHRL_6 (1 << 6)
19451 +#define ATMEL_US_CHRL_7 (2 << 6)
19452 +#define ATMEL_US_CHRL_8 (3 << 6)
19453 +#define ATMEL_US_SYNC (1 << 8) /* Synchronous Mode Select */
19454 +#define ATMEL_US_PAR (7 << 9) /* Parity Type */
19455 +#define ATMEL_US_PAR_EVEN (0 << 9)
19456 +#define ATMEL_US_PAR_ODD (1 << 9)
19457 +#define ATMEL_US_PAR_SPACE (2 << 9)
19458 +#define ATMEL_US_PAR_MARK (3 << 9)
19459 +#define ATMEL_US_PAR_NONE (4 << 9)
19460 +#define ATMEL_US_PAR_MULTI_DROP (6 << 9)
19461 +#define ATMEL_US_NBSTOP (3 << 12) /* Number of Stop Bits */
19462 +#define ATMEL_US_NBSTOP_1 (0 << 12)
19463 +#define ATMEL_US_NBSTOP_1_5 (1 << 12)
19464 +#define ATMEL_US_NBSTOP_2 (2 << 12)
19465 +#define ATMEL_US_CHMODE (3 << 14) /* Channel Mode */
19466 +#define ATMEL_US_CHMODE_NORMAL (0 << 14)
19467 +#define ATMEL_US_CHMODE_ECHO (1 << 14)
19468 +#define ATMEL_US_CHMODE_LOC_LOOP (2 << 14)
19469 +#define ATMEL_US_CHMODE_REM_LOOP (3 << 14)
19470 +#define ATMEL_US_MSBF (1 << 16) /* Bit Order */
19471 +#define ATMEL_US_MODE9 (1 << 17) /* 9-bit Character Length */
19472 +#define ATMEL_US_CLKO (1 << 18) /* Clock Output Select */
19473 +#define ATMEL_US_OVER (1 << 19) /* Oversampling Mode */
19474 +#define ATMEL_US_INACK (1 << 20) /* Inhibit Non Acknowledge */
19475 +#define ATMEL_US_DSNACK (1 << 21) /* Disable Successive NACK */
19476 +#define ATMEL_US_MAX_ITER (7 << 24) /* Max Iterations */
19477 +#define ATMEL_US_FILTER (1 << 28) /* Infrared Receive Line Filter */
19478 +
19479 +#define ATMEL_US_IER 0x08 /* Interrupt Enable Register */
19480 +#define ATMEL_US_RXRDY (1 << 0) /* Receiver Ready */
19481 +#define ATMEL_US_TXRDY (1 << 1) /* Transmitter Ready */
19482 +#define ATMEL_US_RXBRK (1 << 2) /* Break Received / End of Break */
19483 +#define ATMEL_US_ENDRX (1 << 3) /* End of Receiver Transfer */
19484 +#define ATMEL_US_ENDTX (1 << 4) /* End of Transmitter Transfer */
19485 +#define ATMEL_US_OVRE (1 << 5) /* Overrun Error */
19486 +#define ATMEL_US_FRAME (1 << 6) /* Framing Error */
19487 +#define ATMEL_US_PARE (1 << 7) /* Parity Error */
19488 +#define ATMEL_US_TIMEOUT (1 << 8) /* Receiver Time-out */
19489 +#define ATMEL_US_TXEMPTY (1 << 9) /* Transmitter Empty */
19490 +#define ATMEL_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */
19491 +#define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */
19492 +#define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */
19493 +#define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */
19494 +#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */
19495 +#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */
19496 +#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */
19497 +#define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */
19498 +#define ATMEL_US_RI (1 << 20) /* RI */
19499 +#define ATMEL_US_DSR (1 << 21) /* DSR */
19500 +#define ATMEL_US_DCD (1 << 22) /* DCD */
19501 +#define ATMEL_US_CTS (1 << 23) /* CTS */
19502 +
19503 +#define ATMEL_US_IDR 0x0c /* Interrupt Disable Register */
19504 +#define ATMEL_US_IMR 0x10 /* Interrupt Mask Register */
19505 +#define ATMEL_US_CSR 0x14 /* Channel Status Register */
19506 +#define ATMEL_US_RHR 0x18 /* Receiver Holding Register */
19507 +#define ATMEL_US_THR 0x1c /* Transmitter Holding Register */
19508 +#define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */
19509 +
19510 +#define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */
19511 +#define ATMEL_US_CD (0xffff << 0) /* Clock Divider */
19512 +
19513 +#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */
19514 +#define ATMEL_US_TO (0xffff << 0) /* Time-out Value */
19515 +
19516 +#define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */
19517 +#define ATMEL_US_TG (0xff << 0) /* Timeguard Value */
19518 +
19519 +#define ATMEL_US_FIDI 0x40 /* FI DI Ratio Register */
19520 +#define ATMEL_US_NER 0x44 /* Number of Errors Register */
19521 +#define ATMEL_US_IF 0x4c /* IrDA Filter Register */
19522 +
19523 +#endif
19524 Index: linux-2.6.24.7/include/linux/atmel_tc.h
19525 ===================================================================
19526 --- /dev/null
19527 +++ linux-2.6.24.7/include/linux/atmel_tc.h
19528 @@ -0,0 +1,252 @@
19529 +/*
19530 + * Timer/Counter Unit (TC) registers.
19531 + *
19532 + * This program is free software; you can redistribute it and/or modify
19533 + * it under the terms of the GNU General Public License as published by
19534 + * the Free Software Foundation; either version 2 of the License, or
19535 + * (at your option) any later version.
19536 + */
19537 +
19538 +#ifndef ATMEL_TC_H
19539 +#define ATMEL_TC_H
19540 +
19541 +#include <linux/compiler.h>
19542 +#include <linux/list.h>
19543 +
19544 +/*
19545 + * Many 32-bit Atmel SOCs include one or more TC blocks, each of which holds
19546 + * three general-purpose 16-bit timers. These timers share one register bank.
19547 + * Depending on the SOC, each timer may have its own clock and IRQ, or those
19548 + * may be shared by the whole TC block.
19549 + *
19550 + * These TC blocks may have up to nine external pins: TCLK0..2 signals for
19551 + * clocks or clock gates, and per-timer TIOA and TIOB signals used for PWM
19552 + * or triggering. Those pins need to be set up for use with the TC block,
19553 + * else they will be used as GPIOs or for a different controller.
19554 + *
19555 + * Although we expect each TC block to have a platform_device node, those
19556 + * nodes are not what drivers bind to. Instead, they ask for a specific
19557 + * TC block, by number ... which is a common approach on systems with many
19558 + * timers. Then they use clk_get() and platform_get_irq() to get clock and
19559 + * IRQ resources.
19560 + */
19561 +
19562 +struct clk;
19563 +
19564 +/**
19565 + * struct atmel_tc - information about a Timer/Counter Block
19566 + * @pdev: physical device
19567 + * @iomem: resource associated with the I/O register
19568 + * @regs: mapping through which the I/O registers can be accessed
19569 + * @irq: irq for each of the three channels
19570 + * @clk: internal clock source for each of the three channels
19571 + * @node: list node, for tclib internal use
19572 + *
19573 + * On some platforms, each TC channel has its own clocks and IRQs,
19574 + * while on others, all TC channels share the same clock and IRQ.
19575 + * Drivers should clk_enable() all the clocks they need even though
19576 + * all the entries in @clk may point to the same physical clock.
19577 + * Likewise, drivers should request irqs independently for each
19578 + * channel, but they must use IRQF_SHARED in case some of the entries
19579 + * in @irq are actually the same IRQ.
19580 + */
19581 +struct atmel_tc {
19582 + struct platform_device *pdev;
19583 + struct resource *iomem;
19584 + void __iomem *regs;
19585 + int irq[3];
19586 + struct clk *clk[3];
19587 + struct list_head node;
19588 +};
19589 +
19590 +extern struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name);
19591 +extern void atmel_tc_free(struct atmel_tc *tc);
19592 +
19593 +/* platform-specific ATMEL_TC_TIMER_CLOCKx divisors (0 means 32KiHz) */
19594 +extern const u8 atmel_tc_divisors[5];
19595 +
19596 +
19597 +/*
19598 + * Two registers have block-wide controls. These are: configuring the three
19599 + * "external" clocks (or event sources) used by the timer channels; and
19600 + * synchronizing the timers by resetting them all at once.
19601 + *
19602 + * "External" can mean "external to chip" using the TCLK0, TCLK1, or TCLK2
19603 + * signals. Or, it can mean "external to timer", using the TIOA output from
19604 + * one of the other two timers that's being run in waveform mode.
19605 + */
19606 +
19607 +#define ATMEL_TC_BCR 0xc0 /* TC Block Control Register */
19608 +#define ATMEL_TC_SYNC (1 << 0) /* synchronize timers */
19609 +
19610 +#define ATMEL_TC_BMR 0xc4 /* TC Block Mode Register */
19611 +#define ATMEL_TC_TC0XC0S (3 << 0) /* external clock 0 source */
19612 +#define ATMEL_TC_TC0XC0S_TCLK0 (0 << 0)
19613 +#define ATMEL_TC_TC0XC0S_NONE (1 << 0)
19614 +#define ATMEL_TC_TC0XC0S_TIOA1 (2 << 0)
19615 +#define ATMEL_TC_TC0XC0S_TIOA2 (3 << 0)
19616 +#define ATMEL_TC_TC1XC1S (3 << 2) /* external clock 1 source */
19617 +#define ATMEL_TC_TC1XC1S_TCLK1 (0 << 2)
19618 +#define ATMEL_TC_TC1XC1S_NONE (1 << 2)
19619 +#define ATMEL_TC_TC1XC1S_TIOA0 (2 << 2)
19620 +#define ATMEL_TC_TC1XC1S_TIOA2 (3 << 2)
19621 +#define ATMEL_TC_TC2XC2S (3 << 4) /* external clock 2 source */
19622 +#define ATMEL_TC_TC2XC2S_TCLK2 (0 << 4)
19623 +#define ATMEL_TC_TC2XC2S_NONE (1 << 4)
19624 +#define ATMEL_TC_TC2XC2S_TIOA0 (2 << 4)
19625 +#define ATMEL_TC_TC2XC2S_TIOA1 (3 << 4)
19626 +
19627 +
19628 +/*
19629 + * Each TC block has three "channels", each with one counter and controls.
19630 + *
19631 + * Note that the semantics of ATMEL_TC_TIMER_CLOCKx (input clock selection
19632 + * when it's not "external") is silicon-specific. AT91 platforms use one
19633 + * set of definitions; AVR32 platforms use a different set. Don't hard-wire
19634 + * such knowledge into your code, use the global "atmel_tc_divisors" ...
19635 + * where index N is the divisor for clock N+1, else zero to indicate it uses
19636 + * the 32 KiHz clock.
19637 + *
19638 + * The timers can be chained in various ways, and operated in "waveform"
19639 + * generation mode (including PWM) or "capture" mode (to time events). In
19640 + * both modes, behavior can be configured in many ways.
19641 + *
19642 + * Each timer has two I/O pins, TIOA and TIOB. Waveform mode uses TIOA as a
19643 + * PWM output, and TIOB as either another PWM or as a trigger. Capture mode
19644 + * uses them only as inputs.
19645 + */
19646 +#define ATMEL_TC_CHAN(idx) ((idx)*0x40)
19647 +#define ATMEL_TC_REG(idx, reg) (ATMEL_TC_CHAN(idx) + ATMEL_TC_ ## reg)
19648 +
19649 +#define ATMEL_TC_CCR 0x00 /* Channel Control Register */
19650 +#define ATMEL_TC_CLKEN (1 << 0) /* clock enable */
19651 +#define ATMEL_TC_CLKDIS (1 << 1) /* clock disable */
19652 +#define ATMEL_TC_SWTRG (1 << 2) /* software trigger */
19653 +
19654 +#define ATMEL_TC_CMR 0x04 /* Channel Mode Register */
19655 +
19656 +/* Both modes share some CMR bits */
19657 +#define ATMEL_TC_TCCLKS (7 << 0) /* clock source */
19658 +#define ATMEL_TC_TIMER_CLOCK1 (0 << 0)
19659 +#define ATMEL_TC_TIMER_CLOCK2 (1 << 0)
19660 +#define ATMEL_TC_TIMER_CLOCK3 (2 << 0)
19661 +#define ATMEL_TC_TIMER_CLOCK4 (3 << 0)
19662 +#define ATMEL_TC_TIMER_CLOCK5 (4 << 0)
19663 +#define ATMEL_TC_XC0 (5 << 0)
19664 +#define ATMEL_TC_XC1 (6 << 0)
19665 +#define ATMEL_TC_XC2 (7 << 0)
19666 +#define ATMEL_TC_CLKI (1 << 3) /* clock invert */
19667 +#define ATMEL_TC_BURST (3 << 4) /* clock gating */
19668 +#define ATMEL_TC_GATE_NONE (0 << 4)
19669 +#define ATMEL_TC_GATE_XC0 (1 << 4)
19670 +#define ATMEL_TC_GATE_XC1 (2 << 4)
19671 +#define ATMEL_TC_GATE_XC2 (3 << 4)
19672 +#define ATMEL_TC_WAVE (1 << 15) /* true = Waveform mode */
19673 +
19674 +/* CAPTURE mode CMR bits */
19675 +#define ATMEL_TC_LDBSTOP (1 << 6) /* counter stops on RB load */
19676 +#define ATMEL_TC_LDBDIS (1 << 7) /* counter disable on RB load */
19677 +#define ATMEL_TC_ETRGEDG (3 << 8) /* external trigger edge */
19678 +#define ATMEL_TC_ETRGEDG_NONE (0 << 8)
19679 +#define ATMEL_TC_ETRGEDG_RISING (1 << 8)
19680 +#define ATMEL_TC_ETRGEDG_FALLING (2 << 8)
19681 +#define ATMEL_TC_ETRGEDG_BOTH (3 << 8)
19682 +#define ATMEL_TC_ABETRG (1 << 10) /* external trigger is TIOA? */
19683 +#define ATMEL_TC_CPCTRG (1 << 14) /* RC compare trigger enable */
19684 +#define ATMEL_TC_LDRA (3 << 16) /* RA loading edge (of TIOA) */
19685 +#define ATMEL_TC_LDRA_NONE (0 << 16)
19686 +#define ATMEL_TC_LDRA_RISING (1 << 16)
19687 +#define ATMEL_TC_LDRA_FALLING (2 << 16)
19688 +#define ATMEL_TC_LDRA_BOTH (3 << 16)
19689 +#define ATMEL_TC_LDRB (3 << 18) /* RB loading edge (of TIOA) */
19690 +#define ATMEL_TC_LDRB_NONE (0 << 18)
19691 +#define ATMEL_TC_LDRB_RISING (1 << 18)
19692 +#define ATMEL_TC_LDRB_FALLING (2 << 18)
19693 +#define ATMEL_TC_LDRB_BOTH (3 << 18)
19694 +
19695 +/* WAVEFORM mode CMR bits */
19696 +#define ATMEL_TC_CPCSTOP (1 << 6) /* RC compare stops counter */
19697 +#define ATMEL_TC_CPCDIS (1 << 7) /* RC compare disables counter */
19698 +#define ATMEL_TC_EEVTEDG (3 << 8) /* external event edge */
19699 +#define ATMEL_TC_EEVTEDG_NONE (0 << 8)
19700 +#define ATMEL_TC_EEVTEDG_RISING (1 << 8)
19701 +#define ATMEL_TC_EEVTEDG_FALLING (2 << 8)
19702 +#define ATMEL_TC_EEVTEDG_BOTH (3 << 8)
19703 +#define ATMEL_TC_EEVT (3 << 10) /* external event source */
19704 +#define ATMEL_TC_EEVT_TIOB (0 << 10)
19705 +#define ATMEL_TC_EEVT_XC0 (1 << 10)
19706 +#define ATMEL_TC_EEVT_XC1 (2 << 10)
19707 +#define ATMEL_TC_EEVT_XC2 (3 << 10)
19708 +#define ATMEL_TC_ENETRG (1 << 12) /* external event is trigger */
19709 +#define ATMEL_TC_WAVESEL (3 << 13) /* waveform type */
19710 +#define ATMEL_TC_WAVESEL_UP (0 << 13)
19711 +#define ATMEL_TC_WAVESEL_UPDOWN (1 << 13)
19712 +#define ATMEL_TC_WAVESEL_UP_AUTO (2 << 13)
19713 +#define ATMEL_TC_WAVESEL_UPDOWN_AUTO (3 << 13)
19714 +#define ATMEL_TC_ACPA (3 << 16) /* RA compare changes TIOA */
19715 +#define ATMEL_TC_ACPA_NONE (0 << 16)
19716 +#define ATMEL_TC_ACPA_SET (1 << 16)
19717 +#define ATMEL_TC_ACPA_CLEAR (2 << 16)
19718 +#define ATMEL_TC_ACPA_TOGGLE (3 << 16)
19719 +#define ATMEL_TC_ACPC (3 << 18) /* RC compare changes TIOA */
19720 +#define ATMEL_TC_ACPC_NONE (0 << 18)
19721 +#define ATMEL_TC_ACPC_SET (1 << 18)
19722 +#define ATMEL_TC_ACPC_CLEAR (2 << 18)
19723 +#define ATMEL_TC_ACPC_TOGGLE (3 << 18)
19724 +#define ATMEL_TC_AEEVT (3 << 20) /* external event changes TIOA */
19725 +#define ATMEL_TC_AEEVT_NONE (0 << 20)
19726 +#define ATMEL_TC_AEEVT_SET (1 << 20)
19727 +#define ATMEL_TC_AEEVT_CLEAR (2 << 20)
19728 +#define ATMEL_TC_AEEVT_TOGGLE (3 << 20)
19729 +#define ATMEL_TC_ASWTRG (3 << 22) /* software trigger changes TIOA */
19730 +#define ATMEL_TC_ASWTRG_NONE (0 << 22)
19731 +#define ATMEL_TC_ASWTRG_SET (1 << 22)
19732 +#define ATMEL_TC_ASWTRG_CLEAR (2 << 22)
19733 +#define ATMEL_TC_ASWTRG_TOGGLE (3 << 22)
19734 +#define ATMEL_TC_BCPB (3 << 24) /* RB compare changes TIOB */
19735 +#define ATMEL_TC_BCPB_NONE (0 << 24)
19736 +#define ATMEL_TC_BCPB_SET (1 << 24)
19737 +#define ATMEL_TC_BCPB_CLEAR (2 << 24)
19738 +#define ATMEL_TC_BCPB_TOGGLE (3 << 24)
19739 +#define ATMEL_TC_BCPC (3 << 26) /* RC compare changes TIOB */
19740 +#define ATMEL_TC_BCPC_NONE (0 << 26)
19741 +#define ATMEL_TC_BCPC_SET (1 << 26)
19742 +#define ATMEL_TC_BCPC_CLEAR (2 << 26)
19743 +#define ATMEL_TC_BCPC_TOGGLE (3 << 26)
19744 +#define ATMEL_TC_BEEVT (3 << 28) /* external event changes TIOB */
19745 +#define ATMEL_TC_BEEVT_NONE (0 << 28)
19746 +#define ATMEL_TC_BEEVT_SET (1 << 28)
19747 +#define ATMEL_TC_BEEVT_CLEAR (2 << 28)
19748 +#define ATMEL_TC_BEEVT_TOGGLE (3 << 28)
19749 +#define ATMEL_TC_BSWTRG (3 << 30) /* software trigger changes TIOB */
19750 +#define ATMEL_TC_BSWTRG_NONE (0 << 30)
19751 +#define ATMEL_TC_BSWTRG_SET (1 << 30)
19752 +#define ATMEL_TC_BSWTRG_CLEAR (2 << 30)
19753 +#define ATMEL_TC_BSWTRG_TOGGLE (3 << 30)
19754 +
19755 +#define ATMEL_TC_CV 0x10 /* counter Value */
19756 +#define ATMEL_TC_RA 0x14 /* register A */
19757 +#define ATMEL_TC_RB 0x18 /* register B */
19758 +#define ATMEL_TC_RC 0x1c /* register C */
19759 +
19760 +#define ATMEL_TC_SR 0x20 /* status (read-only) */
19761 +/* Status-only flags */
19762 +#define ATMEL_TC_CLKSTA (1 << 16) /* clock enabled */
19763 +#define ATMEL_TC_MTIOA (1 << 17) /* TIOA mirror */
19764 +#define ATMEL_TC_MTIOB (1 << 18) /* TIOB mirror */
19765 +
19766 +#define ATMEL_TC_IER 0x24 /* interrupt enable (write-only) */
19767 +#define ATMEL_TC_IDR 0x28 /* interrupt disable (write-only) */
19768 +#define ATMEL_TC_IMR 0x2c /* interrupt mask (read-only) */
19769 +
19770 +/* Status and IRQ flags */
19771 +#define ATMEL_TC_COVFS (1 << 0) /* counter overflow */
19772 +#define ATMEL_TC_LOVRS (1 << 1) /* load overrun */
19773 +#define ATMEL_TC_CPAS (1 << 2) /* RA compare */
19774 +#define ATMEL_TC_CPBS (1 << 3) /* RB compare */
19775 +#define ATMEL_TC_CPCS (1 << 4) /* RC compare */
19776 +#define ATMEL_TC_LDRAS (1 << 5) /* RA loading */
19777 +#define ATMEL_TC_LDRBS (1 << 6) /* RB loading */
19778 +#define ATMEL_TC_ETRGS (1 << 7) /* external trigger */
19779 +
19780 +#endif
19781 Index: linux-2.6.24.7/include/linux/usb/atmel_usba_udc.h
19782 ===================================================================
19783 --- /dev/null
19784 +++ linux-2.6.24.7/include/linux/usb/atmel_usba_udc.h
19785 @@ -0,0 +1,22 @@
19786 +/*
19787 + * Platform data definitions for Atmel USBA gadget driver.
19788 + */
19789 +#ifndef __LINUX_USB_USBA_H
19790 +#define __LINUX_USB_USBA_H
19791 +
19792 +struct usba_ep_data {
19793 + char *name;
19794 + int index;
19795 + int fifo_size;
19796 + int nr_banks;
19797 + int can_dma;
19798 + int can_isoc;
19799 +};
19800 +
19801 +struct usba_platform_data {
19802 + int vbus_pin;
19803 + int num_ep;
19804 + struct usba_ep_data ep[0];
19805 +};
19806 +
19807 +#endif /* __LINUX_USB_USBA_H */
19808 Index: linux-2.6.24.7/include/video/atmel_lcdc.h
19809 ===================================================================
19810 --- linux-2.6.24.7.orig/include/video/atmel_lcdc.h
19811 +++ linux-2.6.24.7/include/video/atmel_lcdc.h
19812 @@ -22,7 +22,7 @@
19813 #ifndef __ATMEL_LCDC_H__
19814 #define __ATMEL_LCDC_H__
19815
19816 - /* LCD Controller info data structure */
19817 + /* LCD Controller info data structure, stored in device platform_data */
19818 struct atmel_lcdfb_info {
19819 spinlock_t lock;
19820 struct fb_info *info;
19821 @@ -33,7 +33,14 @@ struct atmel_lcdfb_info {
19822 struct platform_device *pdev;
19823 struct clk *bus_clk;
19824 struct clk *lcdc_clk;
19825 - unsigned int default_bpp;
19826 +
19827 +#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
19828 + struct backlight_device *backlight;
19829 + u8 bl_power;
19830 +#endif
19831 + bool lcdcon_is_backlight;
19832 +
19833 + u8 default_bpp;
19834 unsigned int default_lcdcon2;
19835 unsigned int default_dmacon;
19836 void (*atmel_lcdfb_power_control)(int on);
19837 @@ -115,20 +122,20 @@ struct atmel_lcdfb_info {
19838 #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
19839
19840 #define ATMEL_LCDC_TIM1 0x0808
19841 -#define ATMEL_LCDC_VFP (0xff << 0)
19842 +#define ATMEL_LCDC_VFP (0xffU << 0)
19843 #define ATMEL_LCDC_VBP_OFFSET 8
19844 -#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET)
19845 +#define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET)
19846 #define ATMEL_LCDC_VPW_OFFSET 16
19847 -#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET)
19848 +#define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET)
19849 #define ATMEL_LCDC_VHDLY_OFFSET 24
19850 -#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET)
19851 +#define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET)
19852
19853 #define ATMEL_LCDC_TIM2 0x080c
19854 -#define ATMEL_LCDC_HBP (0xff << 0)
19855 +#define ATMEL_LCDC_HBP (0xffU << 0)
19856 #define ATMEL_LCDC_HPW_OFFSET 8
19857 -#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET)
19858 +#define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET)
19859 #define ATMEL_LCDC_HFP_OFFSET 21
19860 -#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET)
19861 +#define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
19862
19863 #define ATMEL_LCDC_LCDFRMCFG 0x0810
19864 #define ATMEL_LCDC_LINEVAL (0x7ff << 0)
19865 Index: linux-2.6.24.7/init/do_mounts.c
19866 ===================================================================
19867 --- linux-2.6.24.7.orig/init/do_mounts.c
19868 +++ linux-2.6.24.7/init/do_mounts.c
19869 @@ -219,8 +219,14 @@ __setup("root=", root_dev_setup);
19870
19871 static int __init rootwait_setup(char *str)
19872 {
19873 - if (*str)
19874 + if (*str && *str != '=')
19875 return 0;
19876 +
19877 + if (*str)
19878 + printk(KERN_WARNING
19879 + "WARNING: \"rootwait=1\" is deprecated, "
19880 + "use \"rootwait\" instead.\n");
19881 +
19882 root_wait = 1;
19883 return 1;
19884 }
19885 Index: linux-2.6.24.7/kernel/ptrace.c
19886 ===================================================================
19887 --- linux-2.6.24.7.orig/kernel/ptrace.c
19888 +++ linux-2.6.24.7/kernel/ptrace.c
19889 @@ -470,6 +470,8 @@ asmlinkage long sys_ptrace(long request,
19890 lock_kernel();
19891 if (request == PTRACE_TRACEME) {
19892 ret = ptrace_traceme();
19893 + if (!ret)
19894 + arch_ptrace_attach(current);
19895 goto out;
19896 }
19897
19898 Index: linux-2.6.24.7/MAINTAINERS
19899 ===================================================================
19900 --- linux-2.6.24.7.orig/MAINTAINERS
19901 +++ linux-2.6.24.7/MAINTAINERS
19902 @@ -671,6 +671,12 @@ W: http://www.atmel.com/products/AT91/
19903 W: http://www.at91.com/
19904 S: Maintained
19905
19906 +ATMEL AT91 / AT32 SERIAL DRIVER
19907 +P: Haavard Skinnemoen
19908 +M: hskinnemoen@atmel.com
19909 +L: linux-kernel@vger.kernel.org
19910 +S: Supported
19911 +
19912 ATMEL LCDFB DRIVER
19913 P: Nicolas Ferre
19914 M: nicolas.ferre@atmel.com
19915 Index: linux-2.6.24.7/sound/avr32/ac97c.c
19916 ===================================================================
19917 --- /dev/null
19918 +++ linux-2.6.24.7/sound/avr32/ac97c.c
19919 @@ -0,0 +1,914 @@
19920 +/*
19921 + * Driver for the Atmel AC97 controller
19922 + *
19923 + * Copyright (C) 2005-2007 Atmel Corporation
19924 + *
19925 + * This program is free software; you can redistribute it and/or modify it
19926 + * under the terms of the GNU General Public License version 2 as published by
19927 + * the Free Software Foundation.
19928 + */
19929 +#include <linux/clk.h>
19930 +#include <linux/delay.h>
19931 +#include <linux/dma-mapping.h>
19932 +#include <linux/init.h>
19933 +#include <linux/interrupt.h>
19934 +#include <linux/module.h>
19935 +#include <linux/platform_device.h>
19936 +#include <linux/mutex.h>
19937 +#include <linux/io.h>
19938 +
19939 +#include <sound/driver.h>
19940 +#include <sound/core.h>
19941 +#include <sound/initval.h>
19942 +#include <sound/pcm.h>
19943 +#include <sound/pcm_params.h>
19944 +#include <sound/ac97_codec.h>
19945 +#include <sound/memalloc.h>
19946 +
19947 +#include <asm/dma-controller.h>
19948 +
19949 +#include "ac97c.h"
19950 +
19951 +/* Serialize access to opened */
19952 +static DEFINE_MUTEX(opened_mutex);
19953 +
19954 +struct atmel_ac97_dma_info {
19955 + struct dma_request_cyclic req_tx;
19956 + struct dma_request_cyclic req_rx;
19957 + unsigned short rx_periph_id;
19958 + unsigned short tx_periph_id;
19959 +};
19960 +
19961 +struct atmel_ac97 {
19962 + /* Serialize access to opened */
19963 + spinlock_t lock;
19964 + void __iomem *regs;
19965 + struct snd_pcm_substream *playback_substream;
19966 + struct snd_pcm_substream *capture_substream;
19967 + struct snd_card *card;
19968 + struct snd_pcm *pcm;
19969 + struct snd_ac97 *ac97;
19970 + struct snd_ac97_bus *ac97_bus;
19971 + int opened;
19972 + int period;
19973 + u64 cur_format;
19974 + unsigned int cur_rate;
19975 + struct clk *mck;
19976 + struct platform_device *pdev;
19977 + struct atmel_ac97_dma_info dma;
19978 +};
19979 +
19980 +#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
19981 +
19982 +#define ac97c_writel(chip, reg, val) \
19983 + __raw_writel((val), (chip)->regs + AC97C_##reg)
19984 +#define ac97c_readl(chip, reg) \
19985 + __raw_readl((chip)->regs + AC97C_##reg)
19986 +
19987 +/*
19988 + * PCM part
19989 + */
19990 +static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
19991 + .info = (SNDRV_PCM_INFO_INTERLEAVED
19992 + | SNDRV_PCM_INFO_MMAP
19993 + | SNDRV_PCM_INFO_MMAP_VALID
19994 + | SNDRV_PCM_INFO_BLOCK_TRANSFER
19995 + | SNDRV_PCM_INFO_JOINT_DUPLEX),
19996 + .formats = (SNDRV_PCM_FMTBIT_S16_BE
19997 + | SNDRV_PCM_FMTBIT_S16_LE),
19998 + .rates = (SNDRV_PCM_RATE_CONTINUOUS),
19999 + .rate_min = 4000,
20000 + .rate_max = 48000,
20001 + .channels_min = 1,
20002 + .channels_max = 6,
20003 + .buffer_bytes_max = 64*1024,
20004 + .period_bytes_min = 512,
20005 + .period_bytes_max = 4095,
20006 + .periods_min = 8,
20007 + .periods_max = 1024,
20008 +};
20009 +
20010 +static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
20011 + .info = (SNDRV_PCM_INFO_INTERLEAVED
20012 + | SNDRV_PCM_INFO_MMAP
20013 + | SNDRV_PCM_INFO_MMAP_VALID
20014 + | SNDRV_PCM_INFO_BLOCK_TRANSFER
20015 + | SNDRV_PCM_INFO_JOINT_DUPLEX),
20016 + .formats = (SNDRV_PCM_FMTBIT_S16_BE
20017 + | SNDRV_PCM_FMTBIT_S16_LE),
20018 + .rates = (SNDRV_PCM_RATE_CONTINUOUS),
20019 + .rate_min = 4000,
20020 + .rate_max = 48000,
20021 + .channels_min = 1,
20022 + .channels_max = 2,
20023 + .buffer_bytes_max = 64*1024,
20024 + .period_bytes_min = 512,
20025 + .period_bytes_max = 4095,
20026 + .periods_min = 8,
20027 + .periods_max = 1024,
20028 +};
20029 +
20030 +/*
20031 + * PCM functions
20032 + */
20033 +static int
20034 +snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
20035 +{
20036 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20037 + struct snd_pcm_runtime *runtime = substream->runtime;
20038 +
20039 + mutex_lock(&opened_mutex);
20040 + chip->opened++;
20041 + runtime->hw = snd_atmel_ac97_playback_hw;
20042 + if (chip->cur_rate) {
20043 + runtime->hw.rate_min = chip->cur_rate;
20044 + runtime->hw.rate_max = chip->cur_rate;
20045 + }
20046 + if (chip->cur_format)
20047 + runtime->hw.formats = (1ULL << chip->cur_format);
20048 + mutex_unlock(&opened_mutex);
20049 + chip->playback_substream = substream;
20050 + chip->period = 0;
20051 + return 0;
20052 +}
20053 +
20054 +static int
20055 +snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
20056 +{
20057 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20058 + struct snd_pcm_runtime *runtime = substream->runtime;
20059 +
20060 + mutex_lock(&opened_mutex);
20061 + chip->opened++;
20062 + runtime->hw = snd_atmel_ac97_capture_hw;
20063 + if (chip->cur_rate) {
20064 + runtime->hw.rate_min = chip->cur_rate;
20065 + runtime->hw.rate_max = chip->cur_rate;
20066 + }
20067 + if (chip->cur_format)
20068 + runtime->hw.formats = (1ULL << chip->cur_format);
20069 + mutex_unlock(&opened_mutex);
20070 + chip->capture_substream = substream;
20071 + chip->period = 0;
20072 + return 0;
20073 +}
20074 +
20075 +static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
20076 +{
20077 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20078 + mutex_lock(&opened_mutex);
20079 + chip->opened--;
20080 + if (!chip->opened) {
20081 + chip->cur_rate = 0;
20082 + chip->cur_format = 0;
20083 + }
20084 + mutex_unlock(&opened_mutex);
20085 + return 0;
20086 +}
20087 +
20088 +static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
20089 +{
20090 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20091 + mutex_lock(&opened_mutex);
20092 + chip->opened--;
20093 + if (!chip->opened) {
20094 + chip->cur_rate = 0;
20095 + chip->cur_format = 0;
20096 + }
20097 + mutex_unlock(&opened_mutex);
20098 + return 0;
20099 +}
20100 +
20101 +static int
20102 +snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
20103 + struct snd_pcm_hw_params *hw_params)
20104 +{
20105 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20106 + int err;
20107 +
20108 + err = snd_pcm_lib_malloc_pages(substream,
20109 + params_buffer_bytes(hw_params));
20110 + if (err < 0)
20111 + return err;
20112 +
20113 + /* Set restrictions to params */
20114 + mutex_lock(&opened_mutex);
20115 + chip->cur_rate = params_rate(hw_params);
20116 + chip->cur_format = params_format(hw_params);
20117 + mutex_unlock(&opened_mutex);
20118 +
20119 + return 0;
20120 +}
20121 +
20122 +static int
20123 +snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
20124 + struct snd_pcm_hw_params *hw_params)
20125 +{
20126 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20127 + int err;
20128 +
20129 + err = snd_pcm_lib_malloc_pages(substream,
20130 + params_buffer_bytes(hw_params));
20131 + if (err < 0)
20132 + return err;
20133 +
20134 + /* Set restrictions to params */
20135 + mutex_lock(&opened_mutex);
20136 + chip->cur_rate = params_rate(hw_params);
20137 + chip->cur_format = params_format(hw_params);
20138 + mutex_unlock(&opened_mutex);
20139 +
20140 + return 0;
20141 +}
20142 +
20143 +static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
20144 +{
20145 + return snd_pcm_lib_free_pages(substream);
20146 +}
20147 +
20148 +static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
20149 +{
20150 +
20151 + return snd_pcm_lib_free_pages(substream);
20152 +}
20153 +
20154 +static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
20155 +{
20156 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20157 + struct platform_device *pdev = chip->pdev;
20158 + struct snd_pcm_runtime *runtime = substream->runtime;
20159 + int block_size = frames_to_bytes(runtime, runtime->period_size);
20160 + unsigned long word = 0;
20161 + unsigned long buffer_size = 0;
20162 +
20163 + dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
20164 + block_size * 2, DMA_TO_DEVICE);
20165 +
20166 + /* Assign slots to channels */
20167 + switch (substream->runtime->channels) {
20168 + case 1:
20169 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
20170 + break;
20171 + case 2:
20172 + /* Assign Left and Right slot to Channel A */
20173 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
20174 + | AC97C_CH_ASSIGN(PCM_RIGHT, A);
20175 + break;
20176 + default:
20177 + /* TODO: support more than two channels */
20178 + return -EINVAL;
20179 + break;
20180 + }
20181 + ac97c_writel(chip, OCA, word);
20182 +
20183 + /* Configure sample format and size */
20184 + word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
20185 +
20186 + switch (runtime->format) {
20187 + case SNDRV_PCM_FORMAT_S16_LE:
20188 + word |= AC97C_CMR_CEM_LITTLE;
20189 + break;
20190 + case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
20191 + default:
20192 + word &= ~AC97C_CMR_CEM_LITTLE;
20193 + break;
20194 + }
20195 +
20196 + ac97c_writel(chip, CAMR, word);
20197 +
20198 + /* Set variable rate if needed */
20199 + if (runtime->rate != 48000) {
20200 + word = ac97c_readl(chip, MR);
20201 + word |= AC97C_MR_VRA;
20202 + ac97c_writel(chip, MR, word);
20203 + } else {
20204 + /* Clear Variable Rate Bit */
20205 + word = ac97c_readl(chip, MR);
20206 + word &= ~AC97C_MR_VRA;
20207 + ac97c_writel(chip, MR, word);
20208 + }
20209 +
20210 + /* Set rate */
20211 + snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
20212 +
20213 + buffer_size = frames_to_bytes(runtime, runtime->period_size) *
20214 + runtime->periods;
20215 +
20216 + chip->dma.req_tx.buffer_size = buffer_size;
20217 + chip->dma.req_tx.periods = runtime->periods;
20218 +
20219 + BUG_ON(chip->dma.req_tx.buffer_size !=
20220 + (chip->dma.req_tx.periods *
20221 + frames_to_bytes(runtime, runtime->period_size)));
20222 +
20223 + chip->dma.req_tx.buffer_start = runtime->dma_addr;
20224 + chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
20225 + chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
20226 + chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
20227 + chip->dma.req_tx.width = DMA_WIDTH_16BIT;
20228 + chip->dma.req_tx.dev_id = chip;
20229 +
20230 + return 0;
20231 +}
20232 +
20233 +static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
20234 +{
20235 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20236 + struct platform_device *pdev = chip->pdev;
20237 + struct snd_pcm_runtime *runtime = substream->runtime;
20238 + int block_size = frames_to_bytes(runtime, runtime->period_size);
20239 + unsigned long word = 0;
20240 + unsigned long buffer_size = 0;
20241 +
20242 + dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
20243 + block_size * 2, DMA_FROM_DEVICE);
20244 +
20245 + /* Assign slots to channels */
20246 + switch (substream->runtime->channels) {
20247 + case 1:
20248 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
20249 + break;
20250 + case 2:
20251 + /* Assign Left and Right slot to Channel A */
20252 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
20253 + | AC97C_CH_ASSIGN(PCM_RIGHT, A);
20254 + break;
20255 + default:
20256 + /* TODO: support more than two channels */
20257 + return -EINVAL;
20258 + break;
20259 + }
20260 + ac97c_writel(chip, ICA, word);
20261 +
20262 + /* Configure sample format and size */
20263 + word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
20264 +
20265 + switch (runtime->format) {
20266 + case SNDRV_PCM_FORMAT_S16_LE:
20267 + word |= AC97C_CMR_CEM_LITTLE;
20268 + break;
20269 + case SNDRV_PCM_FORMAT_S16_BE:
20270 + default:
20271 + word &= ~(AC97C_CMR_CEM_LITTLE);
20272 + break;
20273 + }
20274 +
20275 + ac97c_writel(chip, CAMR, word);
20276 +
20277 + /* Set variable rate if needed */
20278 + if (runtime->rate != 48000) {
20279 + word = ac97c_readl(chip, MR);
20280 + word |= AC97C_MR_VRA;
20281 + ac97c_writel(chip, MR, word);
20282 + } else {
20283 + /* Clear Variable Rate Bit */
20284 + word = ac97c_readl(chip, MR);
20285 + word &= ~(AC97C_MR_VRA);
20286 + ac97c_writel(chip, MR, word);
20287 + }
20288 +
20289 + /* Set rate */
20290 + snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
20291 +
20292 + buffer_size = frames_to_bytes(runtime, runtime->period_size) *
20293 + runtime->periods;
20294 +
20295 + chip->dma.req_rx.buffer_size = buffer_size;
20296 + chip->dma.req_rx.periods = runtime->periods;
20297 +
20298 + BUG_ON(chip->dma.req_rx.buffer_size !=
20299 + (chip->dma.req_rx.periods *
20300 + frames_to_bytes(runtime, runtime->period_size)));
20301 +
20302 + chip->dma.req_rx.buffer_start = runtime->dma_addr;
20303 + chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
20304 + chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
20305 + chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
20306 + chip->dma.req_rx.width = DMA_WIDTH_16BIT;
20307 + chip->dma.req_rx.dev_id = chip;
20308 +
20309 + return 0;
20310 +}
20311 +
20312 + static int
20313 +snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
20314 +{
20315 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20316 + unsigned long camr;
20317 + int flags, err = 0;
20318 +
20319 + spin_lock_irqsave(&chip->lock, flags);
20320 + camr = ac97c_readl(chip, CAMR);
20321 +
20322 + switch (cmd) {
20323 + case SNDRV_PCM_TRIGGER_START:
20324 + err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
20325 + &chip->dma.req_tx);
20326 + dma_start_request(chip->dma.req_tx.req.dmac,
20327 + chip->dma.req_tx.req.channel);
20328 + camr |= AC97C_CMR_CENA;
20329 + break;
20330 + case SNDRV_PCM_TRIGGER_STOP:
20331 + err = dma_stop_request(chip->dma.req_tx.req.dmac,
20332 + chip->dma.req_tx.req.channel);
20333 + if (chip->opened <= 1)
20334 + camr &= ~AC97C_CMR_CENA;
20335 + break;
20336 + default:
20337 + err = -EINVAL;
20338 + break;
20339 + }
20340 +
20341 + ac97c_writel(chip, CAMR, camr);
20342 +
20343 + spin_unlock_irqrestore(&chip->lock, flags);
20344 + return err;
20345 +}
20346 +
20347 + static int
20348 +snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
20349 +{
20350 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20351 + unsigned long camr;
20352 + int flags, err = 0;
20353 +
20354 + spin_lock_irqsave(&chip->lock, flags);
20355 + camr = ac97c_readl(chip, CAMR);
20356 +
20357 + switch (cmd) {
20358 + case SNDRV_PCM_TRIGGER_START:
20359 + err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
20360 + &chip->dma.req_rx);
20361 + dma_start_request(chip->dma.req_rx.req.dmac,
20362 + chip->dma.req_rx.req.channel);
20363 + camr |= AC97C_CMR_CENA;
20364 + break;
20365 + case SNDRV_PCM_TRIGGER_STOP:
20366 + err = dma_stop_request(chip->dma.req_rx.req.dmac,
20367 + chip->dma.req_rx.req.channel);
20368 + mutex_lock(&opened_mutex);
20369 + if (chip->opened <= 1)
20370 + camr &= ~AC97C_CMR_CENA;
20371 + mutex_unlock(&opened_mutex);
20372 + break;
20373 + default:
20374 + err = -EINVAL;
20375 + break;
20376 + }
20377 +
20378 + ac97c_writel(chip, CAMR, camr);
20379 +
20380 + spin_unlock_irqrestore(&chip->lock, flags);
20381 + return err;
20382 +}
20383 +
20384 + static snd_pcm_uframes_t
20385 +snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
20386 +{
20387 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20388 + struct snd_pcm_runtime *runtime = substream->runtime;
20389 + snd_pcm_uframes_t pos;
20390 + unsigned long bytes;
20391 +
20392 + bytes = (dma_get_current_pos
20393 + (chip->dma.req_tx.req.dmac,
20394 + chip->dma.req_tx.req.channel) - runtime->dma_addr);
20395 + pos = bytes_to_frames(runtime, bytes);
20396 + if (pos >= runtime->buffer_size)
20397 + pos -= runtime->buffer_size;
20398 +
20399 + return pos;
20400 +}
20401 +
20402 + static snd_pcm_uframes_t
20403 +snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
20404 +{
20405 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20406 + struct snd_pcm_runtime *runtime = substream->runtime;
20407 + snd_pcm_uframes_t pos;
20408 + unsigned long bytes;
20409 +
20410 + bytes = (dma_get_current_pos
20411 + (chip->dma.req_rx.req.dmac,
20412 + chip->dma.req_rx.req.channel)
20413 + - runtime->dma_addr);
20414 + pos = bytes_to_frames(runtime, bytes);
20415 + if (pos >= runtime->buffer_size)
20416 + pos -= runtime->buffer_size;
20417 +
20418 +
20419 + return pos;
20420 +}
20421 +
20422 +static struct snd_pcm_ops atmel_ac97_playback_ops = {
20423 + .open = snd_atmel_ac97_playback_open,
20424 + .close = snd_atmel_ac97_playback_close,
20425 + .ioctl = snd_pcm_lib_ioctl,
20426 + .hw_params = snd_atmel_ac97_playback_hw_params,
20427 + .hw_free = snd_atmel_ac97_playback_hw_free,
20428 + .prepare = snd_atmel_ac97_playback_prepare,
20429 + .trigger = snd_atmel_ac97_playback_trigger,
20430 + .pointer = snd_atmel_ac97_playback_pointer,
20431 +};
20432 +
20433 +static struct snd_pcm_ops atmel_ac97_capture_ops = {
20434 + .open = snd_atmel_ac97_capture_open,
20435 + .close = snd_atmel_ac97_capture_close,
20436 + .ioctl = snd_pcm_lib_ioctl,
20437 + .hw_params = snd_atmel_ac97_capture_hw_params,
20438 + .hw_free = snd_atmel_ac97_capture_hw_free,
20439 + .prepare = snd_atmel_ac97_capture_prepare,
20440 + .trigger = snd_atmel_ac97_capture_trigger,
20441 + .pointer = snd_atmel_ac97_capture_pointer,
20442 +};
20443 +
20444 +static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
20445 + /* Playback */
20446 + {
20447 + .exclusive = 1,
20448 + .r = { {
20449 + .slots = ((1 << AC97_SLOT_PCM_LEFT)
20450 + | (1 << AC97_SLOT_PCM_RIGHT)
20451 + | (1 << AC97_SLOT_PCM_CENTER)
20452 + | (1 << AC97_SLOT_PCM_SLEFT)
20453 + | (1 << AC97_SLOT_PCM_SRIGHT)
20454 + | (1 << AC97_SLOT_LFE)),
20455 + } }
20456 + },
20457 + /* PCM in */
20458 + {
20459 + .stream = 1,
20460 + .exclusive = 1,
20461 + .r = { {
20462 + .slots = ((1 << AC97_SLOT_PCM_LEFT)
20463 + | (1 << AC97_SLOT_PCM_RIGHT)),
20464 + } }
20465 + },
20466 + /* Mic in */
20467 + {
20468 + .stream = 1,
20469 + .exclusive = 1,
20470 + .r = { {
20471 + .slots = (1<<AC97_SLOT_MIC),
20472 + } }
20473 + },
20474 +};
20475 +
20476 +static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
20477 +{
20478 + struct snd_pcm *pcm;
20479 + int err;
20480 +
20481 + err = snd_ac97_pcm_assign(chip->ac97_bus,
20482 + ARRAY_SIZE(atmel_ac97_pcm_defs),
20483 + atmel_ac97_pcm_defs);
20484 + if (err)
20485 + return err;
20486 +
20487 + err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
20488 + if (err)
20489 + return err;
20490 +
20491 + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
20492 + &atmel_ac97_playback_ops);
20493 +
20494 + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
20495 + &atmel_ac97_capture_ops);
20496 +
20497 + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
20498 + &chip->pdev->dev,
20499 + 128 * 1024, 128 * 1024);
20500 +
20501 + pcm->private_data = chip;
20502 + pcm->info_flags = 0;
20503 + strcpy(pcm->name, "Atmel-AC97");
20504 + chip->pcm = pcm;
20505 +
20506 + return 0;
20507 +}
20508 +
20509 +/*
20510 + * Mixer part.
20511 + */
20512 +static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
20513 +{
20514 + int err;
20515 + struct snd_ac97_template template;
20516 +
20517 + memset(&template, 0, sizeof(template));
20518 + template.private_data = chip;
20519 + err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
20520 +
20521 + return err;
20522 +}
20523 +
20524 +static void atmel_ac97_error(struct dma_request *_req)
20525 +{
20526 + struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
20527 + struct atmel_ac97 *chip = req->dev_id;
20528 +
20529 + dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
20530 + req->req.channel);
20531 +}
20532 +
20533 +static void atmel_ac97_block_complete(struct dma_request *_req)
20534 +{
20535 + struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
20536 + struct atmel_ac97 *chip = req->dev_id;
20537 + if (req->periph_id == chip->dma.tx_periph_id)
20538 + snd_pcm_period_elapsed(chip->playback_substream);
20539 + else
20540 + snd_pcm_period_elapsed(chip->capture_substream);
20541 +}
20542 +
20543 +/*
20544 + * Codec part.
20545 + */
20546 +static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
20547 + unsigned short val)
20548 +{
20549 + struct atmel_ac97 *chip = get_chip(ac97);
20550 + unsigned long word;
20551 + int timeout = 40;
20552 +
20553 + word = (reg & 0x7f) << 16 | val;
20554 +
20555 + do {
20556 + if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
20557 + ac97c_writel(chip, COTHR, word);
20558 + return;
20559 + }
20560 + udelay(1);
20561 + } while (--timeout);
20562 +
20563 + dev_dbg(&chip->pdev->dev, "codec write timeout\n");
20564 +}
20565 +
20566 +static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
20567 + unsigned short reg)
20568 +{
20569 + struct atmel_ac97 *chip = get_chip(ac97);
20570 + unsigned long word;
20571 + int timeout = 40;
20572 + int write = 10;
20573 +
20574 + word = (0x80 | (reg & 0x7f)) << 16;
20575 +
20576 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
20577 + ac97c_readl(chip, CORHR);
20578 +
20579 +retry_write:
20580 + timeout = 40;
20581 +
20582 + do {
20583 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
20584 + ac97c_writel(chip, COTHR, word);
20585 + goto read_reg;
20586 + }
20587 + mdelay(10);
20588 + } while (--timeout);
20589 +
20590 + if (!--write)
20591 + goto timed_out;
20592 + goto retry_write;
20593 +
20594 +read_reg:
20595 + do {
20596 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
20597 + unsigned short val = ac97c_readl(chip, CORHR);
20598 + return val;
20599 + }
20600 + mdelay(10);
20601 + } while (--timeout);
20602 +
20603 + if (!--write)
20604 + goto timed_out;
20605 + goto retry_write;
20606 +
20607 +timed_out:
20608 + dev_dbg(&chip->pdev->dev, "codec read timeout\n");
20609 + return 0xffff;
20610 +}
20611 +
20612 +static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
20613 +{
20614 + ac97c_writel(chip, MR, AC97C_MR_WRST);
20615 + mdelay(1);
20616 + ac97c_writel(chip, MR, AC97C_MR_ENA);
20617 +}
20618 +
20619 +static void snd_atmel_ac97_destroy(struct snd_card *card)
20620 +{
20621 + struct atmel_ac97 *chip = get_chip(card);
20622 +
20623 + if (chip->regs)
20624 + iounmap(chip->regs);
20625 +
20626 + if (chip->mck) {
20627 + clk_disable(chip->mck);
20628 + clk_put(chip->mck);
20629 + }
20630 +
20631 + if (chip->dma.req_tx.req.dmac) {
20632 + dma_release_channel(chip->dma.req_tx.req.dmac,
20633 + chip->dma.req_tx.req.channel);
20634 + }
20635 + if (chip->dma.req_rx.req.dmac) {
20636 + dma_release_channel(chip->dma.req_rx.req.dmac,
20637 + chip->dma.req_rx.req.channel);
20638 + }
20639 +}
20640 +
20641 +static int __devinit snd_atmel_ac97_create(struct snd_card *card,
20642 + struct platform_device *pdev)
20643 +{
20644 + static struct snd_ac97_bus_ops ops = {
20645 + .write = snd_atmel_ac97_write,
20646 + .read = snd_atmel_ac97_read,
20647 + };
20648 + struct atmel_ac97 *chip = get_chip(card);
20649 + struct resource *regs;
20650 + struct clk *mck;
20651 + int err;
20652 +
20653 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
20654 + if (!regs)
20655 + return -ENXIO;
20656 +
20657 + mck = clk_get(&pdev->dev, "pclk");
20658 + if (IS_ERR(mck))
20659 + return PTR_ERR(mck);
20660 + clk_enable(mck);
20661 + chip->mck = mck;
20662 +
20663 + card->private_free = snd_atmel_ac97_destroy;
20664 +
20665 + spin_lock_init(&chip->lock);
20666 + chip->card = card;
20667 + chip->pdev = pdev;
20668 +
20669 + chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
20670 + if (!chip->regs)
20671 + return -ENOMEM;
20672 +
20673 + snd_card_set_dev(card, &pdev->dev);
20674 +
20675 + err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
20676 +
20677 + return err;
20678 +}
20679 +
20680 +static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
20681 +{
20682 + static int dev;
20683 + struct snd_card *card;
20684 + struct atmel_ac97 *chip;
20685 + int err;
20686 + int ch;
20687 +
20688 + mutex_init(&opened_mutex);
20689 +
20690 + err = -ENOMEM;
20691 + card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
20692 + THIS_MODULE, sizeof(struct atmel_ac97));
20693 + if (!card)
20694 + goto out;
20695 + chip = get_chip(card);
20696 +
20697 + err = snd_atmel_ac97_create(card, pdev);
20698 + if (err)
20699 + goto out_free_card;
20700 +
20701 + snd_atmel_ac97_reset(chip);
20702 +
20703 + err = snd_atmel_ac97_mixer_new(chip);
20704 + if (err)
20705 + goto out_free_card;
20706 +
20707 + err = snd_atmel_ac97_pcm_new(chip);
20708 + if (err)
20709 + goto out_free_card;
20710 +
20711 + /* TODO: Get this information from the platform device */
20712 + chip->dma.req_tx.req.dmac = find_dma_controller(0);
20713 + if (!chip->dma.req_tx.req.dmac) {
20714 + dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
20715 + err = -ENODEV;
20716 + goto out_free_card;
20717 + }
20718 + chip->dma.req_rx.req.dmac = find_dma_controller(0);
20719 + if (!chip->dma.req_rx.req.dmac) {
20720 + dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
20721 + err = -ENODEV;
20722 + goto out_free_card;
20723 + }
20724 +
20725 + chip->dma.rx_periph_id = 3;
20726 + chip->dma.tx_periph_id = 4;
20727 +
20728 + ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
20729 + if (ch < 0) {
20730 + dev_dbg(&chip->pdev->dev,
20731 + "could not allocate TX DMA channel\n");
20732 + err = ch;
20733 + goto out_free_card;
20734 + }
20735 + chip->dma.req_tx.req.channel = ch;
20736 + chip->dma.req_tx.width = DMA_WIDTH_16BIT;
20737 + chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
20738 + chip->dma.req_tx.req.error = atmel_ac97_error;
20739 +
20740 + ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
20741 + if (ch < 0) {
20742 + dev_dbg(&chip->pdev->dev,
20743 + "could not allocate RX DMA channel\n");
20744 + err = ch;
20745 + goto out_free_card;
20746 + }
20747 + chip->dma.req_rx.req.channel = ch;
20748 + chip->dma.req_rx.width = DMA_WIDTH_16BIT;
20749 + chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
20750 + chip->dma.req_rx.req.error = atmel_ac97_error;
20751 +
20752 + strcpy(card->driver, "atmel_ac97c");
20753 + strcpy(card->shortname, "atmel_ac97c");
20754 + sprintf(card->longname, "Atmel AVR32 AC97 controller");
20755 +
20756 + err = snd_card_register(card);
20757 + if (err)
20758 + goto out_free_card;
20759 +
20760 + platform_set_drvdata(pdev, card);
20761 + dev++;
20762 +
20763 + dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
20764 + chip->regs);
20765 +
20766 + return 0;
20767 +
20768 +out_free_card:
20769 + snd_card_free(card);
20770 +out:
20771 + return err;
20772 +}
20773 +
20774 +#ifdef CONFIG_PM
20775 + static int
20776 +snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
20777 +{
20778 + struct snd_card *card = platform_get_drvdata(pdev);
20779 + struct atmel_ac97 *chip = card->private_data;
20780 +
20781 + clk_disable(chip->mck);
20782 +
20783 + return 0;
20784 +}
20785 +
20786 +static int snd_atmel_ac97_resume(struct platform_device *pdev)
20787 +{
20788 + struct snd_card *card = dev_get_drvdata(pdev);
20789 + struct atmel_ac97 *chip = card->private_data;
20790 +
20791 + clk_enable(chip->mck);
20792 +
20793 + return 0;
20794 +}
20795 +#else
20796 +#define snd_atmel_ac97_suspend NULL
20797 +#define snd_atmel_ac97_resume NULL
20798 +#endif
20799 +
20800 +static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
20801 +{
20802 + struct snd_card *card = platform_get_drvdata(pdev);
20803 +
20804 + snd_card_free(card);
20805 + platform_set_drvdata(pdev, NULL);
20806 + return 0;
20807 +}
20808 +
20809 +static struct platform_driver atmel_ac97_driver = {
20810 + .remove = __devexit_p(snd_atmel_ac97_remove),
20811 + .driver = {
20812 + .name = "atmel_ac97c",
20813 + },
20814 + .suspend = snd_atmel_ac97_suspend,
20815 + .resume = snd_atmel_ac97_resume,
20816 +};
20817 +
20818 +static int __init atmel_ac97_init(void)
20819 +{
20820 + return platform_driver_probe(&atmel_ac97_driver,
20821 + snd_atmel_ac97_probe);
20822 +}
20823 +module_init(atmel_ac97_init);
20824 +
20825 +static void __exit atmel_ac97_exit(void)
20826 +{
20827 + platform_driver_unregister(&atmel_ac97_driver);
20828 +}
20829 +module_exit(atmel_ac97_exit);
20830 +
20831 +MODULE_LICENSE("GPL");
20832 +MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
20833 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
20834 Index: linux-2.6.24.7/sound/avr32/ac97c.h
20835 ===================================================================
20836 --- /dev/null
20837 +++ linux-2.6.24.7/sound/avr32/ac97c.h
20838 @@ -0,0 +1,71 @@
20839 +/*
20840 + * Register definitions for the Atmel AC97 Controller.
20841 + *
20842 + * Copyright (C) 2005-2006 Atmel Corporation
20843 + *
20844 + * This program is free software; you can redistribute it and/or modify
20845 + * it under the terms of the GNU General Public License version 2 as
20846 + * published by the Free Software Foundation.
20847 + */
20848 +#ifndef __SOUND_AVR32_AC97C_H
20849 +#define __SOUND_AVR32_AC97C_H
20850 +
20851 +#define AC97C_MR 0x08
20852 +#define AC97C_ICA 0x10
20853 +#define AC97C_OCA 0x14
20854 +#define AC97C_CARHR 0x20
20855 +#define AC97C_CATHR 0x24
20856 +#define AC97C_CASR 0x28
20857 +#define AC97C_CAMR 0x2c
20858 +#define AC97C_CBRHR 0x30
20859 +#define AC97C_CBTHR 0x34
20860 +#define AC97C_CBSR 0x38
20861 +#define AC97C_CBMR 0x3c
20862 +#define AC97C_CORHR 0x40
20863 +#define AC97C_COTHR 0x44
20864 +#define AC97C_COSR 0x48
20865 +#define AC97C_COMR 0x4c
20866 +#define AC97C_SR 0x50
20867 +#define AC97C_IER 0x54
20868 +#define AC97C_IDR 0x58
20869 +#define AC97C_IMR 0x5c
20870 +#define AC97C_VERSION 0xfc
20871 +
20872 +#define AC97C_CATPR PDC_TPR
20873 +#define AC97C_CATCR PDC_TCR
20874 +#define AC97C_CATNPR PDC_TNPR
20875 +#define AC97C_CATNCR PDC_TNCR
20876 +#define AC97C_CARPR PDC_RPR
20877 +#define AC97C_CARCR PDC_RCR
20878 +#define AC97C_CARNPR PDC_RNPR
20879 +#define AC97C_CARNCR PDC_RNCR
20880 +#define AC97C_PTCR PDC_PTCR
20881 +
20882 +#define AC97C_MR_ENA (1 << 0)
20883 +#define AC97C_MR_WRST (1 << 1)
20884 +#define AC97C_MR_VRA (1 << 2)
20885 +
20886 +#define AC97C_CSR_TXRDY (1 << 0)
20887 +#define AC97C_CSR_UNRUN (1 << 2)
20888 +#define AC97C_CSR_RXRDY (1 << 4)
20889 +#define AC97C_CSR_ENDTX (1 << 10)
20890 +#define AC97C_CSR_ENDRX (1 << 14)
20891 +
20892 +#define AC97C_CMR_SIZE_20 (0 << 16)
20893 +#define AC97C_CMR_SIZE_18 (1 << 16)
20894 +#define AC97C_CMR_SIZE_16 (2 << 16)
20895 +#define AC97C_CMR_SIZE_10 (3 << 16)
20896 +#define AC97C_CMR_CEM_LITTLE (1 << 18)
20897 +#define AC97C_CMR_CEM_BIG (0 << 18)
20898 +#define AC97C_CMR_CENA (1 << 21)
20899 +#define AC97C_CMR_PDCEN (1 << 22)
20900 +
20901 +#define AC97C_SR_CAEVT (1 << 3)
20902 +
20903 +#define AC97C_CH_ASSIGN(slot, channel) \
20904 + (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
20905 +#define AC97C_CHANNEL_NONE 0x0
20906 +#define AC97C_CHANNEL_A 0x1
20907 +#define AC97C_CHANNEL_B 0x2
20908 +
20909 +#endif /* __SOUND_AVR32_AC97C_H */
20910 Index: linux-2.6.24.7/sound/avr32/Kconfig
20911 ===================================================================
20912 --- /dev/null
20913 +++ linux-2.6.24.7/sound/avr32/Kconfig
20914 @@ -0,0 +1,11 @@
20915 +menu "AVR32 devices"
20916 + depends on SND != n && AVR32
20917 +
20918 +config SND_ATMEL_AC97
20919 + tristate "Atmel AC97 Controller Driver"
20920 + select SND_PCM
20921 + select SND_AC97_CODEC
20922 + help
20923 + ALSA sound driver for the Atmel AC97 controller.
20924 +
20925 +endmenu
20926 Index: linux-2.6.24.7/sound/avr32/Makefile
20927 ===================================================================
20928 --- /dev/null
20929 +++ linux-2.6.24.7/sound/avr32/Makefile
20930 @@ -0,0 +1,3 @@
20931 +snd-atmel-ac97-objs := ac97c.o
20932 +
20933 +obj-$(CONFIG_SND_ATMEL_AC97) += snd-atmel-ac97.o
20934 Index: linux-2.6.24.7/sound/Kconfig
20935 ===================================================================
20936 --- linux-2.6.24.7.orig/sound/Kconfig
20937 +++ linux-2.6.24.7/sound/Kconfig
20938 @@ -63,6 +63,8 @@ source "sound/aoa/Kconfig"
20939
20940 source "sound/arm/Kconfig"
20941
20942 +source "sound/avr32/Kconfig"
20943 +
20944 if SPI
20945 source "sound/spi/Kconfig"
20946 endif
20947 Index: linux-2.6.24.7/sound/Makefile
20948 ===================================================================
20949 --- linux-2.6.24.7.orig/sound/Makefile
20950 +++ linux-2.6.24.7/sound/Makefile
20951 @@ -6,7 +6,7 @@ obj-$(CONFIG_SOUND_PRIME) += sound_firmw
20952 obj-$(CONFIG_SOUND_PRIME) += oss/
20953 obj-$(CONFIG_DMASOUND) += oss/
20954 obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \
20955 - sparc/ spi/ parisc/ pcmcia/ mips/ soc/
20956 + sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/
20957 obj-$(CONFIG_SND_AOA) += aoa/
20958
20959 # This one must be compilable even if sound is configured out
20960 Index: linux-2.6.24.7/sound/oss/at32_abdac.c
20961 ===================================================================
20962 --- /dev/null
20963 +++ linux-2.6.24.7/sound/oss/at32_abdac.c
20964 @@ -0,0 +1,722 @@
20965 +/*
20966 + * OSS Sound Driver for the Atmel AT32 on-chip DAC.
20967 + *
20968 + * Copyright (C) 2006 Atmel Corporation
20969 + *
20970 + * This program is free software; you can redistribute it and/or modify
20971 + * it under the terms of the GNU General Public License version 2 as
20972 + * published by the Free Software Foundation.
20973 + */
20974 +#include <linux/clk.h>
20975 +#include <linux/dma-mapping.h>
20976 +#include <linux/fs.h>
20977 +#include <linux/init.h>
20978 +#include <linux/interrupt.h>
20979 +#include <linux/kernel.h>
20980 +#include <linux/module.h>
20981 +#include <linux/platform_device.h>
20982 +#include <linux/sound.h>
20983 +#include <linux/soundcard.h>
20984 +
20985 +#include <asm/byteorder.h>
20986 +#include <asm/dma-controller.h>
20987 +#include <asm/io.h>
20988 +#include <asm/uaccess.h>
20989 +
20990 +/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
20991 +#include <linux/byteorder/swabb.h>
20992 +
20993 +#include "at32_abdac.h"
20994 +
20995 +#define DMA_BUFFER_SIZE 32768
20996 +#define DMA_PERIOD_SHIFT 10
20997 +#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
20998 +#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
20999 +
21000 +struct sound_settings {
21001 + unsigned int format;
21002 + unsigned int channels;
21003 + unsigned int sample_rate;
21004 + /* log2(bytes per sample) */
21005 + unsigned int input_order;
21006 +};
21007 +
21008 +struct at32_dac {
21009 + spinlock_t lock;
21010 + void __iomem *regs;
21011 +
21012 + /* head and tail refer to number of words */
21013 + struct {
21014 + u32 *buf;
21015 + int head;
21016 + int tail;
21017 + } dma;
21018 +
21019 + struct semaphore sem;
21020 + wait_queue_head_t write_wait;
21021 +
21022 + /*
21023 + * Read at most ucount bytes from ubuf, translate to 2-channel
21024 + * signed 16-bit big endian format and write to the DMA buffer
21025 + * as long as there is room left. Return the number of bytes
21026 + * successfully copied from ubuf, or -EFAULT if the first
21027 + * sample from ubuf couldn't be read. This function is not
21028 + * called unless there is room for at least one sample (4
21029 + * bytes) in the DMA buffer.
21030 + */
21031 + ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
21032 + size_t ucount);
21033 +
21034 + struct sound_settings dsp_settings;
21035 + struct dma_request_cyclic req;
21036 +
21037 + struct clk *mck;
21038 + struct clk *sample_clk;
21039 + struct platform_device *pdev;
21040 + int busy;
21041 + int playing;
21042 + int dev_dsp;
21043 +};
21044 +static struct at32_dac *the_dac;
21045 +
21046 +static inline unsigned int abdac_get_head(struct at32_dac *dac)
21047 +{
21048 + return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
21049 +}
21050 +
21051 +static inline unsigned int abdac_get_tail(struct at32_dac *dac)
21052 +{
21053 + return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
21054 +}
21055 +
21056 +static inline unsigned int abdac_dma_space(struct at32_dac *dac)
21057 +{
21058 + unsigned int space;
21059 +
21060 + space = ((dac->dma.tail - dac->dma.head - 1)
21061 + & ((DMA_BUFFER_SIZE / 4) - 1));
21062 + return space;
21063 +}
21064 +
21065 +static void abdac_update_dma_tail(struct at32_dac *dac)
21066 +{
21067 + dma_addr_t dma_addr;
21068 + unsigned int new_tail;
21069 +
21070 + if (dac->playing) {
21071 + dma_addr = dma_get_current_pos(dac->req.req.dmac,
21072 + dac->req.req.channel);
21073 + new_tail = (dma_addr - dac->req.buffer_start) / 4;
21074 + if (new_tail >= dac->dma.head
21075 + && (dac->dma.tail < dac->dma.head
21076 + || dac->dma.tail > new_tail))
21077 + dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
21078 + dac->dma.tail = new_tail;
21079 + dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
21080 + dma_addr, dac->req.buffer_start, dac->dma.tail);
21081 + }
21082 +}
21083 +
21084 +static int abdac_start(struct at32_dac *dac)
21085 +{
21086 + int ret;
21087 +
21088 + if (dac->playing)
21089 + return 0;
21090 +
21091 + memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
21092 +
21093 + clk_enable(dac->sample_clk);
21094 +
21095 + ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
21096 + if (ret)
21097 + goto out_stop_clock;
21098 +
21099 + dev_dbg(&dac->pdev->dev, "starting DMA...\n");
21100 + ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
21101 + if (ret)
21102 + goto out_stop_request;
21103 +
21104 + dac_writel(dac, CTRL, DAC_BIT(EN));
21105 + dac->playing = 1;
21106 +
21107 + return 0;
21108 +
21109 +out_stop_request:
21110 + dma_stop_request(dac->req.req.dmac,
21111 + dac->req.req.channel);
21112 +out_stop_clock:
21113 + clk_disable(dac->sample_clk);
21114 + return ret;
21115 +}
21116 +
21117 +static int abdac_stop(struct at32_dac *dac)
21118 +{
21119 + if (dac->playing) {
21120 + dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
21121 + dac_writel(dac, DATA, 0);
21122 + dac_writel(dac, CTRL, 0);
21123 + dac->playing = 0;
21124 + clk_disable(dac->sample_clk);
21125 + }
21126 +
21127 + return 0;
21128 +}
21129 +
21130 +static int abdac_dma_prepare(struct at32_dac *dac)
21131 +{
21132 + dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
21133 + &dac->req.buffer_start, GFP_KERNEL);
21134 + if (!dac->dma.buf)
21135 + return -ENOMEM;
21136 +
21137 + dac->dma.head = dac->dma.tail = 0;
21138 + dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
21139 + dac->req.buffer_size = DMA_BUFFER_SIZE;
21140 +
21141 + return 0;
21142 +}
21143 +
21144 +static void abdac_dma_cleanup(struct at32_dac *dac)
21145 +{
21146 + if (dac->dma.buf)
21147 + dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
21148 + dac->dma.buf, dac->req.buffer_start);
21149 + dac->dma.buf = NULL;
21150 +}
21151 +
21152 +static void abdac_dma_block_complete(struct dma_request *req)
21153 +{
21154 + struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
21155 + struct at32_dac *dac = container_of(creq, struct at32_dac, req);
21156 +
21157 + wake_up(&dac->write_wait);
21158 +}
21159 +
21160 +static void abdac_dma_error(struct dma_request *req)
21161 +{
21162 + struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
21163 + struct at32_dac *dac = container_of(creq, struct at32_dac, req);
21164 +
21165 + dev_err(&dac->pdev->dev, "DMA error\n");
21166 +}
21167 +
21168 +static irqreturn_t abdac_interrupt(int irq, void *dev_id)
21169 +{
21170 + struct at32_dac *dac = dev_id;
21171 + u32 status;
21172 +
21173 + status = dac_readl(dac, INT_STATUS);
21174 + if (status & DAC_BIT(UNDERRUN)) {
21175 + dev_err(&dac->pdev->dev, "Underrun detected!\n");
21176 + dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
21177 + } else {
21178 + dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
21179 + status);
21180 + dac_writel(dac, INT_CLR, status);
21181 + }
21182 +
21183 + return IRQ_HANDLED;
21184 +}
21185 +
21186 +static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
21187 + size_t ucount)
21188 +{
21189 + ssize_t ret;
21190 +
21191 + if (dac->dsp_settings.channels == 2) {
21192 + const u32 __user *up = (const u32 __user *)ubuf;
21193 + u32 sample;
21194 +
21195 + for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
21196 + if (!abdac_dma_space(dac))
21197 + break;
21198 +
21199 + if (unlikely(__get_user(sample, up++))) {
21200 + if (ret == 0)
21201 + ret = -EFAULT;
21202 + break;
21203 + }
21204 + dac->dma.buf[abdac_get_head(dac)] = sample;
21205 + dac->dma.head++;
21206 + }
21207 + } else {
21208 + const u16 __user *up = (const u16 __user *)ubuf;
21209 + u16 sample;
21210 +
21211 + for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
21212 + if (!abdac_dma_space(dac))
21213 + break;
21214 +
21215 + if (unlikely(__get_user(sample, up++))) {
21216 + if (ret == 0)
21217 + ret = -EFAULT;
21218 + break;
21219 + }
21220 + dac->dma.buf[abdac_get_head(dac)]
21221 + = (sample << 16) | sample;
21222 + dac->dma.head++;
21223 + }
21224 + }
21225 +
21226 + return ret;
21227 +}
21228 +
21229 +static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
21230 + size_t ucount)
21231 +{
21232 + ssize_t ret;
21233 +
21234 + if (dac->dsp_settings.channels == 2) {
21235 + const u32 __user *up = (const u32 __user *)ubuf;
21236 + u32 sample;
21237 +
21238 + for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
21239 + if (!abdac_dma_space(dac))
21240 + break;
21241 +
21242 + if (unlikely(__get_user(sample, up++))) {
21243 + if (ret == 0)
21244 + ret = -EFAULT;
21245 + break;
21246 + }
21247 + /* Swap bytes in each halfword */
21248 + dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
21249 + dac->dma.head++;
21250 + }
21251 + } else {
21252 + const u16 __user *up = (const u16 __user *)ubuf;
21253 + u16 sample;
21254 +
21255 + for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
21256 + if (!abdac_dma_space(dac))
21257 + break;
21258 +
21259 + if (unlikely(__get_user(sample, up++))) {
21260 + if (ret == 0)
21261 + ret = -EFAULT;
21262 + break;
21263 + }
21264 + sample = swab16(sample);
21265 + dac->dma.buf[abdac_get_head(dac)]
21266 + = (sample << 16) | sample;
21267 + dac->dma.head++;
21268 + }
21269 + }
21270 +
21271 + return ret;
21272 +}
21273 +
21274 +static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
21275 + const char __user *buffer,
21276 + size_t count)
21277 +{
21278 + /* At least one buffer must be available at this point */
21279 + dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
21280 +
21281 + return dac->trans(dac, buffer, count);
21282 +}
21283 +
21284 +static int abdac_set_format(struct at32_dac *dac, int format)
21285 +{
21286 + unsigned int order;
21287 +
21288 + switch (format) {
21289 + case AFMT_S16_BE:
21290 + order = 1;
21291 + dac->trans = trans_s16be;
21292 + break;
21293 + case AFMT_S16_LE:
21294 + order = 1;
21295 + dac->trans = trans_s16le;
21296 + break;
21297 + default:
21298 + dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
21299 + return -EINVAL;
21300 + }
21301 +
21302 + if (dac->dsp_settings.channels == 2)
21303 + order++;
21304 +
21305 + dac->dsp_settings.input_order = order;
21306 + dac->dsp_settings.format = format;
21307 + return 0;
21308 +}
21309 +
21310 +static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
21311 +{
21312 + unsigned long new_rate;
21313 + int ret;
21314 +
21315 + ret = clk_set_rate(dac->sample_clk, 256 * rate);
21316 + if (ret < 0)
21317 + return ret;
21318 +
21319 + /* TODO: mplayer seems to have a problem with this */
21320 +#if 0
21321 + new_rate = clk_get_rate(dac->sample_clk);
21322 + dac->dsp_settings.sample_rate = new_rate / 256;
21323 +#else
21324 + dac->dsp_settings.sample_rate = rate;
21325 +#endif
21326 +
21327 + return 0;
21328 +}
21329 +
21330 +static ssize_t abdac_dsp_write(struct file *file,
21331 + const char __user *buffer,
21332 + size_t count, loff_t *ppos)
21333 +{
21334 + struct at32_dac *dac = file->private_data;
21335 + DECLARE_WAITQUEUE(wait, current);
21336 + unsigned int avail;
21337 + ssize_t copied;
21338 + ssize_t ret;
21339 +
21340 + /* Avoid address space checking in the translation functions */
21341 + if (!access_ok(buffer, count, VERIFY_READ))
21342 + return -EFAULT;
21343 +
21344 + down(&dac->sem);
21345 +
21346 + if (!dac->dma.buf) {
21347 + ret = abdac_dma_prepare(dac);
21348 + if (ret)
21349 + goto out;
21350 + }
21351 +
21352 + add_wait_queue(&dac->write_wait, &wait);
21353 + ret = 0;
21354 + while (count > 0) {
21355 + do {
21356 + abdac_update_dma_tail(dac);
21357 + avail = abdac_dma_space(dac);
21358 + set_current_state(TASK_INTERRUPTIBLE);
21359 + if (avail >= DMA_WRITE_THRESHOLD)
21360 + break;
21361 +
21362 + if (file->f_flags & O_NONBLOCK) {
21363 + if (!ret)
21364 + ret = -EAGAIN;
21365 + goto out;
21366 + }
21367 +
21368 + pr_debug("Going to wait (avail = %u, count = %zu)\n",
21369 + avail, count);
21370 +
21371 + up(&dac->sem);
21372 + schedule();
21373 + if (signal_pending(current)) {
21374 + if (!ret)
21375 + ret = -ERESTARTSYS;
21376 + goto out_nosem;
21377 + }
21378 + down(&dac->sem);
21379 + } while (1);
21380 +
21381 + copied = abdac_dma_translate_from_user(dac, buffer, count);
21382 + if (copied < 0) {
21383 + if (!ret)
21384 + ret = -EFAULT;
21385 + goto out;
21386 + }
21387 +
21388 + abdac_start(dac);
21389 +
21390 + count -= copied;
21391 + ret += copied;
21392 + }
21393 +
21394 +out:
21395 + up(&dac->sem);
21396 +out_nosem:
21397 + remove_wait_queue(&dac->write_wait, &wait);
21398 + set_current_state(TASK_RUNNING);
21399 + return ret;
21400 +}
21401 +
21402 +static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
21403 + unsigned int cmd, unsigned long arg)
21404 +{
21405 + struct at32_dac *dac = file->private_data;
21406 + int __user *up = (int __user *)arg;
21407 + struct audio_buf_info abinfo;
21408 + int val, ret;
21409 +
21410 + switch (cmd) {
21411 + case OSS_GETVERSION:
21412 + return put_user(SOUND_VERSION, up);
21413 +
21414 + case SNDCTL_DSP_SPEED:
21415 + if (get_user(val, up))
21416 + return -EFAULT;
21417 + if (val >= 0) {
21418 + abdac_stop(dac);
21419 + ret = abdac_set_sample_rate(dac, val);
21420 + if (ret)
21421 + return ret;
21422 + }
21423 + return put_user(dac->dsp_settings.sample_rate, up);
21424 +
21425 + case SNDCTL_DSP_STEREO:
21426 + if (get_user(val, up))
21427 + return -EFAULT;
21428 + abdac_stop(dac);
21429 + if (val && dac->dsp_settings.channels == 1)
21430 + dac->dsp_settings.input_order++;
21431 + else if (!val && dac->dsp_settings.channels != 1)
21432 + dac->dsp_settings.input_order--;
21433 + dac->dsp_settings.channels = val ? 2 : 1;
21434 + return 0;
21435 +
21436 + case SNDCTL_DSP_CHANNELS:
21437 + if (get_user(val, up))
21438 + return -EFAULT;
21439 +
21440 + if (val) {
21441 + if (val < 0 || val > 2)
21442 + return -EINVAL;
21443 +
21444 + abdac_stop(dac);
21445 + dac->dsp_settings.input_order
21446 + += val - dac->dsp_settings.channels;
21447 + dac->dsp_settings.channels = val;
21448 + }
21449 + return put_user(val, (int *)arg);
21450 +
21451 + case SNDCTL_DSP_GETFMTS:
21452 + return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
21453 +
21454 + case SNDCTL_DSP_SETFMT:
21455 + if (get_user(val, up))
21456 + return -EFAULT;
21457 +
21458 + if (val == AFMT_QUERY) {
21459 + val = dac->dsp_settings.format;
21460 + } else {
21461 + ret = abdac_set_format(dac, val);
21462 + if (ret)
21463 + return ret;
21464 + }
21465 + return put_user(val, up);
21466 +
21467 + case SNDCTL_DSP_GETOSPACE:
21468 + abdac_update_dma_tail(dac);
21469 + abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
21470 + * (DMA_PERIOD_SIZE / 4));
21471 + abinfo.bytes = (abdac_dma_space(dac)
21472 + << dac->dsp_settings.input_order);
21473 + abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
21474 + >> (DMA_PERIOD_SHIFT
21475 + + dac->dsp_settings.input_order));
21476 + abinfo.fragments = ((abinfo.bytes
21477 + >> dac->dsp_settings.input_order)
21478 + / (DMA_PERIOD_SIZE / 4));
21479 + pr_debug("fragments=%d fragstotal=%d fragsize=%d bytes=%d\n",
21480 + abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
21481 + abinfo.bytes);
21482 + return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
21483 +
21484 + default:
21485 + dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
21486 + return -EINVAL;
21487 + }
21488 +}
21489 +
21490 +static int abdac_dsp_open(struct inode *inode, struct file *file)
21491 +{
21492 + struct at32_dac *dac = the_dac;
21493 + int ret;
21494 +
21495 + if (file->f_mode & FMODE_READ)
21496 + return -ENXIO;
21497 +
21498 + down(&dac->sem);
21499 + ret = -EBUSY;
21500 + if (dac->busy)
21501 + goto out;
21502 +
21503 + dac->dma.head = dac->dma.tail = 0;
21504 +
21505 + /* FIXME: What are the correct defaults? */
21506 + dac->dsp_settings.channels = 2;
21507 + abdac_set_format(dac, AFMT_S16_BE);
21508 + ret = abdac_set_sample_rate(dac, 8000);
21509 + if (ret)
21510 + goto out;
21511 +
21512 + file->private_data = dac;
21513 + dac->busy = 1;
21514 +
21515 + ret = 0;
21516 +
21517 +out:
21518 + up(&dac->sem);
21519 + return ret;
21520 +}
21521 +
21522 +static int abdac_dsp_release(struct inode *inode, struct file *file)
21523 +{
21524 + struct at32_dac *dac = file->private_data;
21525 +
21526 + down(&dac->sem);
21527 +
21528 + abdac_stop(dac);
21529 + abdac_dma_cleanup(dac);
21530 + dac->busy = 0;
21531 +
21532 + up(&dac->sem);
21533 +
21534 + return 0;
21535 +}
21536 +
21537 +static struct file_operations abdac_dsp_fops = {
21538 + .owner = THIS_MODULE,
21539 + .llseek = no_llseek,
21540 + .write = abdac_dsp_write,
21541 + .ioctl = abdac_dsp_ioctl,
21542 + .open = abdac_dsp_open,
21543 + .release = abdac_dsp_release,
21544 +};
21545 +
21546 +static int __init abdac_probe(struct platform_device *pdev)
21547 +{
21548 + struct at32_dac *dac;
21549 + struct resource *regs;
21550 + struct clk *mck;
21551 + struct clk *sample_clk;
21552 + int irq;
21553 + int ret;
21554 +
21555 + if (the_dac)
21556 + return -EBUSY;
21557 +
21558 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
21559 + if (!regs)
21560 + return -ENXIO;
21561 + irq = platform_get_irq(pdev, 0);
21562 + if (irq < 0)
21563 + return irq;
21564 +
21565 + mck = clk_get(&pdev->dev, "pclk");
21566 + if (IS_ERR(mck))
21567 + return PTR_ERR(mck);
21568 + sample_clk = clk_get(&pdev->dev, "sample_clk");
21569 + if (IS_ERR(sample_clk)) {
21570 + ret = PTR_ERR(sample_clk);
21571 + goto out_put_mck;
21572 + }
21573 + clk_enable(mck);
21574 +
21575 + ret = -ENOMEM;
21576 + dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
21577 + if (!dac)
21578 + goto out_disable_clk;
21579 +
21580 + spin_lock_init(&dac->lock);
21581 + init_MUTEX(&dac->sem);
21582 + init_waitqueue_head(&dac->write_wait);
21583 + dac->pdev = pdev;
21584 + dac->mck = mck;
21585 + dac->sample_clk = sample_clk;
21586 +
21587 + dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
21588 + if (!dac->regs)
21589 + goto out_free_dac;
21590 +
21591 + ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
21592 + if (ret)
21593 + goto out_unmap_regs;
21594 +
21595 + /* FIXME */
21596 + dac->req.req.dmac = find_dma_controller(0);
21597 + if (!dac->req.req.dmac)
21598 + goto out_free_irq;
21599 +
21600 + ret = dma_alloc_channel(dac->req.req.dmac);
21601 + if (ret < 0)
21602 + goto out_free_irq;
21603 +
21604 + dac->req.req.channel = ret;
21605 + dac->req.req.block_complete = abdac_dma_block_complete;
21606 + dac->req.req.error = abdac_dma_error;
21607 + dac->req.data_reg = regs->start + DAC_DATA;
21608 + dac->req.periph_id = 2; /* FIXME */
21609 + dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
21610 + dac->req.width = DMA_WIDTH_32BIT;
21611 +
21612 + /* Make sure the DAC is silent and disabled */
21613 + dac_writel(dac, DATA, 0);
21614 + dac_writel(dac, CTRL, 0);
21615 +
21616 + ret = register_sound_dsp(&abdac_dsp_fops, -1);
21617 + if (ret < 0)
21618 + goto out_free_dma;
21619 + dac->dev_dsp = ret;
21620 +
21621 + /* TODO: Register mixer */
21622 +
21623 + the_dac = dac;
21624 + platform_set_drvdata(pdev, dac);
21625 +
21626 + return 0;
21627 +
21628 +out_free_dma:
21629 + dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
21630 +out_free_irq:
21631 + free_irq(irq, dac);
21632 +out_unmap_regs:
21633 + iounmap(dac->regs);
21634 +out_free_dac:
21635 + kfree(dac);
21636 +out_disable_clk:
21637 + clk_disable(mck);
21638 + clk_put(sample_clk);
21639 +out_put_mck:
21640 + clk_put(mck);
21641 + return ret;
21642 +}
21643 +
21644 +static int __exit abdac_remove(struct platform_device *pdev)
21645 +{
21646 + struct at32_dac *dac;
21647 +
21648 + dac = platform_get_drvdata(pdev);
21649 + if (dac) {
21650 + unregister_sound_dsp(dac->dev_dsp);
21651 + dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
21652 + free_irq(platform_get_irq(pdev, 0), dac);
21653 + iounmap(dac->regs);
21654 + clk_disable(dac->mck);
21655 + clk_put(dac->sample_clk);
21656 + clk_put(dac->mck);
21657 + kfree(dac);
21658 + platform_set_drvdata(pdev, NULL);
21659 + the_dac = NULL;
21660 + }
21661 +
21662 + return 0;
21663 +}
21664 +
21665 +static struct platform_driver abdac_driver = {
21666 + .remove = __exit_p(abdac_remove),
21667 + .driver = {
21668 + .name = "abdac",
21669 + },
21670 +};
21671 +
21672 +static int __init abdac_init(void)
21673 +{
21674 + return platform_driver_probe(&abdac_driver, abdac_probe);
21675 +}
21676 +module_init(abdac_init);
21677 +
21678 +static void __exit abdac_exit(void)
21679 +{
21680 + platform_driver_unregister(&abdac_driver);
21681 +}
21682 +module_exit(abdac_exit);
21683 +
21684 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
21685 +MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
21686 +MODULE_LICENSE("GPL");
21687 Index: linux-2.6.24.7/sound/oss/at32_abdac.h
21688 ===================================================================
21689 --- /dev/null
21690 +++ linux-2.6.24.7/sound/oss/at32_abdac.h
21691 @@ -0,0 +1,59 @@
21692 +/*
21693 + * Register definitions for the Atmel AT32 on-chip DAC.
21694 + *
21695 + * Copyright (C) 2006 Atmel Corporation
21696 + *
21697 + * This program is free software; you can redistribute it and/or modify
21698 + * it under the terms of the GNU General Public License version 2 as
21699 + * published by the Free Software Foundation.
21700 + */
21701 +#ifndef __SOUND_OSS_AT32_ABDAC_H__
21702 +#define __SOUND_OSS_AT32_ABDAC_H__
21703 +
21704 +/* DAC register offsets */
21705 +#define DAC_DATA 0x0000
21706 +#define DAC_CTRL 0x0008
21707 +#define DAC_INT_MASK 0x000c
21708 +#define DAC_INT_EN 0x0010
21709 +#define DAC_INT_DIS 0x0014
21710 +#define DAC_INT_CLR 0x0018
21711 +#define DAC_INT_STATUS 0x001c
21712 +#define DAC_PDC_DATA 0x0020
21713 +
21714 +/* Bitfields in CTRL */
21715 +#define DAC_SWAP_OFFSET 30
21716 +#define DAC_SWAP_SIZE 1
21717 +#define DAC_EN_OFFSET 31
21718 +#define DAC_EN_SIZE 1
21719 +
21720 +/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
21721 +#define DAC_UNDERRUN_OFFSET 28
21722 +#define DAC_UNDERRUN_SIZE 1
21723 +#define DAC_TX_READY_OFFSET 29
21724 +#define DAC_TX_READY_SIZE 1
21725 +#define DAC_TX_BUFFER_EMPTY_OFFSET 30
21726 +#define DAC_TX_BUFFER_EMPTY_SIZE 1
21727 +#define DAC_CHANNEL_TX_END_OFFSET 31
21728 +#define DAC_CHANNEL_TX_END_SIZE 1
21729 +
21730 +/* Bit manipulation macros */
21731 +#define DAC_BIT(name) \
21732 + (1 << DAC_##name##_OFFSET)
21733 +#define DAC_BF(name, value) \
21734 + (((value) & ((1 << DAC_##name##_SIZE) - 1)) \
21735 + << DAC_##name##_OFFSET)
21736 +#define DAC_BFEXT(name, value) \
21737 + (((value) >> DAC_##name##_OFFSET) \
21738 + & ((1 << DAC_##name##_SIZE) - 1))
21739 +#define DAC_BFINS(name, value, old) \
21740 + (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \
21741 + << DAC_##name##_OFFSET)) \
21742 + | DAC_BF(name,value))
21743 +
21744 +/* Register access macros */
21745 +#define dac_readl(port, reg) \
21746 + __raw_readl((port)->regs + DAC_##reg)
21747 +#define dac_writel(port, reg, value) \
21748 + __raw_writel((value), (port)->regs + DAC_##reg)
21749 +
21750 +#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
21751 Index: linux-2.6.24.7/sound/oss/Kconfig
21752 ===================================================================
21753 --- linux-2.6.24.7.orig/sound/oss/Kconfig
21754 +++ linux-2.6.24.7/sound/oss/Kconfig
21755 @@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
21756 int "DAC channel"
21757 default "1"
21758 depends on SOUND_SH_DAC_AUDIO
21759 +
21760 +config SOUND_AT32_ABDAC
21761 + tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
21762 + depends on SOUND_PRIME && AVR32
21763 Index: linux-2.6.24.7/sound/oss/Makefile
21764 ===================================================================
21765 --- linux-2.6.24.7.orig/sound/oss/Makefile
21766 +++ linux-2.6.24.7/sound/oss/Makefile
21767 @@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232) += cs4232.o a
21768
21769 # Please leave it as is, cause the link order is significant !
21770
21771 +obj-$(CONFIG_SOUND_AT32_ABDAC) += at32_abdac.o
21772 obj-$(CONFIG_SOUND_SH_DAC_AUDIO) += sh_dac_audio.o
21773 obj-$(CONFIG_SOUND_HAL2) += hal2.o
21774 obj-$(CONFIG_SOUND_AEDSP16) += aedsp16.o
21775 Index: linux-2.6.24.7/sound/spi/at73c213.c
21776 ===================================================================
21777 --- linux-2.6.24.7.orig/sound/spi/at73c213.c
21778 +++ linux-2.6.24.7/sound/spi/at73c213.c
21779 @@ -744,7 +744,7 @@ cleanup:
21780 /*
21781 * Device functions
21782 */
21783 -static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
21784 +static int __devinit snd_at73c213_ssc_init(struct snd_at73c213 *chip)
21785 {
21786 /*
21787 * Continuous clock output.
21788 @@ -774,7 +774,7 @@ static int snd_at73c213_ssc_init(struct
21789 return 0;
21790 }
21791
21792 -static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
21793 +static int __devinit snd_at73c213_chip_init(struct snd_at73c213 *chip)
21794 {
21795 int retval;
21796 unsigned char dac_ctrl = 0;
21797 @@ -939,7 +939,7 @@ out:
21798 return retval;
21799 }
21800
21801 -static int snd_at73c213_probe(struct spi_device *spi)
21802 +static int __devinit snd_at73c213_probe(struct spi_device *spi)
21803 {
21804 struct snd_card *card;
21805 struct snd_at73c213 *chip;
lynxis staging tree for omap