ipq806x: Add support for IPQ806x chip family
[openwrt/staging/lynxis/omap.git] / target / linux / ipq806x / patches / 0012-devicetree-bindings-Document-qcom-saw2-node.patch
1 From 17adce4d3de1fca7761607d572f4979557f0f604 Mon Sep 17 00:00:00 2001
2 From: Stephen Boyd <sboyd@codeaurora.org>
3 Date: Thu, 31 Oct 2013 18:20:30 -0700
4 Subject: [PATCH 012/182] devicetree: bindings: Document qcom,saw2 node
5
6 The saw2 binding describes the SPM/AVS wrapper hardware used to
7 control the regulator supplying voltage to the Krait CPUs.
8
9 Cc: <devicetree@vger.kernel.org>
10 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
11 Signed-off-by: Kumar Gala <galak@codeaurora.org>
12 ---
13 .../devicetree/bindings/arm/msm/qcom,saw2.txt | 35 ++++++++++++++++++++
14 1 file changed, 35 insertions(+)
15 create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
16
17 diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
18 new file mode 100644
19 index 0000000..1505fb8
20 --- /dev/null
21 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
22 @@ -0,0 +1,35 @@
23 +SPM AVS Wrapper 2 (SAW2)
24 +
25 +The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
26 +Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
27 +micro-controller that transitions a piece of hardware (like a processor or
28 +subsystem) into and out of low power modes via a direct connection to
29 +the PMIC. It can also be wired up to interact with other processors in the
30 +system, notifying them when a low power state is entered or exited.
31 +
32 +PROPERTIES
33 +
34 +- compatible:
35 + Usage: required
36 + Value type: <string>
37 + Definition: shall contain "qcom,saw2". A more specific value should be
38 + one of:
39 + "qcom,saw2-v1"
40 + "qcom,saw2-v1.1"
41 + "qcom,saw2-v2"
42 + "qcom,saw2-v2.1"
43 +
44 +- reg:
45 + Usage: required
46 + Value type: <prop-encoded-array>
47 + Definition: the first element specifies the base address and size of
48 + the register region. An optional second element specifies
49 + the base address and size of the alias register region.
50 +
51 +
52 +Example:
53 +
54 + regulator@2099000 {
55 + compatible = "qcom,saw2";
56 + reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
57 + };
58 --
59 1.7.10.4
60