ipq806x: Add support for IPQ806x chip family
[openwrt/staging/lynxis/omap.git] / target / linux / ipq806x / patches / 0038-pinctrl-msm-Add-definitions-for-the-APQ8064-platform.patch
1 From 247288012122ccfe7d5d9af00a45814c6fdd94c5 Mon Sep 17 00:00:00 2001
2 From: Bjorn Andersson <bjorn.andersson@sonymobile.com>
3 Date: Mon, 31 Mar 2014 14:49:57 -0700
4 Subject: [PATCH 038/182] pinctrl: msm: Add definitions for the APQ8064
5 platform
6
7 This adds pinctrl definitions for the GPIO pins of the TLMM v2 block in the
8 Qualcomm APQ8064 platform.
9
10 Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
11 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
12 ---
13 drivers/pinctrl/Kconfig | 8 +
14 drivers/pinctrl/Makefile | 1 +
15 drivers/pinctrl/pinctrl-apq8064.c | 566 +++++++++++++++++++++++++++++++++++++
16 3 files changed, 575 insertions(+)
17 create mode 100644 drivers/pinctrl/pinctrl-apq8064.c
18
19 diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
20 index 06cee01..91993a6 100644
21 --- a/drivers/pinctrl/Kconfig
22 +++ b/drivers/pinctrl/Kconfig
23 @@ -222,6 +222,14 @@ config PINCTRL_MSM
24 select PINCONF
25 select GENERIC_PINCONF
26
27 +config PINCTRL_APQ8064
28 + tristate "Qualcomm APQ8064 pin controller driver"
29 + depends on GPIOLIB && OF
30 + select PINCTRL_MSM
31 + help
32 + This is the pinctrl, pinmux, pinconf and gpiolib driver for the
33 + Qualcomm TLMM block found in the Qualcomm APQ8064 platform.
34 +
35 config PINCTRL_MSM8X74
36 tristate "Qualcomm 8x74 pin controller driver"
37 depends on GPIOLIB && OF
38 diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
39 index 4b83588..9e1fb67 100644
40 --- a/drivers/pinctrl/Makefile
41 +++ b/drivers/pinctrl/Makefile
42 @@ -38,6 +38,7 @@ obj-$(CONFIG_PINCTRL_IMX23) += pinctrl-imx23.o
43 obj-$(CONFIG_PINCTRL_IMX25) += pinctrl-imx25.o
44 obj-$(CONFIG_PINCTRL_IMX28) += pinctrl-imx28.o
45 obj-$(CONFIG_PINCTRL_MSM) += pinctrl-msm.o
46 +obj-$(CONFIG_PINCTRL_APQ8064) += pinctrl-apq8064.o
47 obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o
48 obj-$(CONFIG_PINCTRL_NOMADIK) += pinctrl-nomadik.o
49 obj-$(CONFIG_PINCTRL_STN8815) += pinctrl-nomadik-stn8815.o
50 diff --git a/drivers/pinctrl/pinctrl-apq8064.c b/drivers/pinctrl/pinctrl-apq8064.c
51 new file mode 100644
52 index 0000000..7c2a8ba
53 --- /dev/null
54 +++ b/drivers/pinctrl/pinctrl-apq8064.c
55 @@ -0,0 +1,566 @@
56 +/*
57 + * Copyright (c) 2014, Sony Mobile Communications AB.
58 + *
59 + * This program is free software; you can redistribute it and/or modify
60 + * it under the terms of the GNU General Public License version 2 and
61 + * only version 2 as published by the Free Software Foundation.
62 + *
63 + * This program is distributed in the hope that it will be useful,
64 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
65 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
66 + * GNU General Public License for more details.
67 + */
68 +
69 +#include <linux/module.h>
70 +#include <linux/of.h>
71 +#include <linux/platform_device.h>
72 +#include <linux/pinctrl/pinctrl.h>
73 +
74 +#include "pinctrl-msm.h"
75 +
76 +static const struct pinctrl_pin_desc apq8064_pins[] = {
77 + PINCTRL_PIN(0, "GPIO_0"),
78 + PINCTRL_PIN(1, "GPIO_1"),
79 + PINCTRL_PIN(2, "GPIO_2"),
80 + PINCTRL_PIN(3, "GPIO_3"),
81 + PINCTRL_PIN(4, "GPIO_4"),
82 + PINCTRL_PIN(5, "GPIO_5"),
83 + PINCTRL_PIN(6, "GPIO_6"),
84 + PINCTRL_PIN(7, "GPIO_7"),
85 + PINCTRL_PIN(8, "GPIO_8"),
86 + PINCTRL_PIN(9, "GPIO_9"),
87 + PINCTRL_PIN(10, "GPIO_10"),
88 + PINCTRL_PIN(11, "GPIO_11"),
89 + PINCTRL_PIN(12, "GPIO_12"),
90 + PINCTRL_PIN(13, "GPIO_13"),
91 + PINCTRL_PIN(14, "GPIO_14"),
92 + PINCTRL_PIN(15, "GPIO_15"),
93 + PINCTRL_PIN(16, "GPIO_16"),
94 + PINCTRL_PIN(17, "GPIO_17"),
95 + PINCTRL_PIN(18, "GPIO_18"),
96 + PINCTRL_PIN(19, "GPIO_19"),
97 + PINCTRL_PIN(20, "GPIO_20"),
98 + PINCTRL_PIN(21, "GPIO_21"),
99 + PINCTRL_PIN(22, "GPIO_22"),
100 + PINCTRL_PIN(23, "GPIO_23"),
101 + PINCTRL_PIN(24, "GPIO_24"),
102 + PINCTRL_PIN(25, "GPIO_25"),
103 + PINCTRL_PIN(26, "GPIO_26"),
104 + PINCTRL_PIN(27, "GPIO_27"),
105 + PINCTRL_PIN(28, "GPIO_28"),
106 + PINCTRL_PIN(29, "GPIO_29"),
107 + PINCTRL_PIN(30, "GPIO_30"),
108 + PINCTRL_PIN(31, "GPIO_31"),
109 + PINCTRL_PIN(32, "GPIO_32"),
110 + PINCTRL_PIN(33, "GPIO_33"),
111 + PINCTRL_PIN(34, "GPIO_34"),
112 + PINCTRL_PIN(35, "GPIO_35"),
113 + PINCTRL_PIN(36, "GPIO_36"),
114 + PINCTRL_PIN(37, "GPIO_37"),
115 + PINCTRL_PIN(38, "GPIO_38"),
116 + PINCTRL_PIN(39, "GPIO_39"),
117 + PINCTRL_PIN(40, "GPIO_40"),
118 + PINCTRL_PIN(41, "GPIO_41"),
119 + PINCTRL_PIN(42, "GPIO_42"),
120 + PINCTRL_PIN(43, "GPIO_43"),
121 + PINCTRL_PIN(44, "GPIO_44"),
122 + PINCTRL_PIN(45, "GPIO_45"),
123 + PINCTRL_PIN(46, "GPIO_46"),
124 + PINCTRL_PIN(47, "GPIO_47"),
125 + PINCTRL_PIN(48, "GPIO_48"),
126 + PINCTRL_PIN(49, "GPIO_49"),
127 + PINCTRL_PIN(50, "GPIO_50"),
128 + PINCTRL_PIN(51, "GPIO_51"),
129 + PINCTRL_PIN(52, "GPIO_52"),
130 + PINCTRL_PIN(53, "GPIO_53"),
131 + PINCTRL_PIN(54, "GPIO_54"),
132 + PINCTRL_PIN(55, "GPIO_55"),
133 + PINCTRL_PIN(56, "GPIO_56"),
134 + PINCTRL_PIN(57, "GPIO_57"),
135 + PINCTRL_PIN(58, "GPIO_58"),
136 + PINCTRL_PIN(59, "GPIO_59"),
137 + PINCTRL_PIN(60, "GPIO_60"),
138 + PINCTRL_PIN(61, "GPIO_61"),
139 + PINCTRL_PIN(62, "GPIO_62"),
140 + PINCTRL_PIN(63, "GPIO_63"),
141 + PINCTRL_PIN(64, "GPIO_64"),
142 + PINCTRL_PIN(65, "GPIO_65"),
143 + PINCTRL_PIN(66, "GPIO_66"),
144 + PINCTRL_PIN(67, "GPIO_67"),
145 + PINCTRL_PIN(68, "GPIO_68"),
146 + PINCTRL_PIN(69, "GPIO_69"),
147 + PINCTRL_PIN(70, "GPIO_70"),
148 + PINCTRL_PIN(71, "GPIO_71"),
149 + PINCTRL_PIN(72, "GPIO_72"),
150 + PINCTRL_PIN(73, "GPIO_73"),
151 + PINCTRL_PIN(74, "GPIO_74"),
152 + PINCTRL_PIN(75, "GPIO_75"),
153 + PINCTRL_PIN(76, "GPIO_76"),
154 + PINCTRL_PIN(77, "GPIO_77"),
155 + PINCTRL_PIN(78, "GPIO_78"),
156 + PINCTRL_PIN(79, "GPIO_79"),
157 + PINCTRL_PIN(80, "GPIO_80"),
158 + PINCTRL_PIN(81, "GPIO_81"),
159 + PINCTRL_PIN(82, "GPIO_82"),
160 + PINCTRL_PIN(83, "GPIO_83"),
161 + PINCTRL_PIN(84, "GPIO_84"),
162 + PINCTRL_PIN(85, "GPIO_85"),
163 + PINCTRL_PIN(86, "GPIO_86"),
164 + PINCTRL_PIN(87, "GPIO_87"),
165 + PINCTRL_PIN(88, "GPIO_88"),
166 + PINCTRL_PIN(89, "GPIO_89"),
167 +};
168 +
169 +#define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
170 +DECLARE_APQ_GPIO_PINS(0);
171 +DECLARE_APQ_GPIO_PINS(1);
172 +DECLARE_APQ_GPIO_PINS(2);
173 +DECLARE_APQ_GPIO_PINS(3);
174 +DECLARE_APQ_GPIO_PINS(4);
175 +DECLARE_APQ_GPIO_PINS(5);
176 +DECLARE_APQ_GPIO_PINS(6);
177 +DECLARE_APQ_GPIO_PINS(7);
178 +DECLARE_APQ_GPIO_PINS(8);
179 +DECLARE_APQ_GPIO_PINS(9);
180 +DECLARE_APQ_GPIO_PINS(10);
181 +DECLARE_APQ_GPIO_PINS(11);
182 +DECLARE_APQ_GPIO_PINS(12);
183 +DECLARE_APQ_GPIO_PINS(13);
184 +DECLARE_APQ_GPIO_PINS(14);
185 +DECLARE_APQ_GPIO_PINS(15);
186 +DECLARE_APQ_GPIO_PINS(16);
187 +DECLARE_APQ_GPIO_PINS(17);
188 +DECLARE_APQ_GPIO_PINS(18);
189 +DECLARE_APQ_GPIO_PINS(19);
190 +DECLARE_APQ_GPIO_PINS(20);
191 +DECLARE_APQ_GPIO_PINS(21);
192 +DECLARE_APQ_GPIO_PINS(22);
193 +DECLARE_APQ_GPIO_PINS(23);
194 +DECLARE_APQ_GPIO_PINS(24);
195 +DECLARE_APQ_GPIO_PINS(25);
196 +DECLARE_APQ_GPIO_PINS(26);
197 +DECLARE_APQ_GPIO_PINS(27);
198 +DECLARE_APQ_GPIO_PINS(28);
199 +DECLARE_APQ_GPIO_PINS(29);
200 +DECLARE_APQ_GPIO_PINS(30);
201 +DECLARE_APQ_GPIO_PINS(31);
202 +DECLARE_APQ_GPIO_PINS(32);
203 +DECLARE_APQ_GPIO_PINS(33);
204 +DECLARE_APQ_GPIO_PINS(34);
205 +DECLARE_APQ_GPIO_PINS(35);
206 +DECLARE_APQ_GPIO_PINS(36);
207 +DECLARE_APQ_GPIO_PINS(37);
208 +DECLARE_APQ_GPIO_PINS(38);
209 +DECLARE_APQ_GPIO_PINS(39);
210 +DECLARE_APQ_GPIO_PINS(40);
211 +DECLARE_APQ_GPIO_PINS(41);
212 +DECLARE_APQ_GPIO_PINS(42);
213 +DECLARE_APQ_GPIO_PINS(43);
214 +DECLARE_APQ_GPIO_PINS(44);
215 +DECLARE_APQ_GPIO_PINS(45);
216 +DECLARE_APQ_GPIO_PINS(46);
217 +DECLARE_APQ_GPIO_PINS(47);
218 +DECLARE_APQ_GPIO_PINS(48);
219 +DECLARE_APQ_GPIO_PINS(49);
220 +DECLARE_APQ_GPIO_PINS(50);
221 +DECLARE_APQ_GPIO_PINS(51);
222 +DECLARE_APQ_GPIO_PINS(52);
223 +DECLARE_APQ_GPIO_PINS(53);
224 +DECLARE_APQ_GPIO_PINS(54);
225 +DECLARE_APQ_GPIO_PINS(55);
226 +DECLARE_APQ_GPIO_PINS(56);
227 +DECLARE_APQ_GPIO_PINS(57);
228 +DECLARE_APQ_GPIO_PINS(58);
229 +DECLARE_APQ_GPIO_PINS(59);
230 +DECLARE_APQ_GPIO_PINS(60);
231 +DECLARE_APQ_GPIO_PINS(61);
232 +DECLARE_APQ_GPIO_PINS(62);
233 +DECLARE_APQ_GPIO_PINS(63);
234 +DECLARE_APQ_GPIO_PINS(64);
235 +DECLARE_APQ_GPIO_PINS(65);
236 +DECLARE_APQ_GPIO_PINS(66);
237 +DECLARE_APQ_GPIO_PINS(67);
238 +DECLARE_APQ_GPIO_PINS(68);
239 +DECLARE_APQ_GPIO_PINS(69);
240 +DECLARE_APQ_GPIO_PINS(70);
241 +DECLARE_APQ_GPIO_PINS(71);
242 +DECLARE_APQ_GPIO_PINS(72);
243 +DECLARE_APQ_GPIO_PINS(73);
244 +DECLARE_APQ_GPIO_PINS(74);
245 +DECLARE_APQ_GPIO_PINS(75);
246 +DECLARE_APQ_GPIO_PINS(76);
247 +DECLARE_APQ_GPIO_PINS(77);
248 +DECLARE_APQ_GPIO_PINS(78);
249 +DECLARE_APQ_GPIO_PINS(79);
250 +DECLARE_APQ_GPIO_PINS(80);
251 +DECLARE_APQ_GPIO_PINS(81);
252 +DECLARE_APQ_GPIO_PINS(82);
253 +DECLARE_APQ_GPIO_PINS(83);
254 +DECLARE_APQ_GPIO_PINS(84);
255 +DECLARE_APQ_GPIO_PINS(85);
256 +DECLARE_APQ_GPIO_PINS(86);
257 +DECLARE_APQ_GPIO_PINS(87);
258 +DECLARE_APQ_GPIO_PINS(88);
259 +DECLARE_APQ_GPIO_PINS(89);
260 +
261 +#define FUNCTION(fname) \
262 + [APQ_MUX_##fname] = { \
263 + .name = #fname, \
264 + .groups = fname##_groups, \
265 + .ngroups = ARRAY_SIZE(fname##_groups), \
266 + }
267 +
268 +#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \
269 + { \
270 + .name = "gpio" #id, \
271 + .pins = gpio##id##_pins, \
272 + .npins = ARRAY_SIZE(gpio##id##_pins), \
273 + .funcs = (int[]){ \
274 + APQ_MUX_NA, /* gpio mode */ \
275 + APQ_MUX_##f1, \
276 + APQ_MUX_##f2, \
277 + APQ_MUX_##f3, \
278 + APQ_MUX_##f4, \
279 + APQ_MUX_##f5, \
280 + APQ_MUX_##f6, \
281 + APQ_MUX_##f7, \
282 + APQ_MUX_##f8, \
283 + APQ_MUX_##f9, \
284 + APQ_MUX_##f10, \
285 + }, \
286 + .nfuncs = 11, \
287 + .ctl_reg = 0x1000 + 0x10 * id, \
288 + .io_reg = 0x1004 + 0x10 * id, \
289 + .intr_cfg_reg = 0x1008 + 0x10 * id, \
290 + .intr_status_reg = 0x100c + 0x10 * id, \
291 + .intr_target_reg = 0x400 + 0x4 * id, \
292 + .mux_bit = 2, \
293 + .pull_bit = 0, \
294 + .drv_bit = 6, \
295 + .oe_bit = 9, \
296 + .in_bit = 0, \
297 + .out_bit = 1, \
298 + .intr_enable_bit = 0, \
299 + .intr_status_bit = 0, \
300 + .intr_ack_high = 1, \
301 + .intr_target_bit = 0, \
302 + .intr_raw_status_bit = 3, \
303 + .intr_polarity_bit = 1, \
304 + .intr_detection_bit = 2, \
305 + .intr_detection_width = 1, \
306 + }
307 +
308 +enum apq8064_functions {
309 + APQ_MUX_cam_mclk,
310 + APQ_MUX_codec_mic_i2s,
311 + APQ_MUX_codec_spkr_i2s,
312 + APQ_MUX_gsbi1,
313 + APQ_MUX_gsbi2,
314 + APQ_MUX_gsbi3,
315 + APQ_MUX_gsbi4,
316 + APQ_MUX_gsbi4_cam_i2c,
317 + APQ_MUX_gsbi5,
318 + APQ_MUX_gsbi5_spi_cs1,
319 + APQ_MUX_gsbi5_spi_cs2,
320 + APQ_MUX_gsbi5_spi_cs3,
321 + APQ_MUX_gsbi6,
322 + APQ_MUX_gsbi6_spi_cs1,
323 + APQ_MUX_gsbi6_spi_cs2,
324 + APQ_MUX_gsbi6_spi_cs3,
325 + APQ_MUX_gsbi7,
326 + APQ_MUX_gsbi7_spi_cs1,
327 + APQ_MUX_gsbi7_spi_cs2,
328 + APQ_MUX_gsbi7_spi_cs3,
329 + APQ_MUX_gsbi_cam_i2c,
330 + APQ_MUX_hdmi,
331 + APQ_MUX_mi2s,
332 + APQ_MUX_riva_bt,
333 + APQ_MUX_riva_fm,
334 + APQ_MUX_riva_wlan,
335 + APQ_MUX_sdc2,
336 + APQ_MUX_sdc4,
337 + APQ_MUX_slimbus,
338 + APQ_MUX_spkr_i2s,
339 + APQ_MUX_tsif1,
340 + APQ_MUX_tsif2,
341 + APQ_MUX_usb2_hsic,
342 + APQ_MUX_NA,
343 +};
344 +
345 +static const char * const cam_mclk_groups[] = {
346 + "gpio4" "gpio5"
347 +};
348 +static const char * const codec_mic_i2s_groups[] = {
349 + "gpio34", "gpio35", "gpio36", "gpio37", "gpio38"
350 +};
351 +static const char * const codec_spkr_i2s_groups[] = {
352 + "gpio39", "gpio40", "gpio41", "gpio42"
353 +};
354 +static const char * const gsbi1_groups[] = {
355 + "gpio18", "gpio19", "gpio20", "gpio21"
356 +};
357 +static const char * const gsbi2_groups[] = {
358 + "gpio22", "gpio23", "gpio24", "gpio25"
359 +};
360 +static const char * const gsbi3_groups[] = {
361 + "gpio6", "gpio7", "gpio8", "gpio9"
362 +};
363 +static const char * const gsbi4_groups[] = {
364 + "gpio10", "gpio11", "gpio12", "gpio13"
365 +};
366 +static const char * const gsbi4_cam_i2c_groups[] = {
367 + "gpio10", "gpio11", "gpio12", "gpio13"
368 +};
369 +static const char * const gsbi5_groups[] = {
370 + "gpio51", "gpio52", "gpio53", "gpio54"
371 +};
372 +static const char * const gsbi5_spi_cs1_groups[] = {
373 + "gpio47"
374 +};
375 +static const char * const gsbi5_spi_cs2_groups[] = {
376 + "gpio31"
377 +};
378 +static const char * const gsbi5_spi_cs3_groups[] = {
379 + "gpio32"
380 +};
381 +static const char * const gsbi6_groups[] = {
382 + "gpio14", "gpio15", "gpio16", "gpio17"
383 +};
384 +static const char * const gsbi6_spi_cs1_groups[] = {
385 + "gpio47"
386 +};
387 +static const char * const gsbi6_spi_cs2_groups[] = {
388 + "gpio31"
389 +};
390 +static const char * const gsbi6_spi_cs3_groups[] = {
391 + "gpio32"
392 +};
393 +static const char * const gsbi7_groups[] = {
394 + "gpio82", "gpio83", "gpio84", "gpio85"
395 +};
396 +static const char * const gsbi7_spi_cs1_groups[] = {
397 + "gpio47"
398 +};
399 +static const char * const gsbi7_spi_cs2_groups[] = {
400 + "gpio31"
401 +};
402 +static const char * const gsbi7_spi_cs3_groups[] = {
403 + "gpio32"
404 +};
405 +static const char * const gsbi_cam_i2c_groups[] = {
406 + "gpio10", "gpio11", "gpio12", "gpio13"
407 +};
408 +static const char * const hdmi_groups[] = {
409 + "gpio69", "gpio70", "gpio71", "gpio72"
410 +};
411 +static const char * const mi2s_groups[] = {
412 + "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33"
413 +};
414 +static const char * const riva_bt_groups[] = {
415 + "gpio16", "gpio17"
416 +};
417 +static const char * const riva_fm_groups[] = {
418 + "gpio14", "gpio15"
419 +};
420 +static const char * const riva_wlan_groups[] = {
421 + "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
422 +};
423 +static const char * const sdc2_groups[] = {
424 + "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62"
425 +};
426 +static const char * const sdc4_groups[] = {
427 + "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
428 +};
429 +static const char * const slimbus_groups[] = {
430 + "gpio40", "gpio41"
431 +};
432 +static const char * const spkr_i2s_groups[] = {
433 + "gpio47", "gpio48", "gpio49", "gpio50"
434 +};
435 +static const char * const tsif1_groups[] = {
436 + "gpio55", "gpio56", "gpio57"
437 +};
438 +static const char * const tsif2_groups[] = {
439 + "gpio58", "gpio59", "gpio60"
440 +};
441 +static const char * const usb2_hsic_groups[] = {
442 + "gpio88", "gpio89"
443 +};
444 +
445 +static const struct msm_function apq8064_functions[] = {
446 + FUNCTION(cam_mclk),
447 + FUNCTION(codec_mic_i2s),
448 + FUNCTION(codec_spkr_i2s),
449 + FUNCTION(gsbi1),
450 + FUNCTION(gsbi2),
451 + FUNCTION(gsbi3),
452 + FUNCTION(gsbi4),
453 + FUNCTION(gsbi4_cam_i2c),
454 + FUNCTION(gsbi5),
455 + FUNCTION(gsbi5_spi_cs1),
456 + FUNCTION(gsbi5_spi_cs2),
457 + FUNCTION(gsbi5_spi_cs3),
458 + FUNCTION(gsbi6),
459 + FUNCTION(gsbi6_spi_cs1),
460 + FUNCTION(gsbi6_spi_cs2),
461 + FUNCTION(gsbi6_spi_cs3),
462 + FUNCTION(gsbi7),
463 + FUNCTION(gsbi7_spi_cs1),
464 + FUNCTION(gsbi7_spi_cs2),
465 + FUNCTION(gsbi7_spi_cs3),
466 + FUNCTION(gsbi_cam_i2c),
467 + FUNCTION(hdmi),
468 + FUNCTION(mi2s),
469 + FUNCTION(riva_bt),
470 + FUNCTION(riva_fm),
471 + FUNCTION(riva_wlan),
472 + FUNCTION(sdc2),
473 + FUNCTION(sdc4),
474 + FUNCTION(slimbus),
475 + FUNCTION(spkr_i2s),
476 + FUNCTION(tsif1),
477 + FUNCTION(tsif2),
478 + FUNCTION(usb2_hsic),
479 +};
480 +
481 +static const struct msm_pingroup apq8064_groups[] = {
482 + PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
483 + PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
484 + PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
485 + PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
486 + PINGROUP(4, NA, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA),
487 + PINGROUP(5, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA, NA),
488 + PINGROUP(6, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
489 + PINGROUP(7, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
490 + PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
491 + PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
492 + PINGROUP(10, gsbi4, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c, NA),
493 + PINGROUP(11, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c),
494 + PINGROUP(12, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
495 + PINGROUP(13, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
496 + PINGROUP(14, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
497 + PINGROUP(15, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
498 + PINGROUP(16, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
499 + PINGROUP(17, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
500 + PINGROUP(18, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
501 + PINGROUP(19, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
502 + PINGROUP(20, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
503 + PINGROUP(21, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
504 + PINGROUP(22, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
505 + PINGROUP(23, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
506 + PINGROUP(24, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
507 + PINGROUP(25, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
508 + PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
509 + PINGROUP(27, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
510 + PINGROUP(28, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
511 + PINGROUP(29, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
512 + PINGROUP(30, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
513 + PINGROUP(31, mi2s, NA, gsbi5_spi_cs2, gsbi6_spi_cs2, gsbi7_spi_cs2, NA, NA, NA, NA, NA),
514 + PINGROUP(32, mi2s, NA, NA, NA, NA, gsbi5_spi_cs3, gsbi6_spi_cs3, gsbi7_spi_cs3, NA, NA),
515 + PINGROUP(33, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
516 + PINGROUP(34, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
517 + PINGROUP(35, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
518 + PINGROUP(36, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
519 + PINGROUP(37, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
520 + PINGROUP(38, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
521 + PINGROUP(39, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
522 + PINGROUP(40, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
523 + PINGROUP(41, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
524 + PINGROUP(42, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
525 + PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
526 + PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
527 + PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
528 + PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
529 + PINGROUP(47, spkr_i2s, gsbi5_spi_cs1, gsbi6_spi_cs1, gsbi7_spi_cs1, NA, NA, NA, NA, NA, NA),
530 + PINGROUP(48, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
531 + PINGROUP(49, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
532 + PINGROUP(50, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
533 + PINGROUP(51, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
534 + PINGROUP(52, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
535 + PINGROUP(53, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
536 + PINGROUP(54, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
537 + PINGROUP(55, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
538 + PINGROUP(56, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
539 + PINGROUP(57, tsif1, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
540 + PINGROUP(58, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
541 + PINGROUP(59, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
542 + PINGROUP(60, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
543 + PINGROUP(61, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
544 + PINGROUP(62, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
545 + PINGROUP(63, NA, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
546 + PINGROUP(64, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
547 + PINGROUP(65, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
548 + PINGROUP(66, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
549 + PINGROUP(67, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
550 + PINGROUP(68, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
551 + PINGROUP(69, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
552 + PINGROUP(70, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
553 + PINGROUP(71, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
554 + PINGROUP(72, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
555 + PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
556 + PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
557 + PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
558 + PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
559 + PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
560 + PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
561 + PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
562 + PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
563 + PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
564 + PINGROUP(82, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
565 + PINGROUP(83, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA, NA),
566 + PINGROUP(84, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
567 + PINGROUP(85, NA, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA),
568 + PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
569 + PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
570 + PINGROUP(88, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
571 + PINGROUP(89, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
572 +};
573 +
574 +#define NUM_GPIO_PINGROUPS 90
575 +
576 +static const struct msm_pinctrl_soc_data apq8064_pinctrl = {
577 + .pins = apq8064_pins,
578 + .npins = ARRAY_SIZE(apq8064_pins),
579 + .functions = apq8064_functions,
580 + .nfunctions = ARRAY_SIZE(apq8064_functions),
581 + .groups = apq8064_groups,
582 + .ngroups = ARRAY_SIZE(apq8064_groups),
583 + .ngpios = NUM_GPIO_PINGROUPS,
584 +};
585 +
586 +static int apq8064_pinctrl_probe(struct platform_device *pdev)
587 +{
588 + return msm_pinctrl_probe(pdev, &apq8064_pinctrl);
589 +}
590 +
591 +static const struct of_device_id apq8064_pinctrl_of_match[] = {
592 + { .compatible = "qcom,apq8064-pinctrl", },
593 + { },
594 +};
595 +
596 +static struct platform_driver apq8064_pinctrl_driver = {
597 + .driver = {
598 + .name = "apq8064-pinctrl",
599 + .owner = THIS_MODULE,
600 + .of_match_table = apq8064_pinctrl_of_match,
601 + },
602 + .probe = apq8064_pinctrl_probe,
603 + .remove = msm_pinctrl_remove,
604 +};
605 +
606 +static int __init apq8064_pinctrl_init(void)
607 +{
608 + return platform_driver_register(&apq8064_pinctrl_driver);
609 +}
610 +arch_initcall(apq8064_pinctrl_init);
611 +
612 +static void __exit apq8064_pinctrl_exit(void)
613 +{
614 + platform_driver_unregister(&apq8064_pinctrl_driver);
615 +}
616 +module_exit(apq8064_pinctrl_exit);
617 +
618 +MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
619 +MODULE_DESCRIPTION("Qualcomm APQ8064 pinctrl driver");
620 +MODULE_LICENSE("GPL v2");
621 +MODULE_DEVICE_TABLE(of, apq8064_pinctrl_of_match);
622 --
623 1.7.10.4
624