1 From dd280a4cf6b826144f74d3fc4285633f1c337a1d Mon Sep 17 00:00:00 2001
2 From: Kumar Gala <galak@codeaurora.org>
3 Date: Thu, 12 Jun 2014 11:28:47 -0500
4 Subject: [PATCH 143/182] ata: qcom: Add device tree bindings information
6 Add device tree binding for Qualcomm AHCI SATA controller and specifically
7 the sata controller on the IPQ806x family of SoCs.
9 Signed-off-by: Kumar Gala <galak@codeaurora.org>
11 .../devicetree/bindings/ata/qcom-sata.txt | 40 ++++++++++++++++++++
12 1 file changed, 40 insertions(+)
13 create mode 100644 Documentation/devicetree/bindings/ata/qcom-sata.txt
15 diff --git a/Documentation/devicetree/bindings/ata/qcom-sata.txt b/Documentation/devicetree/bindings/ata/qcom-sata.txt
17 index 0000000..5e74e41
19 +++ b/Documentation/devicetree/bindings/ata/qcom-sata.txt
21 +* Qualcomm AHCI SATA Controller
23 +SATA nodes are defined to describe on-chip Serial ATA controllers.
24 +Each SATA controller should have its own node.
27 +- compatible : compatible list, contains "qcom,msm-ahci"
28 +- interrupts : <interrupt mapping for SATA IRQ>
29 +- reg : <registers mapping>
30 +- phys : Must contain exactly one entry as specified
32 +- phy-names : Must be "sata-phy"
34 +Required properties for "qcom,ipq806x-ahci" compatible:
35 +- clocks : Must contain an entry for each entry in clock-names.
36 +- clock-names : Shall be:
37 + "slave_iface" - Fabric port AHB clock for SATA
40 + "rxoob" - RX out-of-band clock
41 + "pmalive" - Power Module Alive clock
45 + compatible = "qcom,ipq806x-ahci", "qcom,msm-ahci";
46 + reg = <0x29000000 0x180>;
48 + interrupts = <0 209 0x0>;
50 + clocks = <&gcc SFAB_SATA_S_H_CLK>,
53 + <&gcc SATA_RXOOB_CLK>,
54 + <&gcc SATA_PMALIVE_CLK>;
55 + clock-names = "slave_iface", "iface", "core",
59 + phy-names = "sata-phy";