target/linux/ramips/patches-3.10/0301-asoc-add-mt7620-support.patch

   1 From c72bc41d018519de5d63ec7790965fbf4605276a Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Tue, 3 Dec 2013 20:18:13 +0100
   4 Subject: [PATCH] asoc: add mt7620 support
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  sound/soc/Kconfig                |    1 +
   9  sound/soc/Makefile               |    1 +
  10  sound/soc/ralink/Kconfig         |   24 +++
  11  sound/soc/ralink/Makefile        |   13 ++
  12  sound/soc/ralink/mt7620-i2s.c    |  429 ++++++++++++++++++++++++++++++++++++++
  13  sound/soc/ralink/mt7620-pcm.c    |   77 +++++++
  14  sound/soc/ralink/mt7620-wm8960.c |  124 +++++++++++
  15  7 files changed, 669 insertions(+)
  16  create mode 100644 sound/soc/ralink/Kconfig
  17  create mode 100644 sound/soc/ralink/Makefile
  18  create mode 100644 sound/soc/ralink/mt7620-i2s.c
  19  create mode 100644 sound/soc/ralink/mt7620-pcm.c
  20  create mode 100644 sound/soc/ralink/mt7620-wm8960.c
  21
  22 Index: linux-3.10.18/sound/soc/Kconfig
  23 ===================================================================
  24 --- linux-3.10.18.orig/sound/soc/Kconfig        2013-11-04 13:31:29.000000000 +0100
  25 +++ linux-3.10.18/sound/soc/Kconfig     2013-12-04 17:52:32.884756569 +0100
  26 @@ -48,6 +48,7 @@
  27  source "sound/soc/mid-x86/Kconfig"
  28  source "sound/soc/mxs/Kconfig"
  29  source "sound/soc/pxa/Kconfig"
  30 +source "sound/soc/ralink/Kconfig"
  31  source "sound/soc/samsung/Kconfig"
  32  source "sound/soc/s6000/Kconfig"
  33  source "sound/soc/sh/Kconfig"
  34 Index: linux-3.10.18/sound/soc/Makefile
  35 ===================================================================
  36 --- linux-3.10.18.orig/sound/soc/Makefile       2013-11-04 13:31:29.000000000 +0100
  37 +++ linux-3.10.18/sound/soc/Makefile    2013-12-04 17:52:32.884756569 +0100
  38 @@ -26,6 +26,7 @@
  39  obj-$(CONFIG_SND_SOC)  += omap/
  40  obj-$(CONFIG_SND_SOC)  += kirkwood/
  41  obj-$(CONFIG_SND_SOC)  += pxa/
  42 +obj-$(CONFIG_SND_SOC)  += ralink/
  43  obj-$(CONFIG_SND_SOC)  += samsung/
  44  obj-$(CONFIG_SND_SOC)  += s6000/
  45  obj-$(CONFIG_SND_SOC)  += sh/
  46 Index: linux-3.10.18/sound/soc/ralink/Kconfig
  47 ===================================================================
  48 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
  49 +++ linux-3.10.18/sound/soc/ralink/Kconfig      2013-12-04 17:52:32.884756569 +0100
  50 @@ -0,0 +1,15 @@
  51 +config SND_MT7620_SOC_I2S
  52 +       depends on SOC_MT7620 && SND_SOC
  53 +       select SND_SOC_GENERIC_DMAENGINE_PCM
  54 +       tristate "SoC Audio (I2S protocol) for Ralink MT7620 SoC"
  55 +       help
  56 +         Say Y if you want to use I2S protocol and I2S codec on Ingenic MT7620
  57 +         based boards.
  58 +
  59 +config SND_MT7620_SOC_WM8960
  60 +       tristate "SoC Audio support for Ralink WM8960"
  61 +       select SND_MT7620_SOC_I2S
  62 +       select SND_SOC_WM8960
  63 +       help
  64 +         Say Y if you want to add support for ASoC audio on the Qi LB60 board
  65 +         a.k.a Qi Ben NanoNote.
  66 Index: linux-3.10.18/sound/soc/ralink/Makefile
  67 ===================================================================
  68 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
  69 +++ linux-3.10.18/sound/soc/ralink/Makefile     2013-12-04 17:52:32.884756569 +0100
  70 @@ -0,0 +1,11 @@
  71 +#
  72 +# Jz4740 Platform Support
  73 +#
  74 +snd-soc-mt7620-i2s-objs := mt7620-i2s.o
  75 +
  76 +obj-$(CONFIG_SND_MT7620_SOC_I2S) += snd-soc-mt7620-i2s.o
  77 +
  78 +# Jz4740 Machine Support
  79 +snd-soc-mt7620-wm8960-objs := mt7620-wm8960.o
  80 +
  81 +obj-$(CONFIG_SND_MT7620_SOC_WM8960) += snd-soc-mt7620-wm8960.o
  82 Index: linux-3.10.18/sound/soc/ralink/mt7620-i2s.c
  83 ===================================================================
  84 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
  85 +++ linux-3.10.18/sound/soc/ralink/mt7620-i2s.c 2013-12-05 21:18:46.913130624 +0100
  86 @@ -0,0 +1,466 @@
  87 +/*
  88 + *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
  89 + *
  90 + *  This program is free software; you can redistribute it and/or modify it
  91 + *  under  the terms of the GNU General  Public License as published by the
  92 + *  Free Software Foundation;  either version 2 of the License, or (at your
  93 + *  option) any later version.
  94 + *
  95 + *  You should have received a copy of the GNU General Public License along
  96 + *  with this program; if not, write to the Free Software Foundation, Inc.,
  97 + *  675 Mass Ave, Cambridge, MA 02139, USA.
  98 + *
  99 + */
 100 +
 101 +#include <linux/init.h>
 102 +#include <linux/io.h>
 103 +#include <linux/kernel.h>
 104 +#include <linux/module.h>
 105 +#include <linux/platform_device.h>
 106 +#include <linux/slab.h>
 107 +
 108 +#include <linux/delay.h>
 109 +
 110 +#include <linux/dma-mapping.h>
 111 +
 112 +#include <sound/core.h>
 113 +#include <sound/pcm.h>
 114 +#include <sound/pcm_params.h>
 115 +#include <sound/soc.h>
 116 +#include <sound/initval.h>
 117 +#include <sound/dmaengine_pcm.h>
 118 +
 119 +#include <ralink_regs.h>
 120 +
 121 +#define I2S_REG_CFG0           0x00
 122 +#define I2S_REG_CFG0_EN                BIT(31)
 123 +#define I2S_REG_CFG0_DMA_EN    BIT(30)
 124 +#define I2S_REG_CFG0_BYTE_SWAP BIT(28)
 125 +#define I2S_REG_CFG0_TX_EN     BIT(24)
 126 +#define I2S_REG_CFG0_RX_EN     BIT(20)
 127 +#define I2S_REG_CFG0_SLAVE     BIT(16)
 128 +#define I2S_REG_CFG0_RX_THRES  12
 129 +#define I2S_REG_CFG0_TX_THRES  4
 130 +#define I2S_REG_CFG0_DFT_THRES (4 << I2S_REG_CFG0_RX_THRES) | \
 131 +                                       (4 << I2S_REG_CFG0_TX_THRES)
 132 +
 133 +#define I2S_REG_INT_STATUS     0x04
 134 +#define I2S_REG_INT_EN         0x08
 135 +#define I2S_REG_FF_STATUS      0x0c
 136 +#define I2S_REG_WREG           0x10
 137 +#define I2S_REG_RREG           0x14
 138 +#define I2S_REG_CFG1           0x18
 139 +
 140 +#define I2S_REG_DIVCMP         0x20
 141 +#define I2S_REG_DIVINT         0x24
 142 +#define I2S_REG_CLK_EN         BIT(31)
 143 +
 144 +struct mt7620_i2s {
 145 +       struct resource *mem;
 146 +       void __iomem *base;
 147 +       dma_addr_t phys_base;
 148 +
 149 +       struct snd_dmaengine_dai_dma_data playback_dma_data;
 150 +       struct snd_dmaengine_dai_dma_data capture_dma_data;
 151 +};
 152 +
 153 +static inline uint32_t mt7620_i2s_read(const struct mt7620_i2s *i2s,
 154 +       unsigned int reg)
 155 +{
 156 +       return readl(i2s->base + reg);
 157 +}
 158 +
 159 +static inline void mt7620_i2s_write(const struct mt7620_i2s *i2s,
 160 +       unsigned int reg, uint32_t value)
 161 +{
 162 +       //printk("i2s --> %p = 0x%08X\n", i2s->base + reg, value);
 163 +       writel(value, i2s->base + reg);
 164 +}
 165 +
 166 +static int mt7620_i2s_startup(struct snd_pcm_substream *substream,
 167 +       struct snd_soc_dai *dai)
 168 +{
 169 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 170 +       uint32_t cfg;
 171 +
 172 +       if (dai->active)
 173 +               return 0;
 174 +
 175 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 176 +       cfg |= I2S_REG_CFG0_EN;
 177 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 178 +
 179 +       return 0;
 180 +}
 181 +
 182 +static void mt7620_i2s_shutdown(struct snd_pcm_substream *substream,
 183 +       struct snd_soc_dai *dai)
 184 +{
 185 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 186 +       uint32_t cfg;
 187 +
 188 +       if (dai->active)
 189 +               return;
 190 +
 191 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 192 +       cfg &= ~I2S_REG_CFG0_EN;
 193 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 194 +}
 195 +
 196 +static int mt7620_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
 197 +       struct snd_soc_dai *dai)
 198 +{
 199 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 200 +
 201 +       uint32_t cfg;
 202 +       uint32_t mask;
 203 +
 204 +       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 205 +               mask = I2S_REG_CFG0_TX_EN;
 206 +       else
 207 +               mask = I2S_REG_CFG0_RX_EN;
 208 +
 209 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 210 +
 211 +       switch (cmd) {
 212 +       case SNDRV_PCM_TRIGGER_START:
 213 +       case SNDRV_PCM_TRIGGER_RESUME:
 214 +       case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 215 +               cfg |= mask;
 216 +               break;
 217 +       case SNDRV_PCM_TRIGGER_STOP:
 218 +       case SNDRV_PCM_TRIGGER_SUSPEND:
 219 +       case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 220 +               cfg &= ~mask;
 221 +               break;
 222 +       default:
 223 +               return -EINVAL;
 224 +       }
 225 +
 226 +       if (cfg & (I2S_REG_CFG0_TX_EN | I2S_REG_CFG0_RX_EN))
 227 +               cfg |= I2S_REG_CFG0_DMA_EN;
 228 +       else
 229 +               cfg &= ~I2S_REG_CFG0_DMA_EN;
 230 +
 231 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 232 +
 233 +       return 0;
 234 +}
 235 +
 236 +static int mt7620_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 237 +{
 238 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 239 +       uint32_t cfg;
 240 +
 241 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 242 +
 243 +       switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 244 +       case SND_SOC_DAIFMT_CBS_CFS:
 245 +               cfg |= I2S_REG_CFG0_SLAVE;
 246 +               break;
 247 +       case SND_SOC_DAIFMT_CBM_CFM:
 248 +               cfg &= ~I2S_REG_CFG0_SLAVE;
 249 +               break;
 250 +       case SND_SOC_DAIFMT_CBM_CFS:
 251 +       default:
 252 +               return -EINVAL;
 253 +       }
 254 +
 255 +       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 256 +       case SND_SOC_DAIFMT_I2S:
 257 +       case SND_SOC_DAIFMT_MSB:
 258 +               cfg &= ~I2S_REG_CFG0_BYTE_SWAP;
 259 +               break;
 260 +       case SND_SOC_DAIFMT_LSB:
 261 +               cfg |= I2S_REG_CFG0_BYTE_SWAP;
 262 +               break;
 263 +       default:
 264 +               return -EINVAL;
 265 +       }
 266 +
 267 +       switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 268 +       case SND_SOC_DAIFMT_NB_NF:
 269 +               break;
 270 +       default:
 271 +               return -EINVAL;
 272 +       }
 273 +
 274 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 275 +
 276 +       return 0;
 277 +}
 278 +
 279 +static int mt7620_i2s_hw_params(struct snd_pcm_substream *substream,
 280 +       struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 281 +{
 282 +
 283 +       return 0;
 284 +}
 285 +
 286 +unsigned long i2sMaster_inclk_int[11] = {
 287 +       78,     56,     52,     39,     28,     26,     19,     14,     13,     9,      6};
 288 +unsigned long i2sMaster_inclk_comp[11] = {
 289 +       64,     352,    42,     32,     176,    21,     272,    88,     10,     455,    261};
 290 +
 291 +
 292 +static int mt7620_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
 293 +       unsigned int freq, int dir)
 294 +{
 295 +        struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 296 +
 297 +       printk("Internal REFCLK with fractional division\n");
 298 +
 299 +       mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
 300 +       mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
 301 +               i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
 302 +
 303 +/*     struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 304 +       struct clk *parent;
 305 +       int ret = 0;
 306 +
 307 +       switch (clk_id) {
 308 +       case JZ4740_I2S_CLKSRC_EXT:
 309 +               parent = clk_get(NULL, "ext");
 310 +               clk_set_parent(i2s->clk_i2s, parent);
 311 +               break;
 312 +       case JZ4740_I2S_CLKSRC_PLL:
 313 +               parent = clk_get(NULL, "pll half");
 314 +               clk_set_parent(i2s->clk_i2s, parent);
 315 +               ret = clk_set_rate(i2s->clk_i2s, freq);
 316 +               break;
 317 +       default:
 318 +               return -EINVAL;
 319 +       }
 320 +       clk_put(parent);
 321 +
 322 +       return ret;*/
 323 +       return 0;
 324 +}
 325 +
 326 +static int mt7620_i2s_suspend(struct snd_soc_dai *dai)
 327 +{
 328 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 329 +       uint32_t cfg;
 330 +
 331 +       if (dai->active) {
 332 +               cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 333 +               cfg &= ~I2S_REG_CFG0_TX_EN;
 334 +               mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 335 +       }
 336 +
 337 +       return 0;
 338 +}
 339 +
 340 +static int mt7620_i2s_resume(struct snd_soc_dai *dai)
 341 +{
 342 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 343 +       uint32_t cfg;
 344 +
 345 +       if (dai->active) {
 346 +               cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 347 +               cfg |= I2S_REG_CFG0_TX_EN;
 348 +               mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 349 +       }
 350 +
 351 +       return 0;
 352 +}
 353 +
 354 +static void mt7620_i2c_init_pcm_config(struct mt7620_i2s *i2s)
 355 +{
 356 +       struct snd_dmaengine_dai_dma_data *dma_data;
 357 +
 358 +       /* Playback */
 359 +       dma_data = &i2s->playback_dma_data;
 360 +       dma_data->maxburst = 16;
 361 +       dma_data->slave_id = 2; //JZ4740_DMA_TYPE_AIC_TRANSMIT;
 362 +       dma_data->addr = i2s->phys_base + I2S_REG_WREG;
 363 +
 364 +       /* Capture */
 365 +       dma_data = &i2s->capture_dma_data;
 366 +       dma_data->maxburst = 16;
 367 +       dma_data->slave_id = 3; //JZ4740_DMA_TYPE_AIC_RECEIVE;
 368 +       dma_data->addr = i2s->phys_base + I2S_REG_RREG;
 369 +}
 370 +
 371 +static int mt7620_i2s_dai_probe(struct snd_soc_dai *dai)
 372 +{
 373 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 374 +       uint32_t data;
 375 +
 376 +       mt7620_i2c_init_pcm_config(i2s);
 377 +       dai->playback_dma_data = &i2s->playback_dma_data;
 378 +       dai->capture_dma_data = &i2s->capture_dma_data;
 379 +
 380 +       /* set share pins to i2s/gpio mode and i2c mode */
 381 +       data = rt_sysc_r32(0x60);
 382 +       data &= 0xFFFFFFE2;
 383 +       data |= 0x00000018;
 384 +       rt_sysc_w32(data, 0x60);
 385 +
 386 +       printk("Internal REFCLK with fractional division\n");
 387 +
 388 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, I2S_REG_CFG0_DFT_THRES);
 389 +       mt7620_i2s_write(i2s, I2S_REG_CFG1, 0);
 390 +       mt7620_i2s_write(i2s, I2S_REG_INT_EN, 0);
 391 +
 392 +       mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
 393 +       mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
 394 +               i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
 395 +
 396 +       return 0;
 397 +}
 398 +
 399 +static int mt7620_i2s_dai_remove(struct snd_soc_dai *dai)
 400 +{
 401 +       return 0;
 402 +}
 403 +
 404 +static const struct snd_soc_dai_ops mt7620_i2s_dai_ops = {
 405 +       .startup = mt7620_i2s_startup,
 406 +       .shutdown = mt7620_i2s_shutdown,
 407 +       .trigger = mt7620_i2s_trigger,
 408 +       .hw_params = mt7620_i2s_hw_params,
 409 +       .set_fmt = mt7620_i2s_set_fmt,
 410 +       .set_sysclk = mt7620_i2s_set_sysclk,
 411 +};
 412 +
 413 +#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
 414 +               SNDRV_PCM_FMTBIT_S16_LE)
 415 +
 416 +static struct snd_soc_dai_driver mt7620_i2s_dai = {
 417 +       .probe = mt7620_i2s_dai_probe,
 418 +       .remove = mt7620_i2s_dai_remove,
 419 +       .playback = {
 420 +               .channels_min = 1,
 421 +               .channels_max = 2,
 422 +               .rates = SNDRV_PCM_RATE_8000_48000,
 423 +               .formats = JZ4740_I2S_FMTS,
 424 +       },
 425 +       .capture = {
 426 +               .channels_min = 2,
 427 +               .channels_max = 2,
 428 +               .rates = SNDRV_PCM_RATE_8000_48000,
 429 +               .formats = JZ4740_I2S_FMTS,
 430 +       },
 431 +       .symmetric_rates = 1,
 432 +       .ops = &mt7620_i2s_dai_ops,
 433 +       .suspend = mt7620_i2s_suspend,
 434 +       .resume = mt7620_i2s_resume,
 435 +};
 436 +
 437 +static const struct snd_pcm_hardware mt7620_pcm_hardware = {
 438 +       .info = SNDRV_PCM_INFO_MMAP |
 439 +               SNDRV_PCM_INFO_MMAP_VALID |
 440 +               SNDRV_PCM_INFO_INTERLEAVED |
 441 +               SNDRV_PCM_INFO_BLOCK_TRANSFER,
 442 +       .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
 443 +       .period_bytes_min       = PAGE_SIZE,
 444 +       .period_bytes_max       = 64 * 1024,
 445 +       .periods_min            = 2,
 446 +       .periods_max            = 128,
 447 +       .buffer_bytes_max       = 128 * 1024,
 448 +       .fifo_size              = 32,
 449 +};
 450 +
 451 +static const struct snd_dmaengine_pcm_config mt7620_dmaengine_pcm_config = {
 452 +       .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
 453 +       .pcm_hardware = &mt7620_pcm_hardware,
 454 +       .prealloc_buffer_size = 256 * PAGE_SIZE,
 455 +};
 456 +
 457 +static const struct snd_soc_component_driver mt7620_i2s_component = {
 458 +       .name = "mt7620-i2s",
 459 +};
 460 +
 461 +static int mt7620_i2s_dev_probe(struct platform_device *pdev)
 462 +{
 463 +       struct mt7620_i2s *i2s;
 464 +       int ret;
 465 +
 466 +       snd_dmaengine_pcm_register(&pdev->dev,
 467 +               &mt7620_dmaengine_pcm_config,
 468 +               SND_DMAENGINE_PCM_FLAG_COMPAT);
 469 +
 470 +       i2s = kzalloc(sizeof(*i2s), GFP_KERNEL);
 471 +       if (!i2s)
 472 +               return -ENOMEM;
 473 +
 474 +       i2s->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 475 +       if (!i2s->mem) {
 476 +               ret = -ENOENT;
 477 +               goto err_free;
 478 +       }
 479 +
 480 +       i2s->mem = request_mem_region(i2s->mem->start, resource_size(i2s->mem),
 481 +                               pdev->name);
 482 +       if (!i2s->mem) {
 483 +               ret = -EBUSY;
 484 +               goto err_free;
 485 +       }
 486 +
 487 +       i2s->base = ioremap_nocache(i2s->mem->start, resource_size(i2s->mem));
 488 +       if (!i2s->base) {
 489 +               ret = -EBUSY;
 490 +               goto err_release_mem_region;
 491 +       }
 492 +
 493 +       i2s->phys_base = i2s->mem->start;
 494 +
 495 +       platform_set_drvdata(pdev, i2s);
 496 +       ret = snd_soc_register_component(&pdev->dev, &mt7620_i2s_component,
 497 +                                        &mt7620_i2s_dai, 1);
 498 +
 499 +       if (!ret) {
 500 +               dev_err(&pdev->dev, "loaded\n");
 501 +               return ret;
 502 +       }
 503 +
 504 +       dev_err(&pdev->dev, "Failed to register DAI\n");
 505 +       iounmap(i2s->base);
 506 +
 507 +err_release_mem_region:
 508 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 509 +err_free:
 510 +       kfree(i2s);
 511 +
 512 +       return ret;
 513 +}
 514 +
 515 +static int mt7620_i2s_dev_remove(struct platform_device *pdev)
 516 +{
 517 +       struct mt7620_i2s *i2s = platform_get_drvdata(pdev);
 518 +
 519 +       snd_soc_unregister_component(&pdev->dev);
 520 +
 521 +       iounmap(i2s->base);
 522 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 523 +
 524 +       kfree(i2s);
 525 +
 526 +       snd_dmaengine_pcm_unregister(&pdev->dev);
 527 +
 528 +       return 0;
 529 +}
 530 +
 531 +static const struct of_device_id mt7620_i2s_match[] = {
 532 +       { .compatible = "ralink,mt7620a-i2s" },
 533 +       {},
 534 +};
 535 +MODULE_DEVICE_TABLE(of, mt7620_i2s_match);
 536 +
 537 +static struct platform_driver mt7620_i2s_driver = {
 538 +       .probe = mt7620_i2s_dev_probe,
 539 +       .remove = mt7620_i2s_dev_remove,
 540 +       .driver = {
 541 +               .name = "mt7620-i2s",
 542 +               .owner = THIS_MODULE,
 543 +               .of_match_table = mt7620_i2s_match,
 544 +       },
 545 +};
 546 +
 547 +module_platform_driver(mt7620_i2s_driver);
 548 +
 549 +MODULE_AUTHOR("Lars-Peter Clausen, <lars@metafoo.de>");
 550 +MODULE_DESCRIPTION("Ingenic JZ4740 SoC I2S driver");
 551 +MODULE_LICENSE("GPL");
 552 +MODULE_ALIAS("platform:mt7620-i2s");
 553 Index: linux-3.10.18/sound/soc/ralink/mt7620-wm8960.c
 554 ===================================================================
 555 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
 556 +++ linux-3.10.18/sound/soc/ralink/mt7620-wm8960.c      2013-12-04 17:52:32.884756569 +0100
 557 @@ -0,0 +1,125 @@
 558 +/*
 559 + * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
 560 + *
 561 + * This program is free software; you can redistribute it and/or modify
 562 + * it under the terms of the GNU General Public License version 2 as
 563 + * published by the Free Software Foundation.
 564 + *
 565 + *  You should have received a copy of the  GNU General Public License along
 566 + *  with this program; if not, write  to the Free Software Foundation, Inc.,
 567 + *  675 Mass Ave, Cambridge, MA 02139, USA.
 568 + *
 569 + */
 570 +
 571 +#include <linux/module.h>
 572 +#include <linux/moduleparam.h>
 573 +#include <linux/of.h>
 574 +#include <linux/timer.h>
 575 +#include <linux/interrupt.h>
 576 +#include <linux/platform_device.h>
 577 +#include <sound/core.h>
 578 +#include <sound/pcm.h>
 579 +#include <sound/soc.h>
 580 +
 581 +
 582 +static const struct snd_soc_dapm_widget mt7620_wm8960_widgets[] = {
 583 +       SND_SOC_DAPM_SPK("Speaker", NULL),
 584 +};
 585 +
 586 +static const struct snd_soc_dapm_route mt7620_wm8960_routes[] = {
 587 +       {"Speaker", NULL, "HP_L"},
 588 +       {"Speaker", NULL, "HP_R"},
 589 +};
 590 +
 591 +#define MT7620_DAIFMT (SND_SOC_DAIFMT_I2S | \
 592 +                       SND_SOC_DAIFMT_NB_NF | \
 593 +                       SND_SOC_DAIFMT_CBM_CFM)
 594 +
 595 +static int mt7620_wm8960_codec_init(struct snd_soc_pcm_runtime *rtd)
 596 +{
 597 +       struct snd_soc_codec *codec = rtd->codec;
 598 +       struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
 599 +       struct snd_soc_dapm_context *dapm = &codec->dapm;
 600 +       int ret;
 601 +
 602 +       snd_soc_dapm_enable_pin(dapm, "HP_L");
 603 +       snd_soc_dapm_enable_pin(dapm, "HP_R");
 604 +
 605 +       ret = snd_soc_dai_set_fmt(cpu_dai, MT7620_DAIFMT);
 606 +       if (ret < 0) {
 607 +               dev_err(codec->dev, "Failed to set cpu dai format: %d\n", ret);
 608 +               return ret;
 609 +       }
 610 +
 611 +       return 0;
 612 +}
 613 +
 614 +static struct snd_soc_dai_link mt7620_wm8960_dai = {
 615 +       .name = "mt7620",
 616 +       .stream_name = "mt7620",
 617 +       .init = mt7620_wm8960_codec_init,
 618 +       .codec_dai_name = "wm8960-hifi",
 619 +};
 620 +
 621 +static struct snd_soc_card mt7620_wm8960 = {
 622 +       .name = "mt7620-wm8960",
 623 +       .owner = THIS_MODULE,
 624 +       .dai_link = &mt7620_wm8960_dai,
 625 +       .num_links = 1,
 626 +
 627 +       .dapm_widgets = mt7620_wm8960_widgets,
 628 +       .num_dapm_widgets = ARRAY_SIZE(mt7620_wm8960_widgets),
 629 +       .dapm_routes = mt7620_wm8960_routes,
 630 +       .num_dapm_routes = ARRAY_SIZE(mt7620_wm8960_routes),
 631 +};
 632 +
 633 +static int mt7620_wm8960_probe(struct platform_device *pdev)
 634 +{
 635 +       struct device_node *np = pdev->dev.of_node;
 636 +       struct snd_soc_card *card = &mt7620_wm8960;
 637 +       int ret;
 638 +
 639 +       card->dev = &pdev->dev;
 640 +
 641 +       mt7620_wm8960_dai.cpu_of_node = of_parse_phandle(np, "cpu-dai", 0);
 642 +       mt7620_wm8960_dai.codec_of_node = of_parse_phandle(np, "codec-dai", 0);
 643 +       mt7620_wm8960_dai.platform_of_node = mt7620_wm8960_dai.cpu_of_node;
 644 +
 645 +       ret = snd_soc_register_card(card);
 646 +       if (ret) {
 647 +               dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
 648 +                       ret);
 649 +       }
 650 +       return ret;
 651 +}
 652 +
 653 +static int mt7620_wm8960_remove(struct platform_device *pdev)
 654 +{
 655 +       struct snd_soc_card *card = platform_get_drvdata(pdev);
 656 +
 657 +       snd_soc_unregister_card(card);
 658 +       return 0;
 659 +}
 660 +
 661 +static const struct of_device_id mt7620_audio_match[] = {
 662 +       { .compatible = "ralink,wm8960-audio" },
 663 +       {},
 664 +};
 665 +MODULE_DEVICE_TABLE(of, mt7620_audio_match);
 666 +
 667 +static struct platform_driver mt7620_wm8960_driver = {
 668 +       .driver         = {
 669 +               .name   = "wm8960-audio",
 670 +               .owner  = THIS_MODULE,
 671 +               .of_match_table = mt7620_audio_match,
 672 +       },
 673 +       .probe          = mt7620_wm8960_probe,
 674 +       .remove         = mt7620_wm8960_remove,
 675 +};
 676 +
 677 +module_platform_driver(mt7620_wm8960_driver);
 678 +
 679 +MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 680 +MODULE_DESCRIPTION("ALSA SoC QI LB60 Audio support");
 681 +MODULE_LICENSE("GPL v2");
 682 +MODULE_ALIAS("platform:qi-lb60-audio");
 683 Index: linux-3.10.18/arch/mips/ralink/of.c
 684 ===================================================================
 685 --- linux-3.10.18.orig/arch/mips/ralink/of.c    2013-12-04 17:52:32.736756565 +0100
 686 +++ linux-3.10.18/arch/mips/ralink/of.c 2013-12-04 17:52:32.884756569 +0100
 687 @@ -15,6 +15,7 @@
 688  #include <linux/of_fdt.h>
 689  #include <linux/kernel.h>
 690  #include <linux/bootmem.h>
 691 +#include <linux/module.h>
 692  #include <linux/of_platform.h>
 693  #include <linux/of_address.h>
 694
 695 @@ -25,6 +26,7 @@
 696  #include "common.h"
 697
 698  __iomem void *rt_sysc_membase;
 699 +EXPORT_SYMBOL(rt_sysc_membase);
 700  __iomem void *rt_memc_membase;
 701
 702  extern struct boot_param_header __dtb_start;
 703 Index: linux-3.10.18/sound/soc/soc-io.c
 704 ===================================================================
 705 --- linux-3.10.18.orig/sound/soc/soc-io.c       2013-11-04 13:31:29.000000000 +0100
 706 +++ linux-3.10.18/sound/soc/soc-io.c    2013-12-04 17:52:32.888756569 +0100
 707 @@ -19,7 +19,6 @@
 708
 709  #include <trace/events/asoc.h>
 710
 711 -#ifdef CONFIG_REGMAP
 712  static int hw_write(struct snd_soc_codec *codec, unsigned int reg,
 713                     unsigned int value)
 714  {
 715 @@ -161,12 +160,3 @@
 716         return PTR_RET(codec->control_data);
 717  }
 718  EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
 719 -#else
 720 -int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
 721 -                              int addr_bits, int data_bits,
 722 -                              enum snd_soc_control_type control)
 723 -{
 724 -       return -ENOTSUPP;
 725 -}
 726 -EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
 727 -#endif