ramips: add support for indicating the boot state using multiple leds

[openwrt/staging/mkresin.git] / target / linux / ramips / dts / PBR-M1.dts

diff --git a/target/linux/ramips/dts/PBR-M1.dts b/target/linux/ramips/dts/PBR-M1.dts
index c6b09effec9c91e8727c31cb3fa0eeaeeae01f99..2ff8940c45b7e3ffc83641629d8359e149697bc8 100644 (file)
--- a/target/linux/ramips/dts/PBR-M1.dts
+++ b/target/linux/ramips/dts/PBR-M1.dts
@@ -10,7 +10,10 @@
        model = "PBR-M1";
 
        aliases {
-               led-status = &led_power;
+               led-boot = &led_sys;
+               led-failsafe = &led_sys;
+               led-running = &led_sys;
+               led-upgrade = &led_sys;
        };
 
        memory@0 {
@@ -37,12 +40,13 @@
        gpio-leds {
                compatible = "gpio-leds";
 
-               led_power: power {
+               power {
                        label = "pbr-m1:blue:power";
                        gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+                       default-state = "on";
                };
 
-               sys {
+               led_sys: sys {
                        label = "pbr-m1:blue:sys";
                        gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
                };
@@ -65,8 +69,6 @@
 
        gpio-keys-polled {
                compatible = "gpio-keys-polled";
-               #address-cells = <1>;
-               #size-cells = <0>;
                poll-interval = <20>;
 
                reset {
@@ -107,64 +109,64 @@
 
 &sdhci {
        status = "okay";
-       pinctrl-names = "default";
-       pinctrl-0 = <&sdhci_pins>;
 };
 
 &spi0 {
        status = "okay";
 
        m25p80@0 {
-               #address-cells = <1>;
-               #size-cells = <1>;
                compatible = "jedec,spi-nor";
                reg = <0>;
                spi-max-frequency = <10000000>;
                m25p,chunked-io = <32>;
 
-               partition@0 {
-                       label = "u-boot";
-                       reg = <0x0 0x30000>;
-                       read-only;
-               };
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
 
-               partition@30000 {
-                       label = "u-boot-env";
-                       reg = <0x30000 0x10000>;
-                       read-only;
-               };
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x30000>;
+                               read-only;
+                       };
 
-               factory: partition@40000 {
-                       label = "factory";
-                       reg = <0x40000 0x10000>;
-                       read-only;
-               };
+                       partition@30000 {
+                               label = "u-boot-env";
+                               reg = <0x30000 0x10000>;
+                               read-only;
+                       };
 
-               partition@50000 {
-                       label = "firmware";
-                       reg = <0x50000 0xfb0000>;
+                       factory: partition@40000 {
+                               label = "factory";
+                               reg = <0x40000 0x10000>;
+                               read-only;
+                       };
+
+                       partition@50000 {
+                               label = "firmware";
+                               reg = <0x50000 0xfb0000>;
+                       };
                };
        };
 };
 
 &pcie {
        status = "okay";
+};
 
-       pcie0 {
-               mt76@0,0 {
-                       reg = <0x0000 0 0 0 0>;
-                       device_type = "pci";
-                       mediatek,mtd-eeprom = <&factory 0x8000>;
-                       ieee80211-freq-limit = <5000000 6000000>;
-               };
+&pcie0 {
+       mt76@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x8000>;
+               ieee80211-freq-limit = <5000000 6000000>;
        };
+};
 
-       pcie1 {
-               mt76@1,0 {
-                       reg = <0x0000 0 0 0 0>;
-                       device_type = "pci";
-                       mediatek,mtd-eeprom = <&factory 0x0000>;
-               };
+&pcie1 {
+       mt76@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x0000>;
        };
 };