target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6
   7 #include "mt7622.dtsi"
   8 #include "mt6380.dtsi"
   9
  10 / {
  11         compatible = "linksys,e8450", "mediatek,mt7622";
  12
  13         aliases {
  14                 serial0 = &uart0;
  15                 led-boot = &led_power;
  16                 led-failsafe = &led_power;
  17                 led-running = &led_power;
  18                 led-upgrade = &led_power;
  19         };
  20
  21         chosen {
  22                 stdout-path = "serial0:115200n8";
  23                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
  24         };
  25
  26         cpus {
  27                 cpu@0 {
  28                         proc-supply = <&mt6380_vcpu_reg>;
  29                         sram-supply = <&mt6380_vm_reg>;
  30                 };
  31
  32                 cpu@1 {
  33                         proc-supply = <&mt6380_vcpu_reg>;
  34                         sram-supply = <&mt6380_vm_reg>;
  35                 };
  36         };
  37
  38         gpio-keys {
  39                 compatible = "gpio-keys";
  40
  41                 factory {
  42                         label = "reset";
  43                         linux,code = <KEY_RESTART>;
  44                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  45                 };
  46
  47                 wps {
  48                         label = "wps";
  49                         linux,code = <KEY_WPS_BUTTON>;
  50                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
  51                 };
  52         };
  53
  54         gpio-leds {
  55                 compatible = "gpio-leds";
  56
  57                 led_power: power_blue {
  58                         label = "power:blue";
  59                         gpios = <&pio 95 GPIO_ACTIVE_LOW>;
  60                         default-state = "on";
  61                 };
  62
  63                 power_orange {
  64                         label = "power:orange";
  65                         gpios = <&pio 96 GPIO_ACTIVE_LOW>;
  66                         default-state = "off";
  67                 };
  68
  69                 inet_blue {
  70                         label = "inet:blue";
  71                         gpios = <&pio 97 GPIO_ACTIVE_LOW>;
  72                         default-state = "off";
  73                 };
  74
  75                 inet_orange {
  76                         label = "inet:orange";
  77                         gpios = <&pio 98 GPIO_ACTIVE_LOW>;
  78                         default-state = "off";
  79                 };
  80         };
  81
  82         memory {
  83                 reg = <0 0x40000000 0 0x40000000>;
  84         };
  85
  86         reg_1p8v: regulator-1p8v {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "fixed-1.8V";
  89                 regulator-min-microvolt = <1800000>;
  90                 regulator-max-microvolt = <1800000>;
  91                 regulator-always-on;
  92         };
  93
  94         reg_3p3v: regulator-3p3v {
  95                 compatible = "regulator-fixed";
  96                 regulator-name = "fixed-3.3V";
  97                 regulator-min-microvolt = <3300000>;
  98                 regulator-max-microvolt = <3300000>;
  99                 regulator-boot-on;
 100                 regulator-always-on;
 101         };
 102
 103         reg_5v: regulator-5v {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "fixed-5V";
 106                 regulator-min-microvolt = <5000000>;
 107                 regulator-max-microvolt = <5000000>;
 108                 regulator-boot-on;
 109                 regulator-always-on;
 110         };
 111 };
 112
 113 &btif {
 114         status = "okay";
 115 };
 116
 117 &cir {
 118         pinctrl-names = "default";
 119         pinctrl-0 = <&irrx_pins>;
 120         status = "okay";
 121 };
 122
 123 &eth {
 124         pinctrl-names = "default";
 125         pinctrl-0 = <&eth_pins>;
 126         status = "okay";
 127
 128         gmac0: mac@0 {
 129                 compatible = "mediatek,eth-mac";
 130                 reg = <0>;
 131                 phy-mode = "2500base-x";
 132
 133                 fixed-link {
 134                         speed = <2500>;
 135                         full-duplex;
 136                         pause;
 137                 };
 138         };
 139
 140         mdio-bus {
 141                 #address-cells = <1>;
 142                 #size-cells = <0>;
 143
 144                 switch@0 {
 145                         compatible = "mediatek,mt7531";
 146                         reg = <0>;
 147                         reset-gpios = <&pio 54 0>;
 148
 149                         ports {
 150                                 #address-cells = <1>;
 151                                 #size-cells = <0>;
 152
 153                                 port@0 {
 154                                         reg = <0>;
 155                                         label = "lan1";
 156                                 };
 157
 158                                 port@1 {
 159                                         reg = <1>;
 160                                         label = "lan2";
 161                                 };
 162
 163                                 port@2 {
 164                                         reg = <2>;
 165                                         label = "lan3";
 166                                 };
 167
 168                                 port@3 {
 169                                         reg = <3>;
 170                                         label = "lan4";
 171                                 };
 172
 173                                 wan: port@4 {
 174                                         reg = <4>;
 175                                         label = "wan";
 176                                 };
 177
 178                                 port@6 {
 179                                         reg = <6>;
 180                                         label = "cpu";
 181                                         ethernet = <&gmac0>;
 182                                         phy-mode = "2500base-x";
 183
 184                                         fixed-link {
 185                                                 speed = <2500>;
 186                                                 full-duplex;
 187                                                 pause;
 188                                         };
 189                                 };
 190                         };
 191                 };
 192
 193         };
 194 };
 195
 196 &pcie0 {
 197         pinctrl-names = "default";
 198         pinctrl-0 = <&pcie0_pins>;
 199         status = "okay";
 200 };
 201
 202 &pcie1 {
 203         pinctrl-names = "default";
 204         pinctrl-0 = <&pcie1_pins>;
 205         status = "okay";
 206 };
 207
 208 &pio {
 209         eth_pins: eth-pins {
 210                 mux {
 211                         function = "eth";
 212                         groups = "mdc_mdio", "rgmii_via_gmac2";
 213                 };
 214         };
 215
 216         irrx_pins: irrx-pins {
 217                 mux {
 218                         function = "ir";
 219                         groups =  "ir_1_rx";
 220                 };
 221         };
 222
 223         irtx_pins: irtx-pins {
 224                 mux {
 225                         function = "ir";
 226                         groups =  "ir_1_tx";
 227                 };
 228         };
 229
 230         pcie0_pins: pcie0-pins {
 231                 mux {
 232                         function = "pcie";
 233                         groups = "pcie0_pad_perst",
 234                                  "pcie0_1_waken",
 235                                  "pcie0_1_clkreq";
 236                 };
 237         };
 238
 239         pcie1_pins: pcie1-pins {
 240                 mux {
 241                         function = "pcie";
 242                         groups = "pcie1_pad_perst",
 243                                  "pcie1_0_waken",
 244                                  "pcie1_0_clkreq";
 245                 };
 246         };
 247
 248         pmic_bus_pins: pmic-bus-pins {
 249                 mux {
 250                         function = "pmic";
 251                         groups = "pmic_bus";
 252                 };
 253         };
 254
 255         pwm7_pins: pwm1-2-pins {
 256                 mux {
 257                         function = "pwm";
 258                         groups = "pwm_ch7_2";
 259                 };
 260         };
 261
 262         wled_pins: wled-pins {
 263                 mux {
 264                         function = "led";
 265                         groups = "wled";
 266                 };
 267         };
 268
 269         /* Serial NAND is shared pin with SPI-NOR */
 270         serial_nand_pins: serial-nand-pins {
 271                 mux {
 272                         function = "flash";
 273                         groups = "snfi";
 274                 };
 275         };
 276
 277         spic0_pins: spic0-pins {
 278                 mux {
 279                         function = "spi";
 280                         groups = "spic0_0";
 281                 };
 282         };
 283
 284         spic1_pins: spic1-pins {
 285                 mux {
 286                         function = "spi";
 287                         groups = "spic1_0";
 288                 };
 289         };
 290
 291         uart0_pins: uart0-pins {
 292                 mux {
 293                         function = "uart";
 294                         groups = "uart0_0_tx_rx" ;
 295                 };
 296         };
 297
 298         uart2_pins: uart2-pins {
 299                 mux {
 300                         function = "uart";
 301                         groups = "uart2_1_tx_rx" ;
 302                 };
 303         };
 304
 305         watchdog_pins: watchdog-pins {
 306                 mux {
 307                         function = "watchdog";
 308                         groups = "watchdog";
 309                 };
 310         };
 311 };
 312
 313 &pwm {
 314         pinctrl-names = "default";
 315         pinctrl-0 = <&pwm7_pins>;
 316         status = "okay";
 317 };
 318
 319 &pwrap {
 320         pinctrl-names = "default";
 321         pinctrl-0 = <&pmic_bus_pins>;
 322
 323         status = "okay";
 324 };
 325
 326 &sata {
 327         status = "disabled";
 328 };
 329
 330 &sata_phy {
 331         status = "disabled";
 332 };
 333
 334 &slot0 {
 335         wmac1: mt7915@0,0 {
 336                 reg = <0x0000 0 0 0 0>;
 337                 ieee80211-freq-limit = <5000000 6000000>;
 338         };
 339 };
 340
 341 &snand {
 342         mediatek,quad-spi;
 343         pinctrl-names = "default";
 344         pinctrl-0 = <&serial_nand_pins>;
 345         status = "okay";
 346 };
 347
 348 &spi0 {
 349         pinctrl-names = "default";
 350         pinctrl-0 = <&spic0_pins>;
 351         status = "okay";
 352 };
 353
 354 &spi1 {
 355         pinctrl-names = "default";
 356         pinctrl-0 = <&spic1_pins>;
 357         status = "okay";
 358 };
 359
 360 &ssusb {
 361         vusb33-supply = <&reg_3p3v>;
 362         vbus-supply = <&reg_5v>;
 363         status = "okay";
 364 };
 365
 366 &u3phy {
 367         status = "okay";
 368 };
 369
 370 &uart0 {
 371         pinctrl-names = "default";
 372         pinctrl-0 = <&uart0_pins>;
 373         status = "okay";
 374 };
 375
 376 &uart2 {
 377         pinctrl-names = "default";
 378         pinctrl-0 = <&uart2_pins>;
 379         status = "okay";
 380 };
 381
 382 &rtc {
 383         status = "disabled";
 384 };
 385
 386 &watchdog {
 387         pinctrl-names = "default";
 388         pinctrl-0 = <&watchdog_pins>;
 389         status = "okay";
 390 };