target/linux/apm821xx/dts/apm82181.dtsi

   1 /*
   2  * Device Tree for Bluestone (APM821xx) board.
   3  *
   4  * Copyright (c) 2010, Applied Micro Circuits Corporation
   5  * Author: Tirumala R Marri <tmarri@apm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  *
  22  */
  23
  24 #include <dt-bindings/dma/dw-dmac.h>
  25 #include <dt-bindings/input/input.h>
  26 #include <dt-bindings/interrupt-controller/irq.h>
  27 #include <dt-bindings/gpio/gpio.h>
  28
  29 / {
  30         #address-cells = <2>;
  31         #size-cells = <1>;
  32         dcr-parent = <&{/cpus/cpu@0}>;
  33         compatible = "apm,bluestone";
  34
  35         aliases {
  36                 ethernet0 = &EMAC0; /* needed for BSP u-boot */
  37         };
  38
  39         cpus {
  40                 #address-cells = <1>;
  41                 #size-cells = <0>;
  42
  43                 CPU00: cpu@0 {
  44                         device_type = "cpu";
  45                         model = "PowerPC,apm82181";
  46                         reg = <0x00000000>;
  47                         clock-frequency = <0>; /* Filled in by U-Boot */
  48                         timebase-frequency = <0>; /* Filled in by U-Boot */
  49                         i-cache-line-size = <32>;
  50                         d-cache-line-size = <32>;
  51                         i-cache-size = <32768>;
  52                         d-cache-size = <32768>;
  53                         dcr-controller;
  54                         dcr-access-method = "native";
  55                         next-level-cache = <&L2C0>;
  56                 };
  57         };
  58
  59         memory {
  60                 device_type = "memory";
  61                 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
  62         };
  63
  64         UIC0: interrupt-controller0 {
  65                 compatible = "apm,uic-apm82181", "ibm,uic";
  66                 interrupt-controller;
  67                 cell-index = <0>;
  68                 dcr-reg = <0x0c0 0x009>;
  69                 #address-cells = <0>;
  70                 #size-cells = <0>;
  71                 #interrupt-cells = <2>;
  72         };
  73
  74         UIC1: interrupt-controller1 {
  75                 compatible = "apm,uic-apm82181", "ibm,uic";
  76                 interrupt-controller;
  77                 cell-index = <1>;
  78                 dcr-reg = <0x0d0 0x009>;
  79                 #address-cells = <0>;
  80                 #size-cells = <0>;
  81                 #interrupt-cells = <2>;
  82                 interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH>,
  83                              <0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
  84                 interrupt-parent = <&UIC0>;
  85         };
  86
  87         UIC2: interrupt-controller2 {
  88                 compatible = "apm,uic-apm82181", "ibm,uic";
  89                 interrupt-controller;
  90                 cell-index = <2>;
  91                 dcr-reg = <0x0e0 0x009>;
  92                 #address-cells = <0>;
  93                 #size-cells = <0>;
  94                 #interrupt-cells = <2>;
  95                 interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH>,
  96                              <0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
  97                 interrupt-parent = <&UIC0>;
  98         };
  99
 100         UIC3: interrupt-controller3 {
 101                 compatible = "apm,uic-apm82181","ibm,uic";
 102                 interrupt-controller;
 103                 cell-index = <3>;
 104                 dcr-reg = <0x0f0 0x009>;
 105                 #address-cells = <0>;
 106                 #size-cells = <0>;
 107                 #interrupt-cells = <2>;
 108                 interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH>,
 109                              <0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
 110                 interrupt-parent = <&UIC0>;
 111         };
 112
 113         OCM1: ocm@400040000 {
 114                 compatible = "apm,ocm-apm82181", "ibm,ocm";
 115                 status = "okay";
 116                 cell-index = <1>;
 117                 /* configured in U-Boot */
 118                 reg = <4 0x00040000 0x8000>; /* 32K */
 119         };
 120
 121         SDR0: sdr {
 122                 compatible = "apm,sdr-apm82181", "ibm,sdr-460ex";
 123                 dcr-reg = <0x00e 0x002>;
 124         };
 125
 126         CPR0: cpr {
 127                 compatible = "apm,cpr-apm82181", "ibm,cpr-460ex";
 128                 dcr-reg = <0x00c 0x002>;
 129         };
 130
 131         L2C0: l2c {
 132                 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
 133                 dcr-reg = <0x020 0x008
 134                            0x030 0x008>;
 135                 cache-line-size = <32>;
 136                 cache-size = <262144>;
 137                 interrupt-parent = <&UIC1>;
 138                 interrupts = <0x0b IRQ_TYPE_EDGE_RISING>;
 139         };
 140
 141         CPM0: cpm {
 142                 compatible = "ibm,cpm-apm821xx", "ibm,cpm";
 143                 cell-index = <0>;
 144                 dcr-reg = <0x160 0x003>;
 145                 pm-cpu = <0x02000000>;
 146                 pm-doze = <0x302570F0>;
 147                 pm-nap = <0x302570F0>;
 148                 pm-deepsleep = <0x302570F0>;
 149                 pm-iic-device = <&IIC0>;
 150                 pm-emac-device = <&EMAC0>;
 151                 unused-units = <0x00000100>;
 152                 idle-doze = <0x02000000>;
 153                 standby = <0xfeff791d>;
 154         };
 155
 156         plb {
 157                 compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
 158                 #address-cells = <2>;
 159                 #size-cells = <1>;
 160                 ranges; /* Filled in by U-Boot */
 161                 clock-frequency = <0>; /* Filled in by U-Boot */
 162
 163                 SDRAM0: sdram {
 164                         compatible = "apm,sdram-apm82181", "ibm,sdram-460ex", "ibm,sdram-405gp";
 165                         dcr-reg = <0x010 0x002>;
 166                 };
 167
 168                 RTC: rtc {
 169                         compatible = "ibm,rtc";
 170                         dcr-reg = <0x240 0x009>;
 171                         interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
 172                         interrupt-parent = <&UIC2>;
 173
 174                 };
 175
 176                 TRNG: trng@110000 {
 177                         compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
 178                         reg = <4 0x00110000 0x100>;
 179                         interrupt-parent = <&UIC1>;
 180                         interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
 181                         status = "disabled";
 182                 };
 183
 184                 PKA: pka@114000 {
 185                         compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
 186                         reg = <4 0x00114000 0x4000>;
 187                         interrupt-parent = <&UIC0>;
 188                         interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
 189                         status = "disabled";
 190                 };
 191
 192                 CRYPTO: crypto@180000 {
 193                         compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
 194                         reg = <4 0x00180000 0x80400>;
 195                         interrupt-parent = <&UIC0>;
 196                         interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
 197                         status = "disabled"; /* hardware option */
 198                 };
 199
 200                 MAL0: mcmal {
 201                         compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
 202                         descriptor-memory = "ocm";
 203                         dcr-reg = <0x180 0x062>;
 204                         num-tx-chans = <1>;
 205                         num-rx-chans = <1>;
 206                         #address-cells = <0>;
 207                         #size-cells = <0>;
 208                         interrupt-parent = <&UIC2>;
 209                         interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>,
 210                                      <0x07 IRQ_TYPE_LEVEL_HIGH>,
 211                                      <0x03 IRQ_TYPE_LEVEL_HIGH>,
 212                                      <0x04 IRQ_TYPE_LEVEL_HIGH>,
 213                                      <0x05 IRQ_TYPE_LEVEL_HIGH>,
 214                                      <0x08 IRQ_TYPE_EDGE_FALLING>,
 215                                      <0x09 IRQ_TYPE_EDGE_FALLING>,
 216                                      <0x0c IRQ_TYPE_EDGE_FALLING>,
 217                                      <0x0d IRQ_TYPE_EDGE_FALLING>;
 218                         interrupt-names = "txeob", "rxeob", "serr",
 219                                           "txde", "rxde",
 220                                           "tx0coal", "tx1coal",
 221                                           "rx0coal", "rx1coal";
 222                 };
 223
 224                 POB0: opb {
 225                         compatible = "ibm,opb-460ex", "ibm,opb";
 226                         #address-cells = <1>;
 227                         #size-cells = <1>;
 228                         ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
 229                         clock-frequency = <0>; /* Filled in by U-Boot */
 230
 231                         EBC0: ebc {
 232                                 compatible = "ibm,ebc-460ex", "ibm,ebc";
 233                                 dcr-reg = <0x012 0x002>;
 234                                 #address-cells = <2>;
 235                                 #size-cells = <1>;
 236                                 clock-frequency = <0>; /* Filled in by U-Boot */
 237                                 /* ranges property is supplied by U-Boot */
 238                                 ranges = <0x00000003 0x00000000 0xe0000000 0x8000000>;
 239                                 interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>;
 240                                 interrupt-parent = <&UIC1>;
 241
 242                                 nor_flash@0,0 {
 243                                         compatible = "cfi-flash";
 244                                         bank-width = <1>;
 245                                         reg = <0x00000000 0x00000000 0x00100000>;
 246                                         #address-cells = <1>;
 247                                         #size-cells = <1>;
 248                                         status = "disabled";
 249                                 };
 250
 251                                 ndfc@1,0 {
 252                                         compatible = "ibm,ndfc";
 253                                         reg = <00000003 00000000 00002000>;
 254                                         ccr = <0x00001000>;
 255                                         bank-settings = <0x80002222>;
 256                                         status = "disabled";
 257
 258                                         nand {
 259                                                 #address-cells = <1>;
 260                                                 #size-cells = <1>;
 261                                         };
 262                                 };
 263                         };
 264
 265                         UART0: serial@ef600300 {
 266                                 /*
 267                                  * AMCC's BSP u-boot scans for the "ns16550"
 268                                  * compatible, without it, u-boot wouldn't
 269                                  * set the required "clock-frequency".
 270                                  *
 271                                  * The hardware documentation states:
 272                                  * "Register compatibility with 16750 register set"
 273                                  */
 274                                 compatible = "ns16750", "ns16550";
 275                                 reg = <0xef600300 0x00000008>;
 276                                 virtual-reg = <0xef600300>;
 277                                 clock-frequency = <0>; /* Filled in by U-Boot */
 278                                 interrupt-parent = <&UIC1>;
 279                                 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
 280                                 status = "disabled";
 281                         };
 282
 283                         UART1: serial@ef600400 {
 284                                 /* same "ns16750" as with UART0 */
 285                                 compatible = "ns16750", "ns16550";
 286                                 reg = <0xef600400 0x00000008>;
 287                                 virtual-reg = <0xef600400>;
 288                                 clock-frequency = <0>; /* Filled in by U-Boot */
 289                                 interrupt-parent = <&UIC0>;
 290                                 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
 291                                 status = "disabled";
 292                         };
 293
 294                         IIC0: i2c@ef600700 {
 295                                 compatible = "ibm,iic-460ex", "ibm,iic";
 296                                 reg = <0xef600700 0x00000014>;
 297                                 interrupt-parent = <&UIC0>;
 298                                 interrupts = <0x02 IRQ_TYPE_LEVEL_HIGH>;
 299                                 #address-cells = <1>;
 300                                 #size-cells = <0>;
 301                                 status = "disabled";
 302                         };
 303
 304                         IIC1: i2c@ef600800 {
 305                                 compatible = "ibm,iic-460ex", "ibm,iic";
 306                                 reg = <0xef600800 0x00000014>;
 307                                 interrupt-parent = <&UIC0>;
 308                                 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
 309                                 #address-cells = <1>;
 310                                 #size-cells = <0>;
 311                                 status = "disabled";
 312                         };
 313
 314                         GPIO0: gpio@ef600b00 {
 315                                 compatible = "ibm,ppc4xx-gpio";
 316                                 reg = <0xef600b00 0x00000048>;
 317                                 #gpio-cells = <2>;
 318                                 gpio-controller;
 319                                 status = "disabled";
 320                         };
 321
 322                         EMAC0: ethernet@ef600c00 {
 323                                 device_type = "network";
 324                                 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
 325                                 interrupt-parent = <&EMAC0>;
 326                                 interrupts = <0 1>;
 327                                 #interrupt-cells = <1>;
 328                                 #address-cells = <0>;
 329                                 #size-cells = <0>;
 330                                 interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH>,
 331                                                 <1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH>;
 332                                 interrupt-names = "status", "wake";
 333
 334                                 reg = <0xef600c00 0x000000c4>;
 335                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 336                                 mal-device = <&MAL0>;
 337                                 mal-tx-channel = <0>;
 338                                 mal-rx-channel = <0>;
 339                                 cell-index = <0>;
 340                                 max-frame-size = <9000>;
 341                                 rx-fifo-size = <16384>;
 342                                 tx-fifo-size = <2048>;
 343                                 phy-mode = "rgmii";
 344                                 phy-map = <0x00000000>;
 345                                 rgmii-device = <&RGMII0>;
 346                                 rgmii-channel = <0>;
 347                                 tah-device = <&TAH0>;
 348                                 tah-channel = <0>;
 349                                 has-inverted-stacr-oc;
 350                                 has-new-stacr-staopc;
 351                                 status = "disabled";
 352                         };
 353
 354                         TAH0: emac-tah@ef601350 {
 355                                 compatible = "ibm,tah-460ex", "ibm,tah";
 356                                 reg = <0xef601350 0x00000030>;
 357                         };
 358
 359                         RGMII0: emac-rgmii@ef601500 {
 360                                 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
 361                                 reg = <0xef601500 0x00000008>;
 362                                 has-mdio;
 363                         };
 364                 };
 365
 366                 USBOTG0: usbotg@bff80000 {
 367                         compatible = "amcc,dwc-otg";
 368                         reg = <4 0xbff80000 0x10000>;
 369                         interrupt-parent = <&USBOTG0>;
 370                         interrupts = <0 1 2>;
 371                         #interrupt-cells = <1>;
 372                         #address-cells = <0>;
 373                         #size-cells = <0>;
 374                         interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH>,
 375                                         <1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW>,
 376                                         <2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH>;
 377                         interrupt-names = "usb-otg", "high-power", "dma";
 378                         dr_mode = "host";
 379                         status = "disabled";
 380                 };
 381
 382                 AHBDMA0: dma@bffd0800 {
 383                         compatible = "snps,dma-spear1340";
 384                         reg = <4 0xbffd0800 0x400>;
 385                         interrupt-parent = <&UIC0>;
 386                         interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
 387                         #dma-cells = <3>;
 388
 389                         dma-channels = <2>;
 390                         dma-masters = <3>;
 391                         block_size = <4095>;
 392                         data-width = <4>, <4>, <4>;
 393                         multi-block = <1>, <1>;
 394
 395                         chan_allocation_order = <1>;
 396                         chan_priority = <1>;
 397
 398                         snps,dma-protection-control =
 399                                 <(DW_DMAC_HPROT1_PRIVILEGED_MODE |
 400                                   DW_DMAC_HPROT2_BUFFERABLE)>;
 401                         is_memcpy;
 402                 };
 403
 404                 SATA0: sata@bffd1000 {
 405                         compatible = "amcc,sata-460ex";
 406                         reg = <4 0xbffd1000 0x800>;
 407                         interrupt-parent = <&UIC0>;
 408                         interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
 409                         dmas = <&AHBDMA0 0 0 1>;
 410                         dma-names = "sata-dma";
 411                         status = "disabled";
 412                         #address-cells = <1>;
 413                         #size-cells = <0>;
 414                 };
 415
 416                 SATA1: sata@bffd1800 {
 417                         compatible = "amcc,sata-460ex";
 418                         reg = <4 0xbffd1800 0x800>;
 419                         interrupt-parent = <&UIC0>;
 420                         interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
 421                         dmas = <&AHBDMA0 1 0 2>;
 422                         dma-names = "sata-dma";
 423                         status = "disabled";
 424                         #address-cells = <1>;
 425                         #size-cells = <0>;
 426                 };
 427
 428                 MSI: ppc4xx-msi@c10000000 {
 429                         compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
 430                         reg = <0xc 0x10000000 0x100
 431                                0xc 0x10000000 0x100>;
 432                         sdr-base = <0x36C>;
 433                         msi-data = <0x00004440>;
 434                         msi-mask = <0x0000ffe0>;
 435                         interrupts =<0 1 2 3 4 5 6 7>;
 436                         interrupt-parent = <&MSI>;
 437                         #interrupt-cells = <1>;
 438                         #address-cells = <0>;
 439                         #size-cells = <0>;
 440                         msi-available-ranges = <0x0 0x100>;
 441                         interrupt-map =
 442                                 <0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING>,
 443                                 <1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING>,
 444                                 <2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING>,
 445                                 <3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING>,
 446                                 <4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING>,
 447                                 <5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING>,
 448                                 <6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING>,
 449                                 <7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING>;
 450                         status = "disabled";
 451                 };
 452
 453                 PCIE0: pciex@d00000000 {
 454                         device_type = "pci"; /* see ppc4xx_pci_find_bridge */
 455                         #interrupt-cells = <1>;
 456                         #size-cells = <2>;
 457                         #address-cells = <3>;
 458                         compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
 459                         primary;
 460                         port = <0x0>; /* port number */
 461                         reg = <0x0000000d 0x00000000 0x20000000>, /* Config space access */
 462                               <0x0000000c 0x08010000 0x00001000>; /* Registers */
 463                         dcr-reg = <0x100 0x020>;
 464                         sdr-base = <0x300>;
 465
 466                         /*
 467                          * Outbound ranges, one memory and one IO,
 468                          * later cannot be changed
 469                          */
 470                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000>,
 471                                  <0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000>,
 472                                  <0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 473
 474                         /* Inbound 2GB range starting at 0 */
 475                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 476
 477                         /* This drives busses 0x40 to 0x7f */
 478                         bus-range = <0x40 0x7f>;
 479
 480                         /*
 481                          * Legacy interrupts (note the weird polarity, the bridge seems
 482                          * to invert PCIe legacy interrupts).
 483                          * We are de-swizzling here because the numbers are actually for
 484                          * port of the root complex virtual P2P bridge. But I want
 485                          * to avoid putting a node for it in the tree, so the numbers
 486                          * below are basically de-swizzled numbers.
 487                          * The real slot is on idsel 0, so the swizzling is 1:1
 488                          */
 489                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 490                         interrupt-map =
 491                                 <0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH>, /* swizzled int A */
 492                                 <0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH>, /* swizzled int B */
 493                                 <0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH>, /* swizzled int C */
 494                                 <0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH>; /* swizzled int D */
 495                         status = "disabled";
 496                 };
 497         };
 498 };