kernel: backport v5.8 i2c-pxa updates
[openwrt/staging/stintel.git] / target / linux / generic / backport-5.4 / 810-v5.8-i2c-pxa-move-private-definitions-to-i2c-pxa.c.patch
1 From: Russell King <rmk+kernel@armlinux.org.uk>
2 Bcc: linux@mail.armlinux.org.uk
3 Cc: linux-i2c@vger.kernel.org
4 Subject: [PATCH 08/17] i2c: pxa: move private definitions to i2c-pxa.c
5 MIME-Version: 1.0
6 Content-Disposition: inline
7 Content-Transfer-Encoding: 8bit
8 Content-Type: text/plain; charset="utf-8"
9
10 Move driver-private definitions out of the i2c-pxa.h platform data
11 header file into the driver itself. Nothing outside of the driver
12 makes use of these constants.
13
14 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
15 ---
16 drivers/i2c/busses/i2c-pxa.c | 43 ++++++++++++++++++++++++
17 include/linux/platform_data/i2c-pxa.h | 48 ---------------------------
18 2 files changed, 43 insertions(+), 48 deletions(-)
19
20 diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
21 index 05dbe6bf4633..482768a9fdd2 100644
22 --- a/drivers/i2c/busses/i2c-pxa.c
23 +++ b/drivers/i2c/busses/i2c-pxa.c
24 @@ -86,6 +86,49 @@
25 #define IWCR_HS_CNT2_SHIFT 10
26 #define IWCR_HS_CNT2_MASK (0x1F << IWCR_HS_CNT2_SHIFT)
27
28 +/* need a longer timeout if we're dealing with the fact we may well be
29 + * looking at a multi-master environment
30 + */
31 +#define DEF_TIMEOUT 32
32 +
33 +#define BUS_ERROR (-EREMOTEIO)
34 +#define XFER_NAKED (-ECONNREFUSED)
35 +#define I2C_RETRY (-2000) /* an error has occurred retry transmit */
36 +
37 +/* ICR initialize bit values
38 + *
39 + * 15 FM 0 (100 kHz operation)
40 + * 14 UR 0 (No unit reset)
41 + * 13 SADIE 0 (Disables the unit from interrupting on slave addresses
42 + * matching its slave address)
43 + * 12 ALDIE 0 (Disables the unit from interrupt when it loses arbitration
44 + * in master mode)
45 + * 11 SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
46 + * 10 BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
47 + * 9 IRFIE 1 (Enable interrupts from full buffer received)
48 + * 8 ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
49 + * 7 GCD 1 (Disables i2c unit response to general call messages as a slave)
50 + * 6 IUE 0 (Disable unit until we change settings)
51 + * 5 SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
52 + * 4 MA 0 (Only send stop with the ICR stop bit)
53 + * 3 TB 0 (We are not transmitting a byte initially)
54 + * 2 ACKNAK 0 (Send an ACK after the unit receives a byte)
55 + * 1 STOP 0 (Do not send a STOP)
56 + * 0 START 0 (Do not send a START)
57 + */
58 +#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
59 +
60 +/* I2C status register init values
61 + *
62 + * 10 BED 1 (Clear bus error detected)
63 + * 9 SAD 1 (Clear slave address detected)
64 + * 7 IRF 1 (Clear IDBR Receive Full)
65 + * 6 ITE 1 (Clear IDBR Transmit Empty)
66 + * 5 ALD 1 (Clear Arbitration Loss Detected)
67 + * 4 SSD 1 (Clear Slave Stop Detected)
68 + */
69 +#define I2C_ISR_INIT 0x7FF /* status register init */
70 +
71 struct pxa_reg_layout {
72 u32 ibmr;
73 u32 idbr;
74 diff --git a/include/linux/platform_data/i2c-pxa.h b/include/linux/platform_data/i2c-pxa.h
75 index cb290092599c..5c08a6ff3444 100644
76 --- a/include/linux/platform_data/i2c-pxa.h
77 +++ b/include/linux/platform_data/i2c-pxa.h
78 @@ -7,54 +7,6 @@
79 #ifndef _I2C_PXA_H_
80 #define _I2C_PXA_H_
81
82 -#if 0
83 -#define DEF_TIMEOUT 3
84 -#else
85 -/* need a longer timeout if we're dealing with the fact we may well be
86 - * looking at a multi-master environment
87 -*/
88 -#define DEF_TIMEOUT 32
89 -#endif
90 -
91 -#define BUS_ERROR (-EREMOTEIO)
92 -#define XFER_NAKED (-ECONNREFUSED)
93 -#define I2C_RETRY (-2000) /* an error has occurred retry transmit */
94 -
95 -/* ICR initialize bit values
96 -*
97 -* 15. FM 0 (100 Khz operation)
98 -* 14. UR 0 (No unit reset)
99 -* 13. SADIE 0 (Disables the unit from interrupting on slave addresses
100 -* matching its slave address)
101 -* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration
102 -* in master mode)
103 -* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
104 -* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
105 -* 9. IRFIE 1 (Enable interrupts from full buffer received)
106 -* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
107 -* 7. GCD 1 (Disables i2c unit response to general call messages as a slave)
108 -* 6. IUE 0 (Disable unit until we change settings)
109 -* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
110 -* 4. MA 0 (Only send stop with the ICR stop bit)
111 -* 3. TB 0 (We are not transmitting a byte initially)
112 -* 2. ACKNAK 0 (Send an ACK after the unit receives a byte)
113 -* 1. STOP 0 (Do not send a STOP)
114 -* 0. START 0 (Do not send a START)
115 -*
116 -*/
117 -#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
118 -
119 -/* I2C status register init values
120 - *
121 - * 10. BED 1 (Clear bus error detected)
122 - * 9. SAD 1 (Clear slave address detected)
123 - * 7. IRF 1 (Clear IDBR Receive Full)
124 - * 6. ITE 1 (Clear IDBR Transmit Empty)
125 - * 5. ALD 1 (Clear Arbitration Loss Detected)
126 - * 4. SSD 1 (Clear Slave Stop Detected)
127 - */
128 -#define I2C_ISR_INIT 0x7FF /* status register init */
129 -
130 struct i2c_slave_client;
131
132 struct i2c_pxa_platform_data {
133 --
134 2.20.1
135