kernel: backport v5.8 i2c-pxa updates
[openwrt/staging/stintel.git] / target / linux / generic / backport-5.4 / 821-v5.8-i2c-pxa-implement-generic-i2c-bus-recovery.patch
1 From: Russell King <rmk+kernel@armlinux.org.uk>
2 Bcc: linux@mail.armlinux.org.uk
3 Subject: [PATCH 7/7] i2c: pxa: implement generic i2c bus recovery
4 MIME-Version: 1.0
5 Content-Disposition: inline
6 Content-Transfer-Encoding: 8bit
7 Content-Type: text/plain; charset="utf-8"
8
9 Implement generic GPIO-based I2C bus recovery for the PXA I2C driver.
10
11 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
12 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
13 ---
14 drivers/i2c/busses/i2c-pxa.c | 176 +++++++++++++++++++++++++++++++----
15 1 file changed, 159 insertions(+), 17 deletions(-)
16
17 diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
18 index 0e194d6cd1b5..a7885b8b5031 100644
19 --- a/drivers/i2c/busses/i2c-pxa.c
20 +++ b/drivers/i2c/busses/i2c-pxa.c
21 @@ -20,6 +20,7 @@
22 #include <linux/delay.h>
23 #include <linux/err.h>
24 #include <linux/errno.h>
25 +#include <linux/gpio/consumer.h>
26 #include <linux/i2c.h>
27 #include <linux/init.h>
28 #include <linux/interrupt.h>
29 @@ -28,6 +29,7 @@
30 #include <linux/module.h>
31 #include <linux/of.h>
32 #include <linux/of_device.h>
33 +#include <linux/pinctrl/consumer.h>
34 #include <linux/platform_device.h>
35 #include <linux/platform_data/i2c-pxa.h>
36 #include <linux/slab.h>
37 @@ -260,6 +262,11 @@ struct pxa_i2c {
38 bool highmode_enter;
39 u32 fm_mask;
40 u32 hs_mask;
41 +
42 + struct i2c_bus_recovery_info recovery;
43 + struct pinctrl *pinctrl;
44 + struct pinctrl_state *pinctrl_default;
45 + struct pinctrl_state *pinctrl_recovery;
46 };
47
48 #define _IBMR(i2c) ((i2c)->reg_ibmr)
49 @@ -559,13 +566,8 @@ static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode)
50 #define i2c_pxa_set_slave(i2c, err) do { } while (0)
51 #endif
52
53 -static void i2c_pxa_reset(struct pxa_i2c *i2c)
54 +static void i2c_pxa_do_reset(struct pxa_i2c *i2c)
55 {
56 - pr_debug("Resetting I2C Controller Unit\n");
57 -
58 - /* abort any transfer currently under way */
59 - i2c_pxa_abort(i2c);
60 -
61 /* reset according to 9.8 */
62 writel(ICR_UR, _ICR(i2c));
63 writel(I2C_ISR_INIT, _ISR(i2c));
64 @@ -584,12 +586,25 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c)
65 #endif
66
67 i2c_pxa_set_slave(i2c, 0);
68 +}
69
70 +static void i2c_pxa_enable(struct pxa_i2c *i2c)
71 +{
72 /* enable unit */
73 writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));
74 udelay(100);
75 }
76
77 +static void i2c_pxa_reset(struct pxa_i2c *i2c)
78 +{
79 + pr_debug("Resetting I2C Controller Unit\n");
80 +
81 + /* abort any transfer currently under way */
82 + i2c_pxa_abort(i2c);
83 + i2c_pxa_do_reset(i2c);
84 + i2c_pxa_enable(i2c);
85 +}
86 +
87
88 #ifdef CONFIG_I2C_PXA_SLAVE
89 /*
90 @@ -1043,6 +1058,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
91 ret = i2c_pxa_wait_bus_not_busy(i2c);
92 if (ret) {
93 dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
94 + i2c_recover_bus(&i2c->adap);
95 goto out;
96 }
97
98 @@ -1088,6 +1104,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
99
100 if (!timeout && i2c->msg_num) {
101 i2c_pxa_scream_blue_murder(i2c, "timeout with active message");
102 + i2c_recover_bus(&i2c->adap);
103 ret = I2C_RETRY;
104 }
105
106 @@ -1277,6 +1294,129 @@ static int i2c_pxa_probe_pdata(struct platform_device *pdev,
107 return 0;
108 }
109
110 +static void i2c_pxa_prepare_recovery(struct i2c_adapter *adap)
111 +{
112 + struct pxa_i2c *i2c = adap->algo_data;
113 + u32 ibmr = readl(_IBMR(i2c));
114 +
115 + /*
116 + * Program the GPIOs to reflect the current I2C bus state while
117 + * we transition to recovery; this avoids glitching the bus.
118 + */
119 + gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS);
120 + gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS);
121 +
122 + WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery));
123 +}
124 +
125 +static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap)
126 +{
127 + struct pxa_i2c *i2c = adap->algo_data;
128 + u32 isr;
129 +
130 + /*
131 + * The bus should now be free. Clear up the I2C controller before
132 + * handing control of the bus back to avoid the bus changing state.
133 + */
134 + isr = readl(_ISR(i2c));
135 + if (isr & (ISR_UB | ISR_IBB)) {
136 + dev_dbg(&i2c->adap.dev,
137 + "recovery: resetting controller, ISR=0x%08x\n", isr);
138 + i2c_pxa_do_reset(i2c);
139 + }
140 +
141 + WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default));
142 +
143 + dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n",
144 + readl(_IBMR(i2c)), readl(_ISR(i2c)));
145 +
146 + i2c_pxa_enable(i2c);
147 +}
148 +
149 +static int i2c_pxa_init_recovery(struct pxa_i2c *i2c)
150 +{
151 + struct i2c_bus_recovery_info *bri = &i2c->recovery;
152 + struct device *dev = i2c->adap.dev.parent;
153 +
154 + /*
155 + * When slave mode is enabled, we are not the only master on the bus.
156 + * Bus recovery can only be performed when we are the master, which
157 + * we can't be certain of. Therefore, when slave mode is enabled, do
158 + * not configure bus recovery.
159 + */
160 + if (IS_ENABLED(CONFIG_I2C_PXA_SLAVE))
161 + return 0;
162 +
163 + i2c->pinctrl = devm_pinctrl_get(dev);
164 + if (IS_ERR(i2c->pinctrl))
165 + return PTR_ERR(i2c->pinctrl);
166 +
167 + if (!i2c->pinctrl)
168 + return 0;
169 +
170 + i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl,
171 + PINCTRL_STATE_DEFAULT);
172 + i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery");
173 +
174 + if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) {
175 + dev_info(dev, "missing pinmux recovery information: %ld %ld\n",
176 + PTR_ERR(i2c->pinctrl_default),
177 + PTR_ERR(i2c->pinctrl_recovery));
178 + return 0;
179 + }
180 +
181 + /*
182 + * Claiming GPIOs can influence the pinmux state, and may glitch the
183 + * I2C bus. Do this carefully.
184 + */
185 + bri->scl_gpiod = devm_gpiod_get(dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN);
186 + if (bri->scl_gpiod == ERR_PTR(-EPROBE_DEFER))
187 + return -EPROBE_DEFER;
188 + if (IS_ERR(bri->scl_gpiod)) {
189 + dev_info(dev, "missing scl gpio recovery information: %pe\n",
190 + bri->scl_gpiod);
191 + return 0;
192 + }
193 +
194 + /*
195 + * We have SCL. Pull SCL low and wait a bit so that SDA glitches
196 + * have no effect.
197 + */
198 + gpiod_direction_output(bri->scl_gpiod, 0);
199 + udelay(10);
200 + bri->sda_gpiod = devm_gpiod_get(dev, "sda", GPIOD_OUT_HIGH_OPEN_DRAIN);
201 +
202 + /* Wait a bit in case of a SDA glitch, and then release SCL. */
203 + udelay(10);
204 + gpiod_direction_output(bri->scl_gpiod, 1);
205 +
206 + if (bri->sda_gpiod == ERR_PTR(-EPROBE_DEFER))
207 + return -EPROBE_DEFER;
208 +
209 + if (IS_ERR(bri->sda_gpiod)) {
210 + dev_info(dev, "missing sda gpio recovery information: %pe\n",
211 + bri->sda_gpiod);
212 + return 0;
213 + }
214 +
215 + bri->prepare_recovery = i2c_pxa_prepare_recovery;
216 + bri->unprepare_recovery = i2c_pxa_unprepare_recovery;
217 + bri->recover_bus = i2c_generic_scl_recovery;
218 +
219 + i2c->adap.bus_recovery_info = bri;
220 +
221 + /*
222 + * Claiming GPIOs can change the pinmux state, which confuses the
223 + * pinctrl since pinctrl's idea of the current setting is unaffected
224 + * by the pinmux change caused by claiming the GPIO. Work around that
225 + * by switching pinctrl to the GPIO state here. We do it this way to
226 + * avoid glitching the I2C bus.
227 + */
228 + pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery);
229 +
230 + return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default);
231 +}
232 +
233 static int i2c_pxa_probe(struct platform_device *dev)
234 {
235 struct i2c_pxa_platform_data *plat = dev_get_platdata(&dev->dev);
236 @@ -1289,6 +1429,16 @@ static int i2c_pxa_probe(struct platform_device *dev)
237 if (!i2c)
238 return -ENOMEM;
239
240 + /* Default adapter num to device id; i2c_pxa_probe_dt can override. */
241 + i2c->adap.nr = dev->id;
242 + i2c->adap.owner = THIS_MODULE;
243 + i2c->adap.retries = 5;
244 + i2c->adap.algo_data = i2c;
245 + i2c->adap.dev.parent = &dev->dev;
246 +#ifdef CONFIG_OF
247 + i2c->adap.dev.of_node = dev->dev.of_node;
248 +#endif
249 +
250 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
251 i2c->reg_base = devm_ioremap_resource(&dev->dev, res);
252 if (IS_ERR(i2c->reg_base))
253 @@ -1298,8 +1448,9 @@ static int i2c_pxa_probe(struct platform_device *dev)
254 if (irq < 0)
255 return irq;
256
257 - /* Default adapter num to device id; i2c_pxa_probe_dt can override. */
258 - i2c->adap.nr = dev->id;
259 + ret = i2c_pxa_init_recovery(i2c);
260 + if (ret)
261 + return ret;
262
263 ret = i2c_pxa_probe_dt(dev, i2c, &i2c_type);
264 if (ret > 0)
265 @@ -1307,9 +1458,6 @@ static int i2c_pxa_probe(struct platform_device *dev)
266 if (ret < 0)
267 return ret;
268
269 - i2c->adap.owner = THIS_MODULE;
270 - i2c->adap.retries = 5;
271 -
272 spin_lock_init(&i2c->lock);
273 init_waitqueue_head(&i2c->wait);
274
275 @@ -1375,12 +1523,6 @@ static int i2c_pxa_probe(struct platform_device *dev)
276
277 i2c_pxa_reset(i2c);
278
279 - i2c->adap.algo_data = i2c;
280 - i2c->adap.dev.parent = &dev->dev;
281 -#ifdef CONFIG_OF
282 - i2c->adap.dev.of_node = dev->dev.of_node;
283 -#endif
284 -
285 ret = i2c_add_numbered_adapter(&i2c->adap);
286 if (ret < 0)
287 goto ereqirq;
288 --
289 2.20.1
290