77d48d1ad37f42671b11a11dfbdc94ca3581d213
[openwrt/staging/wigyori.git] / package / boot / uboot-lantiq / patches / 0029-tools-add-some-helper-tools-for-Lantiq-SoCs.patch
1 From 1b77d4249b5addbf3b0848db6992a445019a1865 Mon Sep 17 00:00:00 2001
2 From: Luka Perkov <luka@openwrt.org>
3 Date: Wed, 29 Aug 2012 22:08:42 +0200
4 Subject: tools: add some helper tools for Lantiq SoCs
5
6 Signed-off-by: Luka Perkov Luka Perkov <luka@openwrt.org>
7 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8
9 --- /dev/null
10 +++ b/tools/gct.pl
11 @@ -0,0 +1,155 @@
12 +#!/usr/bin/perl
13 +
14 +#use strict;
15 +#use Cwd;
16 +#use Env;
17 +
18 +my $aline;
19 +my $lineid;
20 +my $length;
21 +my $address;
22 +my @bytes;
23 +my $addstr;
24 +my $chsum=0;
25 +my $count=0;
26 +my $firstime=1;
27 +my $i;
28 +my $currentaddr;
29 +my $tmp;
30 +my $holder="";
31 +my $loadaddr;
32 +
33 +if(@ARGV < 2){
34 + die("\n Syntax: perl gct.pl uart_ddr_settings.conf u-boot.srec u-boot.asc\n");
35 +}
36 +
37 +open(IN_UART_DDR_SETTINGS, "<$ARGV[0]") || die("failed to open uart_ddr_settings.conf\n");
38 +open(IN_UART_SREC, "<$ARGV[1]") || die("failed to open u-boot.srec\n");
39 +open(OUT_UBOOT_ASC, ">$ARGV[2]") || die("failed to open u-boot.asc\n");
40 +
41 +$i=0;
42 +while ($line = <IN_UART_DDR_SETTINGS>){
43 + if($line=~/\w/){
44 + if($line!~/[;#\*]/){
45 + if($i eq 0){
46 + printf OUT_UBOOT_ASC ("33333333");
47 + }
48 + chomp($line);
49 + $line=~s/\t//;
50 + @array=split(/ +/,$line);
51 + $j=0;
52 + while(@array[$j]!~/\w/){
53 + $j=$j+1;
54 + }
55 + $addr=@array[$j];
56 + $regval=@array[$j+1];
57 + $addr=~s/0x//;
58 + $regval=~s/0x//;
59 + printf OUT_UBOOT_ASC ("%08x%08x",hex($addr),hex($regval));
60 + $i=$i+1;
61 + if($i eq 8){
62 + $i=0;
63 + printf OUT_UBOOT_ASC ("\n");
64 + }
65 + }
66 + }
67 +}
68 +
69 +while($i lt 8 && $i gt 0){
70 + printf OUT_UBOOT_ASC "00"x8;
71 + $i=$i+1;
72 +}
73 +
74 +if($i eq 8){
75 + printf OUT_UBOOT_ASC ("\n");
76 +}
77 +
78 +while($aline=<IN_UART_SREC>){
79 + $aline=uc($aline);
80 + chomp($aline);
81 + next if(($aline=~/^S0/) || ($aline=~/^S7/));
82 + ($lineid, $length, $address, @bytes) = unpack"A2A2A8"."A2"x300, $aline;
83 + $length = hex($length);
84 + $address = hex($address);
85 + $length -=5;
86 + $i=0;
87 +
88 + while($length>0){
89 + if($firstime==1){
90 + $addstr = sprintf("%x", $address);
91 + $addstr = "0"x(8-length($addstr)).$addstr;
92 + print OUT_UBOOT_ASC $addstr;
93 + addchsum($addstr);
94 + $firstime=0;
95 + $currentaddr=$address;
96 + $loadaddr = $addstr;
97 + }
98 + else{
99 + if($count==64){
100 + $addstr = sprintf("%x", $currentaddr);
101 + $addstr = "0"x(8-length($addstr)).$addstr;
102 + print OUT_UBOOT_ASC $addstr;
103 + addchsum($addstr);
104 + $count=0;
105 + }
106 +#printf("*** %x != %x\n", $address, $currentaddr) if $address != $currentaddr;
107 + }
108 + if($currentaddr < $address) {
109 + print OUT_UBOOT_ASC "00";
110 + addchsum("00");
111 + $count++;
112 + $currentaddr++;
113 + }
114 + else {
115 + while($count<64){
116 + $bytes[$i]=~tr/ABCDEF/abcdef/;
117 + print OUT_UBOOT_ASC "$bytes[$i]";
118 + addchsum($bytes[$i]);
119 + $i++;
120 + $count++;
121 + $currentaddr++;
122 + $length--;
123 + last if($length==0);
124 + }
125 + }
126 + if($count==64){
127 + print OUT_UBOOT_ASC "\n";
128 + }
129 + }
130 +}
131 +if($count != 64){
132 + $tmp = "00";
133 + for($i=0;$i<(64-$count);$i++){
134 + print OUT_UBOOT_ASC "00";
135 + addchsum($tmp);
136 + }
137 + print OUT_UBOOT_ASC "\n";
138 +}
139 +
140 +
141 +print OUT_UBOOT_ASC "11"x4;
142 +use integer;
143 +$chsum=$chsum & 0xffffffff;
144 +$chsum = sprintf("%X", $chsum);
145 +$chsum = "0"x(8-length($chsum)).$chsum;
146 +$chsum =~tr/ABCDEF/abcdef/;
147 +print OUT_UBOOT_ASC $chsum;
148 +print OUT_UBOOT_ASC "00"x60;
149 +print OUT_UBOOT_ASC "\n";
150 +
151 +print OUT_UBOOT_ASC "99"x4;
152 +print OUT_UBOOT_ASC $loadaddr;
153 +print OUT_UBOOT_ASC "00"x60;
154 +print OUT_UBOOT_ASC "\n";
155 +
156 +close OUT_UBOOT_ASC;
157 +
158 +sub addchsum{
159 + my $cc=$_[0];
160 + $holder=$holder.$cc;
161 + if(length($holder)==8){
162 + $holder = hex($holder);
163 + $chsum+=$holder;
164 + $holder="";
165 + }
166 +}
167 --- /dev/null
168 +++ b/tools/lantiq_extract_openwrt_patches.sh
169 @@ -0,0 +1,15 @@
170 +#!/bin/bash
171 +
172 +set -e
173 +set -x
174 +
175 +test $# -eq 1
176 +
177 +openwrt_root=$(readlink -f $1)
178 +test -d $openwrt_root
179 +
180 +uboot_lantiq_dir=$openwrt_root/package/boot/uboot-lantiq/patches
181 +test -d $uboot_lantiq_dir
182 +
183 +rm -vf $uboot_lantiq_dir/*
184 +git format-patch -k -p --no-renames --text --full-index -o $uboot_lantiq_dir v2012.10..openwrt/v2013.01
185 --- /dev/null
186 +++ b/tools/lantiq_ram_extract_magic.awk
187 @@ -0,0 +1,70 @@
188 +#
189 +# This file is released under the terms of GPL v2 and any later version.
190 +# See the file COPYING in the root directory of the source tree for details.
191 +#
192 +# Copyright (C) 2011 Luka Perkov <luka@openwrt.org>
193 +#
194 +# usage: mips-openwrt-linux-objdump -EB -b binary -m mips:isa32r2 -D YOUR_IMAGE_DUMP | awk -f lantiq_ram_extract_magic.awk
195 +#
196 +
197 +BEGIN {
198 + print "/* "
199 + print " * This file is released under the terms of GPL v2 and any later version. "
200 + print " * See the file COPYING in the root directory of the source tree for details. "
201 + print " * "
202 + print " * generated with lantiq_ram_extract_magic.awk "
203 + print " * "
204 + print " * Copyright (C) 2011 Luka Perkov <luka@openwrt.org> "
205 + print " */ "
206 + print ""
207 +
208 + mc_dc_value=0
209 + mc_dc_number=0
210 + right_section=0
211 + mc_dc_value_print=0
212 + mc_dc_number_print=0
213 +}
214 +
215 +/t2,[0-9]+$/ {
216 + if (right_section) {
217 + split($4, tmp, ",")
218 + mc_dc_value=sprintf("%X", tmp[2])
219 + mc_dc_value_print=1
220 + }
221 +}
222 +
223 +/t2,0x[0-9a-f]+$/ {
224 + if (right_section) {
225 + split($4, tmp, ",0x")
226 + mc_dc_value=sprintf("%s", tmp[2])
227 + mc_dc_value=toupper(mc_dc_value)
228 + mc_dc_value_print=1
229 + }
230 +}
231 +
232 +/t2,[0-9]+\(t1\)$/ {
233 + if (right_section) {
234 + split($4, tmp, ",")
235 + split(tmp[2], tmp, "(")
236 + mc_dc_number=tmp[1]/16
237 + mc_dc_number_print=1
238 + }
239 +}
240 +
241 +{
242 + if (right_section && mc_dc_number_print && mc_dc_value_print) {
243 + if (mc_dc_number < 10)
244 + print "#define MC_DC0" mc_dc_number "_VALUE\t0x" mc_dc_value
245 + else
246 + print "#define MC_DC" mc_dc_number "_VALUE\t0x" mc_dc_value
247 + mc_dc_value_print=0
248 + mc_dc_number_print=0
249 + }
250 +
251 + if ($4 == "t1,t1,0x1000")
252 + right_section=1
253 +
254 +
255 + if ($4 == "t2,736(t1)")
256 + right_section=0
257 +}
258 --- /dev/null
259 +++ b/tools/lantiq_ram_init_uart.awk
260 @@ -0,0 +1,101 @@
261 +#!/usr/bin/awk -f
262 +#
263 +# This file is released under the terms of GPL v2 and any later version.
264 +# See the file COPYING in the root directory of the source tree for details.
265 +#
266 +# Copyright (C) 2011-2012 Luka Perkov <luka@openwrt.org>
267 +# Copyright (C) 2012 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
268 +#
269 +# usage: awk -f lantiq_ram_init_uart.awk -v soc=<danube|ar9|vr9> PATH_TO_BOARD/ddr_settings.h
270 +#
271 +
272 +function print_header()
273 +{
274 + print "; "
275 + print "; This file is released under the terms of GPL v2 and any later version. "
276 + print "; See the file COPYING in the root directory of the source tree for details. "
277 + print "; "
278 + print "; generated with lantiq_ram_init_uart.awk "
279 + print "; "
280 + print "; Copyright (C) 2011-2012 Luka Perkov <luka@openwrt.org> "
281 + print "; Copyright (C) 2012 Daniel Schwierzeck <daniel.schwierzeck@gmail.com> "
282 + print "; "
283 + print ""
284 +}
285 +
286 +function mc_ddr1_prologue()
287 +{
288 + /* Clear access error log registers */
289 + print "0xbf800010", "0x0"
290 + print "0xbf800020", "0x0"
291 +
292 + /* Enable DDR and SRAM module in memory controller */
293 + print "0xbf800060", "0x5"
294 +
295 + /* Clear start bit of DDR memory controller */
296 + print "0xbf801030", "0x0"
297 +}
298 +
299 +function mc_ddr1_epilogue()
300 +{
301 + /* Set start bit of DDR memory controller */
302 + print "0xbf801030", "0x100"
303 +}
304 +
305 +function mc_ddr2_prologue()
306 +{
307 + /* Put memory controller in inactive mode */
308 + print "0xbf401070", "0x0"
309 +}
310 +
311 +function mc_ddr2_epilogue(mc_ccr07_value)
312 +{
313 + /* Put memory controller in active mode */
314 + mc_ccr07_value = or(mc_ccr07_value, 0x100)
315 + printf("0xbf401070 0x%x\n", mc_ccr07_value)
316 +}
317 +
318 +BEGIN {
319 + switch (soc) {
320 + case "danube":
321 + case "ar9":
322 + reg_base = 0xbf801000
323 + print_header()
324 + mc_ddr1_prologue()
325 + break
326 + case "vr9":
327 + reg_base = 0xbf401000
328 + print_header()
329 + mc_ddr2_prologue()
330 + break
331 + default:
332 + print "Invalid or no value for soc specified!"
333 + exit 1
334 + }
335 +
336 + mc_ccr07_value = 0
337 +}
338 +
339 +/^#define/ {
340 + printf("0x%x %s\n", reg_base, tolower($3))
341 + reg_base += 0x10
342 +}
343 +
344 +/^#define(.*)MC_CCR07_VALUE/ {
345 + printf("0x%x %s\n", reg_base, tolower($3))
346 + reg_base += 0x10
347 + mc_ccr07_value = strtonum($3)
348 +}
349 +
350 +END {
351 + switch (soc) {
352 + case "danube":
353 + case "ar9":
354 + mc_ddr1_epilogue()
355 + break
356 + case "vr9":
357 + mc_ddr2_epilogue(mc_ccr07_value)
358 + break
359 + default:
360 + }
361 +}