package/boot/uboot-lantiq/patches/0032-MIPS-add-board-support-for-ZTE-ZXV10-H201L.patch

   1 From 2473526cf879ead429c6aa1fb7fb77ed3407baaa Mon Sep 17 00:00:00 2001
   2 From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
   3 Date: Sun, 9 Dec 2012 17:35:09 +0100
   4 Subject: MIPS: add board support for ZTE ZXV10 H201L
   5
   6 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
   7
   8 diff --git a/board/zte/zxv10h201l/Makefile b/board/zte/zxv10h201l/Makefile
   9 new file mode 100644
  10 index 0000000..3a547c2
  11 --- /dev/null
  12 +++ b/board/zte/zxv10h201l/Makefile
  13 @@ -0,0 +1,27 @@
  14 +#
  15 +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
  16 +#
  17 +# SPDX-License-Identifier:     GPL-2.0+
  18 +#
  19 +
  20 +include $(TOPDIR)/config.mk
  21 +
  22 +LIB    = $(obj)lib$(BOARD).o
  23 +
  24 +COBJS  = $(BOARD).o
  25 +
  26 +SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
  27 +OBJS   := $(addprefix $(obj),$(COBJS))
  28 +SOBJS  := $(addprefix $(obj),$(SOBJS))
  29 +
  30 +$(LIB):        $(obj).depend $(OBJS) $(SOBJS)
  31 +       $(call cmd_link_o_target, $(OBJS) $(SOBJS))
  32 +
  33 +#########################################################################
  34 +
  35 +# defines $(obj).depend target
  36 +include $(SRCTREE)/rules.mk
  37 +
  38 +sinclude $(obj).depend
  39 +
  40 +#########################################################################
  41 diff --git a/board/zte/zxv10h201l/config.mk b/board/zte/zxv10h201l/config.mk
  42 new file mode 100644
  43 index 0000000..9d33739
  44 --- /dev/null
  45 +++ b/board/zte/zxv10h201l/config.mk
  46 @@ -0,0 +1,7 @@
  47 +#
  48 +# Copyright (C) 2012-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
  49 +#
  50 +# SPDX-License-Identifier:     GPL-2.0+
  51 +#
  52 +
  53 +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
  54 diff --git a/board/zte/zxv10h201l/ddr_settings.h b/board/zte/zxv10h201l/ddr_settings.h
  55 new file mode 100644
  56 index 0000000..8814957
  57 --- /dev/null
  58 +++ b/board/zte/zxv10h201l/ddr_settings.h
  59 @@ -0,0 +1,55 @@
  60 +/*
  61 + * Copyright (C) 2012 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
  62 + *
  63 + * The values have been extracted from original ZTE U-Boot.
  64 + *
  65 + * SPDX-License-Identifier:    GPL-2.0+
  66 + */
  67 +
  68 +#define MC_DC00_VALUE  0x1B1B
  69 +#define MC_DC01_VALUE  0x0
  70 +#define MC_DC02_VALUE  0x0
  71 +#define MC_DC03_VALUE  0x0
  72 +#define MC_DC04_VALUE  0x0
  73 +#define MC_DC05_VALUE  0x200
  74 +#define MC_DC06_VALUE  0x307
  75 +#define MC_DC07_VALUE  0x303
  76 +#define MC_DC08_VALUE  0x103
  77 +#define MC_DC09_VALUE  0x80B
  78 +#define MC_DC10_VALUE  0x203
  79 +#define MC_DC11_VALUE  0xE02
  80 +#define MC_DC12_VALUE  0x2C8
  81 +#define MC_DC13_VALUE  0x1
  82 +#define MC_DC14_VALUE  0x0
  83 +#define MC_DC15_VALUE  0x100
  84 +#define MC_DC16_VALUE  0xC800
  85 +#define MC_DC17_VALUE  0xF
  86 +#define MC_DC18_VALUE  0x301
  87 +#define MC_DC19_VALUE  0x200
  88 +#define MC_DC20_VALUE  0xA04
  89 +#define MC_DC21_VALUE  0x1600
  90 +#define MC_DC22_VALUE  0x1616
  91 +#define MC_DC23_VALUE  0x0
  92 +#define MC_DC24_VALUE  0x5D
  93 +#define MC_DC25_VALUE  0x0
  94 +#define MC_DC26_VALUE  0x0
  95 +#define MC_DC27_VALUE  0x0
  96 +#define MC_DC28_VALUE  0x5FB
  97 +#define MC_DC29_VALUE  0x35DF
  98 +#define MC_DC30_VALUE  0x99E9
  99 +#define MC_DC31_VALUE  0x0
 100 +#define MC_DC32_VALUE  0x0
 101 +#define MC_DC33_VALUE  0x0
 102 +#define MC_DC34_VALUE  0x0
 103 +#define MC_DC35_VALUE  0x0
 104 +#define MC_DC36_VALUE  0x0
 105 +#define MC_DC37_VALUE  0x0
 106 +#define MC_DC38_VALUE  0x0
 107 +#define MC_DC39_VALUE  0x0
 108 +#define MC_DC40_VALUE  0x0
 109 +#define MC_DC41_VALUE  0x0
 110 +#define MC_DC42_VALUE  0x0
 111 +#define MC_DC43_VALUE  0x0
 112 +#define MC_DC44_VALUE  0x0
 113 +#define MC_DC45_VALUE  0x600
 114 +#define MC_DC46_VALUE  0x0
 115 diff --git a/board/zte/zxv10h201l/zxv10h201l.c b/board/zte/zxv10h201l/zxv10h201l.c
 116 new file mode 100644
 117 index 0000000..8218a9d
 118 --- /dev/null
 119 +++ b/board/zte/zxv10h201l/zxv10h201l.c
 120 @@ -0,0 +1,51 @@
 121 +/*
 122 + * Copyright (C) 2012 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
 123 + *
 124 + * SPDX-License-Identifier:    GPL-2.0+
 125 + */
 126 +
 127 +#include <common.h>
 128 +#include <switch.h>
 129 +#include <asm/gpio.h>
 130 +#include <asm/lantiq/eth.h>
 131 +#include <asm/lantiq/reset.h>
 132 +#include <asm/lantiq/chipid.h>
 133 +
 134 +int board_early_init_f(void)
 135 +{
 136 +       return 0;
 137 +}
 138 +
 139 +int checkboard(void)
 140 +{
 141 +       puts("Board: " CONFIG_BOARD_NAME "\n");
 142 +       ltq_chip_print_info();
 143 +
 144 +       return 0;
 145 +}
 146 +
 147 +static const struct ltq_eth_port_config eth_port_config[] = {
 148 +       /* MAC0: REALTEK RTL8306 switch */
 149 +       { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII },
 150 +};
 151 +
 152 +static const struct ltq_eth_board_config eth_board_config = {
 153 +       .ports = eth_port_config,
 154 +       .num_ports = ARRAY_SIZE(eth_port_config),
 155 +};
 156 +
 157 +int board_eth_init(bd_t *bis)
 158 +{
 159 +       return ltq_eth_initialize(&eth_board_config);
 160 +}
 161 +
 162 +static struct switch_device rtl8306_dev = {
 163 +       .name = "rtl8306",
 164 +       .cpu_port = 5,
 165 +       .port_mask = 0xF,
 166 +};
 167 +
 168 +int board_switch_init(void)
 169 +{
 170 +       return switch_device_register(&rtl8306_dev);
 171 +}
 172 diff --git a/boards.cfg b/boards.cfg
 173 index 4b18a26..4362856 100644
 174 --- a/boards.cfg
 175 +++ b/boards.cfg
 176 @@ -496,6 +496,9 @@ Active  mips        mips32         -           micronas        vct
 177  Active  mips        mips32         -           micronas        vct                 vct_premium_onenand                  vct:VCT_PREMIUM,VCT_ONENAND                                                                                                       -
 178  Active  mips        mips32         -           micronas        vct                 vct_premium_onenand_small            vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE                                                                                       -
 179  Active  mips        mips32         -           micronas        vct                 vct_premium_small                    vct:VCT_PREMIUM,VCT_SMALL_IMAGE                                                                                                   -
 180 +Active  mips        mips32         arx100      zte             zxv10h201l          zxv10h201l_nor                       zxv10h201l:SYS_BOOT_NOR                                                                                                           Luka Perkov <luka@openwrt.org>
 181 +Active  mips        mips32         arx100      zte             zxv10h201l          zxv10h201l_ram                       zxv10h201l:SYS_BOOT_RAM                                                                                                           Luka Perkov <luka@openwrt.org>
 182 +Active  mips        mips32         arx100      zte             zxv10h201l          zxv10h201l_zte                       zxv10h201l:SYS_BOOT_ZTE                                                                                                           Luka Perkov <luka@openwrt.org>
 183  Active  mips        mips32         au1x00      -               dbau1x00            dbau1000                             dbau1x00:DBAU1000                                                                                                                 Thomas Lange <thomas@corelatus.se>
 184  Active  mips        mips32         au1x00      -               dbau1x00            dbau1100                             dbau1x00:DBAU1100                                                                                                                 Thomas Lange <thomas@corelatus.se>
 185  Active  mips        mips32         au1x00      -               dbau1x00            dbau1500                             dbau1x00:DBAU1500                                                                                                                 Thomas Lange <thomas@corelatus.se>
 186 diff --git a/include/configs/zxv10h201l.h b/include/configs/zxv10h201l.h
 187 new file mode 100644
 188 index 0000000..bfe116d
 189 --- /dev/null
 190 +++ b/include/configs/zxv10h201l.h
 191 @@ -0,0 +1,77 @@
 192 +/*
 193 + * Copyright (C) 2011 Daniel Schwierzeck, daniel.schwierzeck@googlemail.com
 194 + *
 195 + * SPDX-License-Identifier:    GPL-2.0+
 196 + */
 197 +
 198 +#ifndef __CONFIG_H
 199 +#define __CONFIG_H
 200 +
 201 +#define CONFIG_MACH_TYPE       "ZXV10 H201L"
 202 +#define CONFIG_IDENT_STRING    " "CONFIG_MACH_TYPE
 203 +#define CONFIG_BOARD_NAME      "ZTE ZXV10 H201L"
 204 +
 205 +/* Configure SoC */
 206 +#define CONFIG_LTQ_SUPPORT_UART                        /* Enable ASC and UART */
 207 +
 208 +#define CONFIG_LTQ_SUPPORT_ETHERNET            /* Enable ethernet */
 209 +
 210 +#define CONFIG_LTQ_SUPPORT_NOR_FLASH           /* Have a parallel NOR flash */
 211 +
 212 +#define CONFIG_LTQ_SUPPORT_SPL_NOR_FLASH       /* Build NOR flash SPL */
 213 +#define CONFIG_LTQ_SPL_COMP_LZO                        /* Compress SPL with LZO */
 214 +#define CONFIG_LTQ_SPL_CONSOLE                 /* Enable SPL console */
 215 +
 216 +/* Switch devices */
 217 +#define CONFIG_SWITCH_MULTI
 218 +#define CONFIG_SWITCH_RTL8306
 219 +
 220 +/* Environment */
 221 +#if defined(CONFIG_SYS_BOOT_NOR)
 222 +#define CONFIG_ENV_IS_IN_FLASH
 223 +#define CONFIG_ENV_OVERWRITE
 224 +#define CONFIG_ENV_OFFSET              (256 * 1024)
 225 +#define CONFIG_ENV_SECT_SIZE           (64 * 1024)
 226 +#elif defined(CONFIG_SYS_BOOT_NORSPL)
 227 +#define CONFIG_ENV_IS_IN_FLASH
 228 +#define CONFIG_ENV_OVERWRITE
 229 +#define CONFIG_ENV_OFFSET              (128 * 1024)
 230 +#define CONFIG_ENV_SECT_SIZE           (64 * 1024)
 231 +#else
 232 +#define CONFIG_ENV_IS_NOWHERE
 233 +#endif
 234 +
 235 +#define CONFIG_ENV_SIZE                        (8 * 1024)
 236 +#define CONFIG_LOADADDR                        CONFIG_SYS_LOAD_ADDR
 237 +
 238 +#if defined(CONFIG_SYS_BOOT_ZTE)
 239 +#define CONFIG_SYS_TEXT_BASE           0x80800000
 240 +#define CONFIG_SKIP_LOWLEVEL_INIT
 241 +#endif
 242 +
 243 +/* Console */
 244 +#define CONFIG_LTQ_ADVANCED_CONSOLE
 245 +#define CONFIG_BAUDRATE                        115200
 246 +#define CONFIG_CONSOLE_ASC             1
 247 +#define CONFIG_CONSOLE_DEV             "ttyLTQ1"
 248 +
 249 +/* Pull in default board configs for Lantiq XWAY Danube */
 250 +#include <asm/lantiq/config.h>
 251 +#include <asm/arch/config.h>
 252 +
 253 +#if defined(CONFIG_SYS_BOOT_ZTE)
 254 +#define CONFIG_SYS_TEXT_BASE           0x80800000
 255 +#define CONFIG_SKIP_LOWLEVEL_INIT
 256 +#endif
 257 +
 258 +/* Pull in default OpenWrt configs for Lantiq SoC */
 259 +#include "openwrt-lantiq-common.h"
 260 +
 261 +#define CONFIG_ENV_UPDATE_UBOOT_NOR \
 262 +       "update-uboot-nor=run load-uboot-norspl-lzo write-uboot-nor\0"
 263 +
 264 +#define CONFIG_EXTRA_ENV_SETTINGS      \
 265 +       CONFIG_ENV_LANTIQ_DEFAULTS      \
 266 +       CONFIG_ENV_UPDATE_UBOOT_NOR
 267 +
 268 +#endif /* __CONFIG_H */
 269 --
 270 1.8.3.2
 271