target/linux/ar7/patches-2.6.32/972-cpmac_multi_probe.patch

   1 Index: linux-2.6.32.26/arch/mips/ar7/platform.c
   2 ===================================================================
   3 --- linux-2.6.32.26.orig/arch/mips/ar7/platform.c       2010-11-24 13:16:31.367487844 -0800
   4 +++ linux-2.6.32.26/arch/mips/ar7/platform.c    2010-11-24 13:16:49.677512306 -0800
   5 @@ -33,7 +33,6 @@
   6  #include <linux/string.h>
   7  #include <linux/etherdevice.h>
   8  #include <linux/phy.h>
   9 -#include <linux/phy_fixed.h>
  10
  11  #include <asm/addrspace.h>
  12  #include <asm/mach-ar7/ar7.h>
  13 @@ -46,7 +45,6 @@
  14         int reset_bit;
  15  };
  16
  17 -
  18  static int vlynq_on(struct vlynq_device *dev)
  19  {
  20         int result;
  21 @@ -72,7 +70,8 @@
  22
  23         msleep(50);
  24
  25 -       gpio_set_value(pdata->gpio_bit, 1);
  26 +       gpio_set_value(pdata->gpio_bit,
  27 +                       __vlynq_rev_reg(dev->local) < 0x00010205);
  28         msleep(50);
  29
  30         return 0;
  31 @@ -294,16 +293,10 @@
  32         .width = 2,
  33  };
  34
  35 -static struct fixed_phy_status fixed_phy_status __initdata = {
  36 -       .link = 1,
  37 -       .speed = 100,
  38 -       .duplex = 1,
  39 -};
  40 -
  41  static struct plat_cpmac_data cpmac_low_data = {
  42         .reset_bit = 17,
  43         .power_bit = 20,
  44 -       .phy_mask = 0x80000000,
  45 +       .phy_mask = 0xffffffff,
  46  };
  47
  48  static struct plat_cpmac_data cpmac_high_data = {
  49 @@ -716,11 +709,6 @@
  50         }
  51
  52         if (ar7_has_high_cpmac()) {
  53 -               res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_high_titan.id : cpmac_high.id,
  54 -                                               &fixed_phy_status);
  55 -               if (res && res != -ENODEV)
  56 -                       return res;
  57 -
  58                 cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr :
  59                                                 cpmac_high_data.dev_addr);
  60                 res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan :
  61 @@ -728,19 +716,8 @@
  62
  63                 if (res)
  64                         return res;
  65 -       } else {
  66 -               if (ar7_is_titan())
  67 -                       cpmac_low_data_titan.phy_mask = 0xffffffff;
  68 -               else
  69 -                       cpmac_low_data.phy_mask = 0xffffffff;
  70 -
  71         }
  72
  73 -       res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_low_titan.id :
  74 -                       cpmac_low.id, &fixed_phy_status);
  75 -       if (res && res != -ENODEV)
  76 -               return res;
  77 -
  78         cpmac_get_mac(0, ar7_is_titan() ? cpmac_low_data_titan.dev_addr :
  79                         cpmac_low_data.dev_addr);
  80         res = platform_device_register(ar7_is_titan() ? &cpmac_low_titan :
  81 Index: linux-2.6.32.26/arch/mips/include/asm/mach-ar7/ar7.h
  82 ===================================================================
  83 --- linux-2.6.32.26.orig/arch/mips/include/asm/mach-ar7/ar7.h   2010-11-24 13:16:31.387502677 -0800
  84 +++ linux-2.6.32.26/arch/mips/include/asm/mach-ar7/ar7.h        2010-11-24 13:16:37.117485679 -0800
  85 @@ -41,6 +41,7 @@
  86  #define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600)
  87  #define AR7_REGS_VLYNQ0        (AR7_REGS_BASE + 0x1800)
  88  #define AR7_REGS_DCL   (AR7_REGS_BASE + 0x1a00)
  89 +#define AR7_REGS_MII   (AR7_REGS_BASE + 0x1a08)
  90  #define AR7_REGS_VLYNQ1        (AR7_REGS_BASE + 0x1c00)
  91  #define AR7_REGS_MDIO  (AR7_REGS_BASE + 0x1e00)
  92  #define AR7_REGS_IRQ   (AR7_REGS_BASE + 0x2400)
  93 Index: linux-2.6.32.26/drivers/net/cpmac.c
  94 ===================================================================
  95 --- linux-2.6.32.26.orig/drivers/net/cpmac.c    2010-11-24 13:16:31.397493402 -0800
  96 +++ linux-2.6.32.26/drivers/net/cpmac.c 2010-11-24 13:16:37.117485679 -0800
  97 @@ -218,6 +218,12 @@
  98  static int cpmac_stop(struct net_device *dev);
  99  static int cpmac_open(struct net_device *dev);
 100
 101 +static struct fixed_phy_status fixed_phy_status = {
 102 +       .link = 1,
 103 +       .speed = 100,
 104 +       .duplex = 1,
 105 +};
 106 +
 107  static void cpmac_dump_regs(struct net_device *dev)
 108  {
 109         int i;
 110 @@ -269,6 +275,18 @@
 111         printk("\n");
 112  }
 113
 114 +static void auto_mdix_on(void)
 115 +{
 116 +       ar7_gpio_enable(28);
 117 +       ar7_gpio_disable(30);
 118 +}
 119 +
 120 +/*static void auto_mdix_off(void)
 121 +{
 122 +       ar7_gpio_disable(28);
 123 +       ar7_gpio_disable(30);
 124 +}*/
 125 +
 126  static int cpmac_mdio_read(struct mii_bus *bus, int phy_id, int reg)
 127  {
 128         u32 val;
 129 @@ -1104,8 +1122,6 @@
 130         .ndo_set_mac_address    = eth_mac_addr,
 131  };
 132
 133 -static int external_switch;
 134 -
 135  static int __devinit cpmac_probe(struct platform_device *pdev)
 136  {
 137         int rc, phy_id;
 138 @@ -1114,13 +1130,15 @@
 139         struct cpmac_priv *priv;
 140         struct net_device *dev;
 141         struct plat_cpmac_data *pdata;
 142 +       void __iomem *mii_reg;
 143 +       u32 tmp;
 144 +       unsigned external_mii;
 145
 146         pdata = pdev->dev.platform_data;
 147
 148 -       if (external_switch || dumb_switch) {
 149 -               strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
 150 -               phy_id = pdev->id;
 151 -       } else {
 152 +       if (dumb_switch)
 153 +               phy_id = PHY_MAX_ADDR;
 154 +       else for (external_mii = 0; external_mii <= 1; external_mii++) {
 155                 for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
 156                         if (!(pdata->phy_mask & (1 << phy_id)))
 157                                 continue;
 158 @@ -1129,13 +1147,45 @@
 159                         strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
 160                         break;
 161                 }
 162 +
 163 +               if (phy_id == PHY_MAX_ADDR || external_mii || ar7_is_titan())
 164 +                       break;
 165 +
 166 +               /* Now disable EPHY and enable MII */
 167 +               dev_info(&pdev->dev, "trying external MII\n");
 168 +               ar7_device_disable(AR7_RESET_BIT_EPHY);
 169 +
 170 +               if (!ar7_has_high_cpmac()) {
 171 +                       mii_reg = ioremap(AR7_REGS_MII, 4);
 172 +                       if (!mii_reg) {
 173 +                               dev_err(&pdev->dev, "failed to iorenamp MII_SEL\n");
 174 +                               return -ENOMEM;
 175 +                       }
 176 +
 177 +                       tmp = readl(mii_reg);
 178 +                       tmp |= 1;
 179 +                       writel(tmp, mii_reg);
 180 +                       iounmap(mii_reg);
 181 +               }
 182 +
 183 +               ar7_gpio_disable(17);
 184 +               mdelay(20);
 185 +               ar7_gpio_enable(17);
 186         }
 187
 188         if (phy_id == PHY_MAX_ADDR) {
 189 -               dev_err(&pdev->dev, "no PHY present, falling back to switch mode\n");
 190 +               /* This still does not work, so now we register a fixed phy */
 191 +               dev_info(&pdev->dev, "using fixed PHY\n");
 192 +               rc = fixed_phy_add(PHY_POLL, pdev->id, &fixed_phy_status);
 193 +               if (rc && rc != -ENODEV) {
 194 +                       dev_err(&pdev->dev, "unable to register fixed PHY\n");
 195 +                       return rc;
 196 +               }
 197 +
 198                 strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
 199                 phy_id = pdev->id;
 200 -       }
 201 +       } else
 202 +               auto_mdix_on();
 203
 204         dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
 205
 206 @@ -1244,14 +1294,14 @@
 207         ar7_gpio_disable(26);
 208         ar7_gpio_disable(27);
 209
 210 -       if (!ar7_is_titan()) {
 211 +       if (ar7_is_titan()) {
 212 +               ar7_device_reset(AR7_RESET_BIT_EPHY);
 213 +               ar7_device_reset(TITAN_RESET_BIT_EPHY1);
 214 +       } else {
 215                 ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
 216                 ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
 217 -       }
 218 -       ar7_device_reset(AR7_RESET_BIT_EPHY);
 219
 220 -       if (ar7_is_titan()) {
 221 -               ar7_device_reset(TITAN_RESET_BIT_EPHY1);
 222 +               ar7_device_reset(AR7_RESET_BIT_EPHY);
 223         }
 224
 225         cpmac_mii->reset(cpmac_mii);
 226 @@ -1262,12 +1312,6 @@
 227                 else
 228                         msleep(10);
 229
 230 -       mask &= 0x7fffffff;
 231 -       if (mask & (mask - 1)) {
 232 -               external_switch = 1;
 233 -               mask = 0;
 234 -       }
 235 -
 236         cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
 237                 ~(mask | 0x80000000);
 238         snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");