ath79: enable UART in SoC DTSI files
[openwrt/staging/wigyori.git] / target / linux / ath79 / dts / ar9344_aerohive_hiveap-121.dts
1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include "ar9344.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "aerohive,hiveap-121", "qca,ar9344";
10 model = "Aerohive HiveAP 121";
11
12 aliases {
13 led-boot = &led_power_white;
14 led-failsafe = &led_power_orange;
15 led-running = &led_power_white;
16 led-upgrade = &led_power_orange;
17 label-mac-device = &eth0;
18 };
19
20 chosen {
21 bootargs = "console=ttyS0,9600";
22 };
23
24 keys {
25 compatible = "gpio-keys";
26
27 reset {
28 label = "Reset button";
29 linux,code = <KEY_RESTART>;
30 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
31 debounce-interval = <60>;
32 };
33 };
34
35 leds {
36 compatible = "gpio-leds";
37
38 led_power_orange: power_orange {
39 label = "orange:power";
40 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
41 };
42
43 led_power_white: power_white {
44 label = "white:power";
45 gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
46 };
47 };
48
49 i2c {
50 compatible = "i2c-gpio";
51 gpios = <&gpio 13 GPIO_ACTIVE_HIGH /* sda */
52 &gpio 12 GPIO_ACTIVE_HIGH /* scl */
53 >;
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 tpm@29 {
58 compatible = "atmel,at97sc3204t";
59 reg = <0x29>;
60 };
61 };
62 };
63
64 &ref {
65 clock-frequency = <40000000>;
66 };
67
68 &gpio {
69 pinctrl-names = "default";
70 pinctrl-0 = <&jtag_disable_pins>;
71
72 gpio_ext_lna0 {
73 gpio-hog;
74 gpios = <20 0>;
75 output-low;
76 line-name = "hiveap-121:ext:lna0";
77 };
78
79 gpio_ext_lna1 {
80 gpio-hog;
81 gpios = <19 0>;
82 output-low;
83 line-name = "hiveap-121:ext:lna1";
84 };
85
86 gpio_usb_power {
87 gpio-hog;
88 gpios = <15 0>;
89 output-high;
90 line-name = "hiveap-121:power:usb";
91 };
92 };
93
94 &usb {
95 status = "okay";
96 };
97
98 &usb_phy {
99 status = "okay";
100 };
101
102 &pcie {
103 status = "okay";
104
105 wifi@0,0 {
106 compatible = "pci168c,0030";
107 reg = <0x0000 0 0 0 0>;
108
109 mtd-mac-address = <&hw_info 0x0>;
110 mtd-mac-address-increment = <2>;
111 };
112 };
113
114 &spi {
115 status = "okay";
116
117 flash@0 {
118 compatible = "jedec,spi-nor";
119 reg = <0>;
120 spi-max-frequency = <25000000>;
121
122 partitions {
123 compatible = "fixed-partitions";
124 #address-cells = <1>;
125 #size-cells = <1>;
126
127 partition@0 {
128 label = "u-boot";
129 reg = <0x000000 0x80000>;
130 read-only;
131 };
132
133 partition@80000 {
134 label = "u-boot-env";
135 reg = <0x80000 0x10000>;
136 read-only;
137 };
138
139 hw_info: partition@90000 {
140 label = "hw-info";
141 reg = <0x90000 0x10000>;
142 read-only;
143 };
144
145 partition@a0000 {
146 label = "boot-info";
147 reg = <0xa0000 0x10000>;
148 read-only;
149 };
150
151 partition@b0000 {
152 label = "boot-sinfo";
153 reg = <0xb0000 0x10000>;
154 read-only;
155 };
156 };
157 };
158 };
159
160 &wmac {
161 status = "okay";
162
163 mtd-mac-address = <&hw_info 0x0>;
164 mtd-mac-address-increment = <1>;
165 };
166
167 &nand {
168 status = "okay";
169
170 partitions {
171 compatible = "fixed-partitions";
172 #address-cells = <1>;
173 #size-cells = <1>;
174
175 partition@0 {
176 label = "u-boot1";
177 reg = <0x0 0x400000>;
178 read-only;
179 };
180
181 partition@400000 {
182 label = "u-boot-env1";
183 reg = <0x400000 0x400000>;
184 read-only;
185 };
186
187 partition@800000 {
188 label = "kernel";
189 reg = <0x800000 0x500000>;
190 };
191
192 partition@d00000 {
193 label = "ubi";
194 reg = <0xd00000 0x6f00000>;
195 };
196
197 partition@2e00000 {
198 label = "wifi-info";
199 reg = <0x7c00000 0x400000>;
200 read-only;
201 };
202 };
203 };
204
205 &mdio0 {
206 status = "okay";
207
208 phy0: ethernet-phy@0 {
209 reg = <0>;
210 };
211 };
212
213 &eth0 {
214 status = "okay";
215
216 pll-data = <0x06000000 0x00000101 0x00001313>;
217
218 mtd-mac-address = <&hw_info 0x0>;
219
220 phy-mode = "rgmii-id";
221 phy-handle = <&phy0>;
222
223 gmac-config {
224 device = <&gmac>;
225 rgmii-gmac0 = <1>;
226 rxd-delay = <1>;
227 rxdv-delay = <1>;
228 };
229 };