07de5f32c9fa73f3a9bf94c5d95fb30bc2539ec6
[openwrt/staging/wigyori.git] / target / linux / ath79 / dts / ar9344_tplink_tl-wdr4300.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 #include "ar9344.dtsi"
7
8 / {
9 aliases {
10 led-boot = &system;
11 led-failsafe = &system;
12 led-running = &system;
13 led-upgrade = &system;
14 };
15
16 leds {
17 compatible = "gpio-leds";
18
19 usb1 {
20 label = "tp-link:green:usb1";
21 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
22 default-state = "off";
23 trigger-sources = <&hub_port1>;
24 linux,default-trigger = "usbport";
25 };
26
27 usb2 {
28 label = "tp-link:green:usb2";
29 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
30 default-state = "off";
31 trigger-sources = <&hub_port2>;
32 linux,default-trigger = "usbport";
33 };
34
35 wlan2g {
36 label = "tp-link:green:wlan2g";
37 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
38 default-state = "off";
39 linux,default-trigger = "phy0tpt";
40 };
41
42 system: system {
43 label = "tp-link:green:system";
44 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
45 default-state = "on";
46 };
47
48 qss {
49 label = "tp-link:green:qss";
50 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
51 default-state = "off";
52 };
53 };
54
55 ath9k-leds {
56 compatible = "gpio-leds";
57
58 wlan5g {
59 label = "tp-link:green:wlan5g";
60 gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
61 default-state = "off";
62 linux,default-trigger = "phy1tpt";
63 };
64 };
65
66 keys {
67 compatible = "gpio-keys-polled";
68 poll-interval = <20>;
69
70 reset {
71 linux,code = <KEY_RESTART>;
72 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
73 debounce-interval = <60>;
74 };
75
76 wifi {
77 linux,code = <KEY_RFKILL>;
78 linux,input-type = <EV_SW>;
79 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
80 debounce-interval = <60>;
81 };
82 };
83
84 gpio-export {
85 compatible = "gpio-export";
86
87 gpio_usb1_power {
88 gpio-export,name = "tp-link:power:usb1";
89 gpio-export,output = <1>;
90 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
91 };
92
93 gpio_usb2_power {
94 gpio-export,name = "tp-link:power:usb2";
95 gpio-export,output = <1>;
96 gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
97 };
98
99 gpio_ext_lna0 {
100 gpio-export,name = "tp-link:ext:lna0";
101 gpio-export,output = <1>;
102 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
103 };
104
105 gpio_ext_lna1 {
106 gpio-export,name = "tp-link:ext:lna1";
107 gpio-export,output = <1>;
108 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
109 };
110 };
111 };
112
113 &ref {
114 clock-frequency = <40000000>;
115 };
116
117 &uart {
118 status = "okay";
119 };
120
121 &gpio {
122 status = "okay";
123 };
124
125 &spi {
126 num-cs = <1>;
127
128 status = "okay";
129
130 flash@0 {
131 compatible = "jedec,spi-nor";
132 reg = <0>;
133 spi-max-frequency = <25000000>;
134
135 partitions {
136 compatible = "fixed-partitions";
137 #address-cells = <1>;
138 #size-cells = <1>;
139
140 uboot: partition@0 {
141 label = "u-boot";
142 reg = <0x000000 0x020000>;
143 read-only;
144 };
145
146 partition@20000 {
147 compatible = "tplink,firmware";
148 label = "firmware";
149 reg = <0x020000 0x7d0000>;
150 };
151
152 art: partition@7f0000 {
153 label = "art";
154 reg = <0x7f0000 0x010000>;
155 read-only;
156 };
157 };
158 };
159 };
160
161 &usb {
162 #address-cells = <1>;
163 #size-cells = <0>;
164 status = "okay";
165
166 port@1 {
167 #address-cells = <1>;
168 #size-cells = <0>;
169 reg = <1>;
170 #trigger-source-cells = <0>;
171
172 hub_port1: port@1 {
173 reg = <1>;
174 #trigger-source-cells = <0>;
175 };
176
177 hub_port2: port@2 {
178 reg = <2>;
179 #trigger-source-cells = <0>;
180 };
181 };
182 };
183
184 &usb_phy {
185 status = "okay";
186 };
187
188 &pcie {
189 status = "okay";
190
191 ath9k: wifi@0,0 {
192 compatible = "pci168c,0033";
193 reg = <0x0000 0 0 0 0>;
194 mtd-mac-address = <&uboot 0x1fc00>;
195 qca,no-eeprom;
196 #gpio-cells = <2>;
197 gpio-controller;
198 };
199 };
200
201 &wmac {
202 status = "okay";
203
204 mtd-cal-data = <&art 0x1000>;
205 mtd-mac-address = <&uboot 0x1fc00>;
206 mtd-mac-address-increment = <(-1)>;
207 };
208
209 &mdio0 {
210 status = "okay";
211
212 phy-mask = <0>;
213
214 phy0: ethernet-phy@0 {
215 reg = <0>;
216 phy-mode = "rgmii";
217
218 qca,ar8327-initvals = <
219 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
220 0x10 0x80000080 /* POWER_ON_STRIP */
221 0x50 0xc737c737 /* LED_CTRL0 */
222 0x54 0x00000000 /* LED_CTRL1 */
223 0x58 0x00000000 /* LED_CTRL2 */
224 0x5c 0x0030c300 /* LED_CTRL3 */
225 0x7c 0x0000007e /* PORT0_STATUS */
226 >;
227 };
228 };
229
230 &eth0 {
231 status = "okay";
232
233 /* default for ar934x, except for 1000M */
234 pll-data = <0x06000000 0x00000101 0x00001616>;
235
236 mtd-mac-address = <&uboot 0x1fc00>;
237 mtd-mac-address-increment = <(-2)>;
238
239 phy-mode = "rgmii";
240 phy-handle = <&phy0>;
241 };