ath79: add QCA9550 reset sequence
[openwrt/staging/wigyori.git] / target / linux / ath79 / dts / qca956x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
3 #include "ath79.dtsi"
4
5 / {
6 compatible = "qca,qca9560";
7
8 #address-cells = <1>;
9 #size-cells = <1>;
10
11 cpus {
12 #address-cells = <1>;
13 #size-cells = <0>;
14
15 cpu@0 {
16 device_type = "cpu";
17 compatible = "mips,mips74Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
19 reg = <0>;
20 };
21 };
22
23 extosc: ref {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-output-names = "ref";
27 clock-frequency = <25000000>;
28 };
29
30 ahb {
31 apb {
32 ddr_ctrl: memory-controller@18000000 {
33 compatible = "qca,qca9560-ddr-controller",
34 "qca,ar7240-ddr-controller";
35 reg = <0x18000000 0x100>;
36
37 #qca,ddr-wb-channel-cells = <1>;
38 };
39
40 uart: uart@18020000 {
41 compatible = "ns16550a";
42 reg = <0x18020000 0x20>;
43
44 interrupts = <3>;
45
46 clocks = <&pll ATH79_CLK_REF>;
47 clock-names = "uart";
48
49 reg-io-width = <4>;
50 reg-shift = <2>;
51 no-loopback-test;
52
53 status = "disabled";
54 };
55
56 gpio: gpio@18040000 {
57 compatible = "qca,qca9560-gpio",
58 "qca,ar9340-gpio";
59 reg = <0x18040000 0x28>;
60
61 interrupts = <2>;
62 ngpios = <24>;
63
64 gpio-controller;
65 #gpio-cells = <2>;
66
67 interrupt-controller;
68 #interrupt-cells = <2>;
69 };
70
71 pinmux: pinmux@1804002c {
72 compatible = "pinctrl-single";
73
74 reg = <0x1804002c 0x44>;
75
76 #size-cells = <0>;
77
78 pinctrl-single,bit-per-mux;
79 pinctrl-single,register-width = <32>;
80 pinctrl-single,function-mask = <0x1>;
81 #pinctrl-cells = <2>;
82
83 jtag_disable_pins: pinmux_jtag_disable_pins {
84 pinctrl-single,bits = <0x40 0x2 0x2>;
85 };
86 };
87
88 pll: pll-controller@18050000 {
89 compatible = "qca,qca9560-pll", "syscon";
90 reg = <0x18050000 0x50>;
91
92 #clock-cells = <1>;
93 clock-output-names = "cpu", "ddr", "ahb";
94
95 clocks = <&extosc>;
96 };
97
98 wdt: wdt@18060008 {
99 compatible = "qca,ar7130-wdt";
100 reg = <0x18060008 0x8>;
101
102 interrupts = <4>;
103
104 clocks = <&pll ATH79_CLK_AHB>;
105 clock-names = "wdt";
106 };
107
108 rst: reset-controller@1806001c {
109 compatible = "qca,qca9560-reset",
110 "qca,ar7100-reset";
111 reg = <0x1806001c 0x4>;
112
113 #reset-cells = <1>;
114 interrupt-parent = <&cpuintc>;
115
116 intc3: interrupt-controller {
117 compatible = "qca,ar9340-intc";
118
119 interrupt-parent = <&cpuintc>;
120 interrupts = <3>;
121
122 interrupt-controller;
123 #interrupt-cells = <1>;
124
125 qca,int-status-addr = <0xac>;
126 qca,pending-bits = <0x1f000>, /* pcie rc */
127 <0x1000000>, /* usb1 */
128 <0x10000000>; /* usb2 */
129 };
130 };
131
132 rst2: reset-controller@180600c0 {
133 compatible = "qca,qca9560-reset",
134 "qca,ar7100-reset",
135 "simple-bus";
136 reg = <0x180600c0 0x4>;
137
138 #reset-cells = <1>;
139 };
140 };
141
142 gmac: gmac@18070000 {
143 compatible = "qca,qca9560-gmac";
144 reg = <0x18070000 0x64>;
145 };
146
147 wmac: wmac@18100000 {
148 compatible = "qca,qca9560-wmac";
149 reg = <0x18100000 0x10000>;
150
151 interrupt-parent = <&cpuintc>;
152 interrupts = <2>;
153
154 status = "disabled";
155 };
156
157 pcie: pcie-controller@18250000 {
158 compatible = "qcom,ar7240-pci";
159 #address-cells = <3>;
160 #size-cells = <2>;
161 bus-range = <0x0 0x0>;
162 reg = <0x18250000 0x1000>, /* CRP */
163 <0x18280000 0x100>, /* CTRL */
164 <0x16000000 0x1000>; /* CFG */
165 reg-names = "crp_base", "ctrl_base", "cfg_base";
166 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
167 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
168 interrupt-parent = <&intc3>;
169 interrupts = <0>;
170
171 resets = <&rst 6>, <&rst 7>;
172 reset-names = "hc", "phy";
173
174 interrupt-controller;
175 #interrupt-cells = <1>;
176
177 interrupt-map-mask = <0 0 0 1>;
178 interrupt-map = <0 0 0 0 &pcie 0>;
179 status = "disabled";
180 };
181
182 usb0: usb@1b000000 {
183 compatible = "generic-ehci";
184 reg = <0x1b000000 0x1d8>;
185
186 interrupt-parent = <&intc3>;
187 interrupts = <1>;
188
189 resets = <&rst 5>;
190 reset-names = "usb-host";
191
192 has-transaction-translator;
193 caps-offset = <0x100>;
194
195 phy-names = "usb-phy0";
196 phys = <&usb_phy0>;
197
198 status = "disabled";
199 };
200
201 usb1: usb@1b400000 {
202 compatible = "generic-ehci";
203 reg = <0x1b400000 0x1d8>;
204
205 interrupt-parent = <&intc3>;
206 interrupts = <2>;
207
208 resets = <&rst2 5>;
209 reset-names = "usb-host";
210
211 has-transaction-translator;
212 caps-offset = <0x100>;
213
214 phy-names = "usb-phy1";
215 phys = <&usb_phy1>;
216
217 status = "disabled";
218 };
219
220 spi: spi@1f000000 {
221 compatible = "qca,ar934x-spi";
222 reg = <0x1f000000 0x1c>;
223
224 clocks = <&pll ATH79_CLK_AHB>;
225
226 status = "disabled";
227
228 #address-cells = <1>;
229 #size-cells = <0>;
230 };
231 };
232
233 usb_phy0: usb-phy {
234 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
235
236 reset-names = "usb-phy", "usb-suspend-override";
237 resets = <&rst 4>, <&rst 3>;
238
239 #phy-cells = <0>;
240
241 status = "disabled";
242 };
243
244 usb_phy1: usb-phy {
245 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
246
247 reset-names = "usb-phy", "usb-suspend-override";
248 resets = <&rst2 4>, <&rst2 3>;
249
250 #phy-cells = <0>;
251
252 status = "disabled";
253 };
254 };
255
256 &mdio0 {
257 resets = <&rst 22>;
258 reset-names = "mdio";
259 };
260
261 &eth0 {
262 compatible = "qca,qca9560-eth", "syscon";
263
264 pll-data = <0x03000000 0x00000101 0x00001919>;
265 pll-reg = <0 0x48 0>;
266 pll-handle = <&pll>;
267
268 resets = <&rst 9>;
269 reset-names = "mac";
270 };
271
272 &mdio1 {
273 status = "okay";
274 resets = <&rst 23>;
275 reset-names = "mdio";
276 builtin-switch;
277
278 builtin_switch: switch0@1f {
279 compatible = "qca,ar8229";
280 reg = <0x1f>;
281 resets = <&rst 8>;
282 reset-names = "switch";
283 phy-mode = "gmii";
284 qca,phy4-mii-enable;
285 qca,mib-poll-interval = <500>;
286
287 mdio-bus {
288 #address-cells = <1>;
289 #size-cells = <0>;
290
291 swphy0: ethernet-phy@0 {
292 reg = <0>;
293 phy-mode = "mii";
294 };
295
296 swphy4: ethernet-phy@4 {
297 reg = <4>;
298 phy-mode = "mii";
299 };
300 };
301 };
302 };
303
304 &eth1 {
305 compatible = "qca,qca9560-eth", "syscon";
306
307 phy-mode = "gmii";
308
309 resets = <&rst 13>;
310 reset-names = "mac";
311
312 fixed-link {
313 speed = <1000>;
314 full-duplex;
315 };
316 };