ath79: add support for Phicomm K2T
[openwrt/staging/wigyori.git] / target / linux / ath79 / dts / qca956x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
3 #include "ath79.dtsi"
4
5 / {
6 compatible = "qca,qca9560";
7
8 #address-cells = <1>;
9 #size-cells = <1>;
10
11 cpus {
12 #address-cells = <1>;
13 #size-cells = <0>;
14
15 cpu@0 {
16 device_type = "cpu";
17 compatible = "mips,mips74Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
19 reg = <0>;
20 };
21 };
22
23 extosc: ref {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-output-names = "ref";
27 clock-frequency = <25000000>;
28 };
29
30 ahb {
31 apb {
32 ddr_ctrl: memory-controller@18000000 {
33 compatible = "qca,qca9560-ddr-controller",
34 "qca,ar7240-ddr-controller";
35 reg = <0x18000000 0x100>;
36
37 #qca,ddr-wb-channel-cells = <1>;
38 };
39
40 uart: uart@18020000 {
41 compatible = "ns16550a";
42 reg = <0x18020000 0x20>;
43
44 interrupts = <3>;
45
46 clocks = <&pll ATH79_CLK_REF>;
47 clock-names = "uart";
48
49 reg-io-width = <4>;
50 reg-shift = <2>;
51 no-loopback-test;
52
53 status = "disabled";
54 };
55
56 gpio: gpio@18040000 {
57 compatible = "qca,qca9560-gpio",
58 "qca,ar9340-gpio";
59 reg = <0x18040000 0x28>;
60
61 interrupts = <2>;
62 ngpios = <24>;
63
64 gpio-controller;
65 #gpio-cells = <2>;
66
67 interrupt-controller;
68 #interrupt-cells = <2>;
69 };
70
71 pinmux: pinmux@1804002c {
72 compatible = "pinctrl-single";
73
74 reg = <0x1804002c 0x40>;
75
76 #size-cells = <0>;
77
78 pinctrl-single,bit-per-mux;
79 pinctrl-single,register-width = <32>;
80 pinctrl-single,function-mask = <0x1>;
81 #pinctrl-cells = <2>;
82
83 jtag_disable_pins: pinmux_jtag_disable_pins {
84 pinctrl-single,bits = <0x40 0x2 0x2>;
85 };
86 };
87
88 pll: pll-controller@18050000 {
89 compatible = "qca,qca9560-pll", "syscon";
90 reg = <0x18050000 0x50>;
91
92 #clock-cells = <1>;
93 clock-output-names = "cpu", "ddr", "ahb";
94
95 clocks = <&extosc>;
96 };
97
98 wdt: wdt@18060008 {
99 compatible = "qca,ar7130-wdt";
100 reg = <0x18060008 0x8>;
101
102 interrupts = <4>;
103
104 clocks = <&pll ATH79_CLK_AHB>;
105 clock-names = "wdt";
106 };
107
108 rst: reset-controller@1806001c {
109 compatible = "qca,qca9560-reset",
110 "qca,ar7100-reset",
111 "simple-bus";
112 reg = <0x1806001c 0x4>;
113
114 #reset-cells = <1>;
115 interrupt-parent = <&cpuintc>;
116
117 intc3: interrupt-controller@3 {
118 compatible = "qcom,qca9556-intc";
119
120 interrupts = <3>;
121
122 interrupt-controller;
123 #interrupt-cells = <1>;
124
125 qcom,pending-bits = <0x1f000>, /* pcie rc */
126 <0x1000000>, /* usb1 */
127 <0x10000000>; /* usb2 */
128 };
129 };
130
131 rst2: reset-controller@180600c0 {
132 compatible = "qca,qca9560-reset",
133 "qca,ar7100-reset",
134 "simple-bus";
135 reg = <0x180600c0 0x4>;
136
137 #reset-cells = <1>;
138 };
139
140 wmac: wmac@18100000 {
141 compatible = "qca,qca9560-wmac";
142 reg = <0x18100000 0x10000>;
143
144 interrupt-parent = <&cpuintc>;
145 interrupts = <2>;
146
147 status = "disabled";
148 };
149
150 pcie: pcie-controller@18250000 {
151 compatible = "qcom,ar7240-pci";
152 #address-cells = <3>;
153 #size-cells = <2>;
154 bus-range = <0x0 0x0>;
155 reg = <0x18250000 0x1000>, /* CRP */
156 <0x18280000 0x100>, /* CTRL */
157 <0x16000000 0x1000>; /* CFG */
158 reg-names = "crp_base", "ctrl_base", "cfg_base";
159 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
160 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
161 interrupt-parent = <&intc3>;
162 interrupts = <0>;
163
164 interrupt-controller;
165 #interrupt-cells = <1>;
166
167 interrupt-map-mask = <0 0 0 1>;
168 interrupt-map = <0 0 0 0 &pcie 0>;
169 status = "disabled";
170 };
171 };
172
173 usb0: usb@1b000000 {
174 compatible = "generic-ehci";
175 reg = <0x1b000000 0x1d8>;
176
177 interrupt-parent = <&intc3>;
178 interrupts = <1>;
179
180 resets = <&rst 5>;
181 reset-names = "usb-host";
182
183 has-transaction-translator;
184 caps-offset = <0x100>;
185
186 phy-names = "usb-phy0";
187 phys = <&usb_phy0>;
188
189 status = "disabled";
190 };
191
192 usb1: usb@1b400000 {
193 compatible = "generic-ehci";
194 reg = <0x1b400000 0x1d8>;
195
196 interrupt-parent = <&intc3>;
197 interrupts = <2>;
198
199 resets = <&rst2 5>;
200 reset-names = "usb-host";
201
202 has-transaction-translator;
203 caps-offset = <0x100>;
204
205 phy-names = "usb-phy1";
206 phys = <&usb_phy1>;
207
208 status = "disabled";
209 };
210
211 spi: spi@1f000000 {
212 compatible = "qca,qca9560-spi", "qca,ar7100-spi";
213 reg = <0x1f000000 0x10>;
214
215 clocks = <&pll ATH79_CLK_AHB>;
216 clock-names = "ahb";
217
218 status = "disabled";
219
220 #address-cells = <1>;
221 #size-cells = <0>;
222 };
223 };
224
225 usb_phy0: usb-phy {
226 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
227
228 reset-names = "usb-phy", "usb-suspend-override";
229 resets = <&rst 4>, <&rst 3>;
230
231 #phy-cells = <0>;
232
233 status = "disabled";
234 };
235
236 usb_phy1: usb-phy {
237 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
238
239 reset-names = "usb-phy", "usb-suspend-override";
240 resets = <&rst2 4>, <&rst2 3>;
241
242 #phy-cells = <0>;
243
244 status = "disabled";
245 };
246 };
247
248 &mdio0 {
249 resets = <&rst 22>;
250 reset-names = "mdio";
251 };
252
253 &eth0 {
254 compatible = "qca,qca9560-eth", "syscon";
255
256 pll-data = <0x03000000 0x00000101 0x00001919>;
257 pll-reg = <0 0x48 0>;
258 pll-handle = <&pll>;
259
260 phy-mode = "sgmii";
261
262 resets = <&rst 9>;
263 reset-names = "mac";
264 };
265
266 &mdio1 {
267 resets = <&rst 23>;
268 reset-names = "mdio";
269 builtin-switch;
270 };
271
272 &eth1 {
273 compatible = "qca,qca9560-eth", "syscon";
274
275 phy-mode = "gmii";
276
277 resets = <&rst 13>;
278 reset-names = "mac";
279
280 status = "disabled";
281 };