target/linux/bcm27xx/patches-5.15/950-0866-clk-tests-Add-some-tests-for-clk_get_rate_range.patch

   1 From 96da86bde649d53c634b35be715c1e499e39ccf7 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime@cerno.tech>
   3 Date: Fri, 15 Apr 2022 14:45:17 +0200
   4 Subject: [PATCH] clk: tests: Add some tests for clk_get_rate_range()
   5
   6 Let's introduce a bunch of unit tests to make sure the values returned
   7 by clk_get_rate_range() are sane.
   8
   9 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
  10 ---
  11  drivers/clk/clk_test.c | 182 +++++++++++++++++++++++++++++++++++++++++
  12  1 file changed, 182 insertions(+)
  13
  14 --- a/drivers/clk/clk_test.c
  15 +++ b/drivers/clk/clk_test.c
  16 @@ -923,6 +923,109 @@ clk_test_single_parent_mux_get_parent(st
  17  }
  18
  19  /*
  20 + * Test that for a clock with a single parent and CLK_SET_RATE_PARENT,
  21 + * if we set a range on both the child clock and its parent, with a
  22 + * smaller range on the child, the rate range returned by
  23 + * clk_get_rate_range() is aggregate of both ranges.
  24 + */
  25 +static void
  26 +clk_test_single_parent_mux_get_range_both_child_smaller(struct kunit *test)
  27 +{
  28 +       struct clk_single_parent_ctx *ctx = test->priv;
  29 +       struct clk_hw *hw = &ctx->hw;
  30 +       struct clk *clk = hw->clk;
  31 +       struct clk *parent;
  32 +       unsigned long min, max;
  33 +       int ret;
  34 +
  35 +       parent = clk_get_parent(clk);
  36 +       KUNIT_ASSERT_PTR_NE(test, parent, NULL);
  37 +
  38 +       ret = clk_set_rate_range(parent, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2);
  39 +       KUNIT_ASSERT_EQ(test, ret, 0);
  40 +
  41 +       ret = clk_set_rate_range(clk,
  42 +                                DUMMY_CLOCK_RATE_1 + 1000,
  43 +                                DUMMY_CLOCK_RATE_2 - 1000);
  44 +       KUNIT_ASSERT_EQ(test, ret, 0);
  45 +
  46 +       clk_get_rate_range(clk, &min, &max);
  47 +       KUNIT_EXPECT_EQ(test, min, DUMMY_CLOCK_RATE_1 + 1000);
  48 +       KUNIT_EXPECT_EQ(test, max, DUMMY_CLOCK_RATE_2 - 1000);
  49 +}
  50 +
  51 +/*
  52 + * Test that for a clock with a single parent and CLK_SET_RATE_PARENT,
  53 + * if we set a range on both the child clock and its parent, with a
  54 + * smaller range on the parent, the rate range returned by
  55 + * clk_get_rate_range() is aggregate of both ranges.
  56 + *
  57 + * FIXME: clk_get_rate_range() (and clk_core_get_boundaries() in
  58 + * particular) doesn't take the parent range into account when the clock
  59 + * has CLK_SET_RATE_PARENT.
  60 + */
  61 +static void
  62 +clk_test_single_parent_mux_get_range_both_parent_smaller(struct kunit *test)
  63 +{
  64 +       struct clk_single_parent_ctx *ctx = test->priv;
  65 +       struct clk_hw *hw = &ctx->hw;
  66 +       struct clk *clk = hw->clk;
  67 +       struct clk *parent;
  68 +       unsigned long min, max;
  69 +       int ret;
  70 +
  71 +       kunit_skip(test, "This needs to be fixed in the core.");
  72 +
  73 +       parent = clk_get_parent(clk);
  74 +       KUNIT_ASSERT_PTR_NE(test, parent, NULL);
  75 +
  76 +       ret = clk_set_rate_range(parent,
  77 +                                DUMMY_CLOCK_RATE_1 + 1000,
  78 +                                DUMMY_CLOCK_RATE_2 - 1000);
  79 +       KUNIT_ASSERT_EQ(test, ret, 0);
  80 +
  81 +       ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2);
  82 +       KUNIT_ASSERT_EQ(test, ret, 0);
  83 +
  84 +       clk_get_rate_range(clk, &min, &max);
  85 +       KUNIT_EXPECT_EQ(test, min, DUMMY_CLOCK_RATE_1 + 1000);
  86 +       KUNIT_EXPECT_EQ(test, min, DUMMY_CLOCK_RATE_2 - 1000);
  87 +}
  88 +
  89 +/*
  90 + * Test that for a clock with a single parent and CLK_SET_RATE_PARENT,
  91 + * if we set a range on the parent clock only, the rate range returned
  92 + * by clk_get_rate_range() on the children clock matches the parent
  93 + * range.
  94 + *
  95 + * FIXME: clk_get_rate_range() (and clk_core_get_boundaries() in
  96 + * particular) doesn't take the parent range into account when the clock
  97 + * has CLK_SET_RATE_PARENT.
  98 + */
  99 +static void
 100 +clk_test_single_parent_mux_get_range_parent_only(struct kunit *test)
 101 +{
 102 +       struct clk_single_parent_ctx *ctx = test->priv;
 103 +       struct clk_hw *hw = &ctx->hw;
 104 +       struct clk *clk = hw->clk;
 105 +       struct clk *parent;
 106 +       unsigned long min, max;
 107 +       int ret;
 108 +
 109 +       kunit_skip(test, "This needs to be fixed in the core.");
 110 +
 111 +       parent = clk_get_parent(clk);
 112 +       KUNIT_ASSERT_PTR_NE(test, parent, NULL);
 113 +
 114 +       ret = clk_set_rate_range(parent, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2);
 115 +       KUNIT_ASSERT_EQ(test, ret, 0);
 116 +
 117 +       clk_get_rate_range(clk, &min, &max);
 118 +       KUNIT_EXPECT_EQ(test, min, DUMMY_CLOCK_RATE_1);
 119 +       KUNIT_EXPECT_EQ(test, min, DUMMY_CLOCK_RATE_2);
 120 +}
 121 +
 122 +/*
 123   * Test that for a clock with a single parent, clk_has_parent() actually
 124   * reports it as a parent.
 125   */
 126 @@ -1099,6 +1202,9 @@ clk_test_single_parent_mux_set_range_rou
 127
 128  static struct kunit_case clk_single_parent_mux_test_cases[] = {
 129         KUNIT_CASE(clk_test_single_parent_mux_get_parent),
 130 +       KUNIT_CASE(clk_test_single_parent_mux_get_range_both_child_smaller),
 131 +       KUNIT_CASE(clk_test_single_parent_mux_get_range_both_parent_smaller),
 132 +       KUNIT_CASE(clk_test_single_parent_mux_get_range_parent_only),
 133         KUNIT_CASE(clk_test_single_parent_mux_has_parent),
 134         KUNIT_CASE(clk_test_single_parent_mux_set_range_disjoint_child_last),
 135         KUNIT_CASE(clk_test_single_parent_mux_set_range_disjoint_parent_last),
 136 @@ -1334,6 +1440,79 @@ clk_orphan_two_level_root_last_test_suit
 137  };
 138
 139  /*
 140 + * Test that clk_set_rate_range() and clk_get_rate_range() are
 141 + * consistent on a simple clock without any parent.
 142 + */
 143 +static void clk_range_test_get_range(struct kunit *test)
 144 +{
 145 +       struct clk_dummy_context *ctx = test->priv;
 146 +       struct clk_hw *hw = &ctx->hw;
 147 +       struct clk *clk = hw->clk;
 148 +       unsigned long min, max;
 149 +       int ret;
 150 +
 151 +       ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2);
 152 +       KUNIT_ASSERT_EQ(test, ret, 0);
 153 +
 154 +       clk_get_rate_range(clk, &min, &max);
 155 +       KUNIT_EXPECT_EQ(test, min, DUMMY_CLOCK_RATE_1);
 156 +       KUNIT_EXPECT_EQ(test, max, DUMMY_CLOCK_RATE_2);
 157 +}
 158 +
 159 +/*
 160 + * Test that, on a simple clock without any parent, if a rate range is
 161 + * set on a clk, it's properly reported by clk_get_rate_range() on all
 162 + * the clk structure of that clock.
 163 + */
 164 +static void clk_range_test_get_range_multiple_clk(struct kunit *test)
 165 +{
 166 +       struct clk_dummy_context *ctx = test->priv;
 167 +       struct clk_hw *hw = &ctx->hw;
 168 +       struct clk *user1, *user2;
 169 +       unsigned long min, max;
 170 +       int ret;
 171 +
 172 +       user1 = clk_hw_get_clk(hw, NULL);
 173 +       KUNIT_ASSERT_NOT_ERR_OR_NULL(test, user1);
 174 +
 175 +       user2 = clk_hw_get_clk(hw, NULL);
 176 +       KUNIT_ASSERT_NOT_ERR_OR_NULL(test, user2);
 177 +
 178 +       ret = clk_set_rate_range(user1,
 179 +                                DUMMY_CLOCK_RATE_1,
 180 +                                DUMMY_CLOCK_RATE_2);
 181 +       KUNIT_ASSERT_EQ(test, ret, 0);
 182 +
 183 +       clk_get_rate_range(user2, &min, &max);
 184 +       KUNIT_EXPECT_EQ(test, min, DUMMY_CLOCK_RATE_1);
 185 +       KUNIT_EXPECT_EQ(test, max, DUMMY_CLOCK_RATE_2);
 186 +}
 187 +
 188 +/*
 189 + * Test that, on a simple clock without any parent, if a rate range is
 190 + * set on struct clk_hw, it's properly reported by clk_get_rate_range().
 191 + */
 192 +static void clk_range_test_get_range_with_hw(struct kunit *test)
 193 +{
 194 +       struct clk_dummy_context *ctx = test->priv;
 195 +       struct clk_hw *hw = &ctx->hw;
 196 +       struct clk *clk = hw->clk;
 197 +       unsigned long min, max;
 198 +       int ret;
 199 +
 200 +       clk_hw_set_rate_range(hw, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2);
 201 +
 202 +       ret = clk_set_rate_range(clk,
 203 +                                DUMMY_CLOCK_RATE_1 + 1000,
 204 +                                DUMMY_CLOCK_RATE_2 - 1000);
 205 +       KUNIT_ASSERT_EQ(test, ret, 0);
 206 +
 207 +       clk_get_rate_range(clk, &min, &max);
 208 +       KUNIT_EXPECT_EQ(test, min, DUMMY_CLOCK_RATE_1 + 1000);
 209 +       KUNIT_EXPECT_EQ(test, max, DUMMY_CLOCK_RATE_2 - 1000);
 210 +}
 211 +
 212 +/*
 213   * Test that clk_set_rate_range won't return an error for a valid range
 214   * and that it will make sure the rate of the clock is within the
 215   * boundaries.
 216 @@ -1621,6 +1800,9 @@ static void clk_range_test_set_range_get
 217  }
 218
 219  static struct kunit_case clk_range_test_cases[] = {
 220 +       KUNIT_CASE(clk_range_test_get_range),
 221 +       KUNIT_CASE(clk_range_test_get_range_with_hw),
 222 +       KUNIT_CASE(clk_range_test_get_range_multiple_clk),
 223         KUNIT_CASE(clk_range_test_set_range),
 224         KUNIT_CASE(clk_range_test_set_range_invalid),
 225         KUNIT_CASE(clk_range_test_multiple_disjoints_range),