target/linux/brcm2708/patches-4.19/950-0584-drm-v3d-Don-t-try-to-set-OVRTMUOUT-on-V3D-4.x.patch

   1 From d4b98e9e78d87fe34b89077b9776a66f19d23856 Mon Sep 17 00:00:00 2001
   2 From: Eric Anholt <eric@anholt.net>
   3 Date: Tue, 16 Oct 2018 10:13:41 -0700
   4 Subject: [PATCH 584/703] drm/v3d: Don't try to set OVRTMUOUT on V3D 4.x.
   5
   6 The old field is gone and the register now has a different field,
   7 QRMAXCNT for how many TMU requests get serviced before thread switch.
   8 We were accidentally reducing it from its default of 0x3 (4 requests)
   9 to 0x0 (1).
  10
  11 v2: Skip setting the reg at all on 4.x, instead of trying to update
  12     only the old field.
  13
  14 Signed-off-by: Eric Anholt <eric@anholt.net>
  15 ---
  16  drivers/gpu/drm/v3d/v3d_gem.c  | 3 ++-
  17  drivers/gpu/drm/v3d/v3d_regs.h | 2 ++
  18  2 files changed, 4 insertions(+), 1 deletion(-)
  19
  20 --- a/drivers/gpu/drm/v3d/v3d_gem.c
  21 +++ b/drivers/gpu/drm/v3d/v3d_gem.c
  22 @@ -25,7 +25,8 @@ v3d_init_core(struct v3d_dev *v3d, int c
  23          * type.  If you want the default behavior, you can still put
  24          * "2" in the indirect texture state's output_type field.
  25          */
  26 -       V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
  27 +       if (v3d->ver < 40)
  28 +               V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
  29
  30         /* Whenever we flush the L2T cache, we always want to flush
  31          * the whole thing.
  32 --- a/drivers/gpu/drm/v3d/v3d_regs.h
  33 +++ b/drivers/gpu/drm/v3d/v3d_regs.h
  34 @@ -216,6 +216,8 @@
  35  # define V3D_IDENT2_BCG_INT                            BIT(28)
  36
  37  #define V3D_CTL_MISCCFG                                0x00018
  38 +# define V3D_CTL_MISCCFG_QRMAXCNT_MASK                 V3D_MASK(3, 1)
  39 +# define V3D_CTL_MISCCFG_QRMAXCNT_SHIFT                1
  40  # define V3D_MISCCFG_OVRTMUOUT                         BIT(0)
  41
  42  #define V3D_CTL_L2CACTL                                0x00020