bcm63xx: add SMP support for BCM6362 and BCM6368
[openwrt/staging/wigyori.git] / target / linux / brcm63xx / patches-3.8 / 317-MIPS-BCM63XX-use-a-helper-for-getting-the-right-regi.patch
1 From 7c9d3fe01034adbb890aab7c44534658f89c211b Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Thu, 25 Apr 2013 15:35:12 +0200
4 Subject: [PATCH 08/13] MIPS: BCM63XX: use a helper for getting the right
5 register address
6
7 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
8 ---
9 arch/mips/bcm63xx/irq.c | 30 ++++++++++++++++++++++++------
10 1 file changed, 24 insertions(+), 6 deletions(-)
11
12 --- a/arch/mips/bcm63xx/irq.c
13 +++ b/arch/mips/bcm63xx/irq.c
14 @@ -251,6 +251,20 @@ static inline u32 get_ext_irq_perf_reg(i
15 return ext_irq_cfg_reg2;
16 }
17
18 +static inline u32 get_irq_stat_addr(int cpu)
19 +{
20 + if (cpu == 0)
21 + return irq_stat_addr0;
22 + return irq_stat_addr1;
23 +}
24 +
25 +static inline u32 get_irq_mask_addr(int cpu)
26 +{
27 + if (cpu == 0)
28 + return irq_mask_addr0;
29 + return irq_mask_addr1;
30 +}
31 +
32 static inline void handle_internal(int intbit)
33 {
34 if (is_ext_irq_cascaded &&
35 @@ -274,13 +288,15 @@ void __dispatch_internal_##width(void)
36 unsigned int src, tgt; \
37 bool irqs_pending = false; \
38 static int i; \
39 + u32 irq_stat_addr = get_irq_stat_addr(0); \
40 + u32 irq_mask_addr = get_irq_mask_addr(0); \
41 \
42 /* read registers in reverse order */ \
43 for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
44 u32 val; \
45 \
46 - val = bcm_readl(irq_stat_addr0 + src * sizeof(u32)); \
47 - val &= bcm_readl(irq_mask_addr0 + src * sizeof(u32)); \
48 + val = bcm_readl(irq_stat_addr + src * sizeof(u32)); \
49 + val &= bcm_readl(irq_mask_addr + src * sizeof(u32)); \
50 pending[--tgt] = val; \
51 \
52 if (val) \
53 @@ -306,10 +322,11 @@ static void __internal_irq_mask_##width(
54 u32 val; \
55 unsigned reg = (irq / 32) ^ (width/32 - 1); \
56 unsigned bit = irq & 0x1f; \
57 + u32 irq_mask_addr = get_irq_mask_addr(0); \
58 \
59 - val = bcm_readl(irq_mask_addr0 + reg * sizeof(u32)); \
60 + val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
61 val &= ~(1 << bit); \
62 - bcm_writel(val, irq_mask_addr0 + reg * sizeof(u32)); \
63 + bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
64 } \
65 \
66 static void __internal_irq_unmask_##width(unsigned int irq) \
67 @@ -317,10 +334,11 @@ static void __internal_irq_unmask_##widt
68 u32 val; \
69 unsigned reg = (irq / 32) ^ (width/32 - 1); \
70 unsigned bit = irq & 0x1f; \
71 + u32 irq_mask_addr = get_irq_mask_addr(0); \
72 \
73 - val = bcm_readl(irq_mask_addr0 + reg * sizeof(u32)); \
74 + val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
75 val |= (1 << bit); \
76 - bcm_writel(val, irq_mask_addr0 + reg * sizeof(u32)); \
77 + bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
78 }
79
80 BUILD_IPIC_INTERNAL(32);