target/linux/generic/pending-4.19/220-optimize_inlining.patch

   1 --- a/arch/arm/kernel/atags.h
   2 +++ b/arch/arm/kernel/atags.h
   3 @@ -5,7 +5,7 @@ void convert_to_tag_list(struct tag *tag
   4  const struct machine_desc *setup_machine_tags(phys_addr_t __atags_pointer,
   5         unsigned int machine_nr);
   6  #else
   7 -static inline const struct machine_desc *
   8 +static inline const struct machine_desc * __init __noreturn
   9  setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
  10  {
  11         early_print("no ATAGS support: can't continue\n");
  12 --- a/arch/arm64/include/asm/cpufeature.h
  13 +++ b/arch/arm64/include/asm/cpufeature.h
  14 @@ -366,7 +366,7 @@ static inline bool cpu_have_feature(unsi
  15  }
  16
  17  /* System capability check for constant caps */
  18 -static inline bool __cpus_have_const_cap(int num)
  19 +static __always_inline bool __cpus_have_const_cap(int num)
  20  {
  21         if (num >= ARM64_NCAPS)
  22                 return false;
  23 @@ -380,7 +380,7 @@ static inline bool cpus_have_cap(unsigne
  24         return test_bit(num, cpu_hwcaps);
  25  }
  26
  27 -static inline bool cpus_have_const_cap(int num)
  28 +static __always_inline bool cpus_have_const_cap(int num)
  29  {
  30         if (static_branch_likely(&arm64_const_caps_ready))
  31                 return __cpus_have_const_cap(num);
  32 --- a/arch/mips/include/asm/bitops.h
  33 +++ b/arch/mips/include/asm/bitops.h
  34 @@ -463,7 +463,7 @@ static inline void __clear_bit_unlock(un
  35   * Return the bit position (0..63) of the most significant 1 bit in a word
  36   * Returns -1 if no 1 bit exists
  37   */
  38 -static inline unsigned long __fls(unsigned long word)
  39 +static __always_inline unsigned long __fls(unsigned long word)
  40  {
  41         int num;
  42
  43 @@ -529,7 +529,7 @@ static inline unsigned long __fls(unsign
  44   * Returns 0..SZLONG-1
  45   * Undefined if no bit exists, so code should check against 0 first.
  46   */
  47 -static inline unsigned long __ffs(unsigned long word)
  48 +static __always_inline unsigned long __ffs(unsigned long word)
  49  {
  50         return __fls(word & -word);
  51  }
  52 --- a/arch/mips/kernel/cpu-bugs64.c
  53 +++ b/arch/mips/kernel/cpu-bugs64.c
  54 @@ -42,8 +42,8 @@ static inline void align_mod(const int a
  55                 : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod));
  56  }
  57
  58 -static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
  59 -                                    const int align, const int mod)
  60 +static __always_inline void mult_sh_align_mod(long *v1, long *v2, long *w,
  61 +                                             const int align, const int mod)
  62  {
  63         unsigned long flags;
  64         int m1, m2;
  65 --- a/arch/powerpc/kernel/prom_init.c
  66 +++ b/arch/powerpc/kernel/prom_init.c
  67 @@ -498,14 +498,14 @@ static int __init prom_next_node(phandle
  68         }
  69  }
  70
  71 -static inline int prom_getprop(phandle node, const char *pname,
  72 -                              void *value, size_t valuelen)
  73 +static inline int __init prom_getprop(phandle node, const char *pname,
  74 +                                     void *value, size_t valuelen)
  75  {
  76         return call_prom("getprop", 4, 1, node, ADDR(pname),
  77                          (u32)(unsigned long) value, (u32) valuelen);
  78  }
  79
  80 -static inline int prom_getproplen(phandle node, const char *pname)
  81 +static inline int __init prom_getproplen(phandle node, const char *pname)
  82  {
  83         return call_prom("getproplen", 2, 1, node, ADDR(pname));
  84  }
  85 --- a/arch/powerpc/mm/tlb-radix.c
  86 +++ b/arch/powerpc/mm/tlb-radix.c
  87 @@ -90,8 +90,8 @@ void radix__tlbiel_all(unsigned int acti
  88         asm volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory");
  89  }
  90
  91 -static inline void __tlbiel_pid(unsigned long pid, int set,
  92 -                               unsigned long ric)
  93 +static __always_inline void __tlbiel_pid(unsigned long pid, int set,
  94 +                                        unsigned long ric)
  95  {
  96         unsigned long rb,rs,prs,r;
  97
  98 @@ -106,7 +106,7 @@ static inline void __tlbiel_pid(unsigned
  99         trace_tlbie(0, 1, rb, rs, ric, prs, r);
 100  }
 101
 102 -static inline void __tlbie_pid(unsigned long pid, unsigned long ric)
 103 +static __always_inline void __tlbie_pid(unsigned long pid, unsigned long ric)
 104  {
 105         unsigned long rb,rs,prs,r;
 106
 107 @@ -136,7 +136,7 @@ static inline void __tlbiel_lpid(unsigne
 108         trace_tlbie(lpid, 1, rb, rs, ric, prs, r);
 109  }
 110
 111 -static inline void __tlbie_lpid(unsigned long lpid, unsigned long ric)
 112 +static __always_inline void __tlbie_lpid(unsigned long lpid, unsigned long ric)
 113  {
 114         unsigned long rb,rs,prs,r;
 115
 116 @@ -300,7 +300,7 @@ static inline void fixup_tlbie_lpid(unsi
 117  /*
 118   * We use 128 set in radix mode and 256 set in hpt mode.
 119   */
 120 -static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
 121 +static __always_inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
 122  {
 123         int set;
 124
 125 @@ -982,7 +982,7 @@ void radix__tlb_flush(struct mmu_gather
 126         tlb->need_flush_all = 0;
 127  }
 128
 129 -static inline void __radix__flush_tlb_range_psize(struct mm_struct *mm,
 130 +static __always_inline void __radix__flush_tlb_range_psize(struct mm_struct *mm,
 131                                 unsigned long start, unsigned long end,
 132                                 int psize, bool also_pwc)
 133  {
 134 --- a/arch/s390/include/asm/cpacf.h
 135 +++ b/arch/s390/include/asm/cpacf.h
 136 @@ -202,7 +202,7 @@ static inline int __cpacf_check_opcode(u
 137         }
 138  }
 139
 140 -static inline int cpacf_query(unsigned int opcode, cpacf_mask_t *mask)
 141 +static __always_inline int cpacf_query(unsigned int opcode, cpacf_mask_t *mask)
 142  {
 143         if (__cpacf_check_opcode(opcode)) {
 144                 __cpacf_query(opcode, mask);
 145 --- a/arch/x86/Kconfig.debug
 146 +++ b/arch/x86/Kconfig.debug
 147 @@ -276,20 +276,6 @@ config CPA_DEBUG
 148         ---help---
 149           Do change_page_attr() self-tests every 30 seconds.
 150
 151 -config OPTIMIZE_INLINING
 152 -       bool "Allow gcc to uninline functions marked 'inline'"
 153 -       ---help---
 154 -         This option determines if the kernel forces gcc to inline the functions
 155 -         developers have marked 'inline'. Doing so takes away freedom from gcc to
 156 -         do what it thinks is best, which is desirable for the gcc 3.x series of
 157 -         compilers. The gcc 4.x series have a rewritten inlining algorithm and
 158 -         enabling this option will generate a smaller kernel there. Hopefully
 159 -         this algorithm is so good that allowing gcc 4.x and above to make the
 160 -         decision will become the default in the future. Until then this option
 161 -         is there to test gcc for this.
 162 -
 163 -         If unsure, say N.
 164 -
 165  config DEBUG_ENTRY
 166         bool "Debug low-level entry code"
 167         depends on DEBUG_KERNEL
 168 --- a/drivers/mtd/nand/raw/vf610_nfc.c
 169 +++ b/drivers/mtd/nand/raw/vf610_nfc.c
 170 @@ -373,7 +373,7 @@ static int vf610_nfc_cmd(struct nand_chi
 171  {
 172         const struct nand_op_instr *instr;
 173         struct vf610_nfc *nfc = chip_to_nfc(chip);
 174 -       int op_id = -1, trfr_sz = 0, offset;
 175 +       int op_id = -1, trfr_sz = 0, offset = 0;
 176         u32 col = 0, row = 0, cmd1 = 0, cmd2 = 0, code = 0;
 177         bool force8bit = false;
 178
 179 --- a/lib/Kconfig.debug
 180 +++ b/lib/Kconfig.debug
 181 @@ -309,6 +309,20 @@ config HEADERS_CHECK
 182           exported to $(INSTALL_HDR_PATH) (usually 'usr/include' in
 183           your build tree), to make sure they're suitable.
 184
 185 +config OPTIMIZE_INLINING
 186 +       bool "Allow compiler to uninline functions marked 'inline'"
 187 +       help
 188 +         This option determines if the kernel forces gcc to inline the functions
 189 +         developers have marked 'inline'. Doing so takes away freedom from gcc to
 190 +         do what it thinks is best, which is desirable for the gcc 3.x series of
 191 +         compilers. The gcc 4.x series have a rewritten inlining algorithm and
 192 +         enabling this option will generate a smaller kernel there. Hopefully
 193 +         this algorithm is so good that allowing gcc 4.x and above to make the
 194 +         decision will become the default in the future. Until then this option
 195 +         is there to test gcc for this.
 196 +
 197 +         If unsure, say N.
 198 +
 199  config DEBUG_SECTION_MISMATCH
 200         bool "Enable full Section mismatch analysis"
 201         help
 202 --- a/arch/x86/Kconfig
 203 +++ b/arch/x86/Kconfig
 204 @@ -306,9 +306,6 @@ config ZONE_DMA32
 205  config AUDIT_ARCH
 206         def_bool y if X86_64
 207
 208 -config ARCH_SUPPORTS_OPTIMIZED_INLINING
 209 -       def_bool y
 210 -
 211  config ARCH_SUPPORTS_DEBUG_PAGEALLOC
 212         def_bool y
 213
 214 --- a/include/linux/compiler_types.h
 215 +++ b/include/linux/compiler_types.h
 216 @@ -268,8 +268,7 @@ struct ftrace_likely_data {
 217   * of extern inline functions at link time.
 218   * A lot of inline functions can cause havoc with function tracing.
 219   */
 220 -#if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \
 221 -       !defined(CONFIG_OPTIMIZE_INLINING)
 222 +#if !defined(CONFIG_OPTIMIZE_INLINING)
 223  #define inline \
 224         inline __attribute__((always_inline, unused)) notrace __gnu_inline
 225  #else