target/linux/imx6/patches-3.10/200-imx6_pcie.patch

   1 --- a/arch/arm/boot/dts/imx6q.dtsi
   2 +++ b/arch/arm/boot/dts/imx6q.dtsi
   3 @@ -382,6 +382,15 @@
   4                         };
   5                 };
   6
   7 +               pcie: pcie@01ffc000 {
   8 +                       #crtc-cells = <1>;
   9 +                       compatible = "fsl,imx6q-pcie", "fsl,pcie";
  10 +                       reg = <0x01ffc000 0x4000>;
  11 +                       clocks = <&clks 144>, <&clks 189>;
  12 +                       clock-names = "pcie_axi", "pcie_ref_125m";
  13 +                       status = "disabled";
  14 +               };
  15 +
  16                 ipu2: ipu@02800000 {
  17                         #crtc-cells = <1>;
  18                         compatible = "fsl,imx6q-ipu";
  19 --- a/arch/arm/mach-imx/Kconfig
  20 +++ b/arch/arm/mach-imx/Kconfig
  21 @@ -790,6 +790,8 @@ config SOC_IMX6Q
  22         bool "i.MX6 Quad/DualLite support"
  23         select ARCH_HAS_CPUFREQ
  24         select ARCH_HAS_OPP
  25 +       select ARCH_HAS_IMX_PCIE
  26 +       select ARCH_SUPPORTS_MSI
  27         select ARM_CPU_SUSPEND if PM
  28         select ARM_ERRATA_754322
  29         select ARM_ERRATA_764369 if SMP
  30 @@ -816,6 +818,10 @@ config SOC_IMX6Q
  31         help
  32           This enables support for Freescale i.MX6 Quad processor.
  33
  34 +config IMX_PCIE
  35 +       bool "PCI Express support"
  36 +       select PCI
  37 +
  38  endif
  39
  40  source "arch/arm/mach-imx/devices/Kconfig"
  41 --- a/arch/arm/mach-imx/Makefile
  42 +++ b/arch/arm/mach-imx/Makefile
  43 @@ -98,6 +98,8 @@ AFLAGS_headsmp.o :=-Wa,-march=armv7-a
  44  obj-$(CONFIG_SMP) += headsmp.o platsmp.o
  45  obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
  46  obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
  47 +obj-$(CONFIG_IMX_PCIE) += pcie.o
  48 +obj-$(CONFIG_PCI_MSI) += msi.o
  49
  50  ifeq ($(CONFIG_PM),y)
  51  obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
  52 --- a/arch/arm/mach-imx/clk-imx6q.c
  53 +++ b/arch/arm/mach-imx/clk-imx6q.c
  54 @@ -547,6 +547,12 @@ int __init mx6q_clocks_init(void)
  55         clk_register_clkdev(clk[ahb], "ahb", NULL);
  56         clk_register_clkdev(clk[cko1], "cko1", NULL);
  57         clk_register_clkdev(clk[arm], NULL, "cpu0");
  58 +       clk_register_clkdev(clk[pcie_axi_sel], "pcie_axi_sel", NULL);
  59 +       clk_register_clkdev(clk[axi], "axi", NULL);
  60 +       clk_register_clkdev(clk[pll6_enet], "pll6_enet", NULL);
  61 +       clk_register_clkdev(clk[pcie_ref], "pcie_ref", NULL);
  62 +       clk_register_clkdev(clk[pcie_ref_125m], "pcie_ref_125m", NULL);
  63 +       clk_register_clkdev(clk[pcie_axi], "pcie_axi", NULL);
  64
  65         if (imx6q_revision() != IMX_CHIP_REVISION_1_0) {
  66                 clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]);
  67 --- a/arch/arm/mach-imx/mxc.h
  68 +++ b/arch/arm/mach-imx/mxc.h
  69 @@ -151,6 +151,10 @@ extern unsigned int __mxc_cpu_type;
  70  # define cpu_is_mx53()         (0)
  71  #endif
  72
  73 +#ifdef CONFIG_SOC_IMX6Q
  74 +#  define mxc_cpu_type __mxc_cpu_type
  75 +#endif
  76 +
  77  #ifndef __ASSEMBLY__
  78  static inline bool cpu_is_imx6dl(void)
  79  {
  80 --- a/arch/arm/include/asm/io.h
  81 +++ b/arch/arm/include/asm/io.h
  82 @@ -178,6 +178,9 @@ extern int pci_ioremap_io(unsigned int o
  83   */
  84  #ifdef CONFIG_NEED_MACH_IO_H
  85  #include <mach/io.h>
  86 +#elif defined(CONFIG_SOC_IMX6Q) && defined(CONFIG_IMX_PCIE)
  87 +#define IO_SPACE_LIMIT    ((resource_size_t)0xffffffff)
  88 +#define __io(a)     __typesafe_io((a) & IO_SPACE_LIMIT)
  89  #elif defined(CONFIG_PCI)
  90  #define IO_SPACE_LIMIT ((resource_size_t)0xfffff)
  91  #define __io(a)                __typesafe_io(PCI_IO_VIRT_BASE + ((a) & IO_SPACE_LIMIT))