9c1ef4f020e73069c9f94d333ee60a36d85c7550
[openwrt/staging/wigyori.git] / target / linux / ipq40xx / files-4.14 / arch / arm / boot / dts / qcom-ipq4029-mr33.dts
1 /*
2 * Device Tree Source for Meraki MR33 (Stinkbug)
3 *
4 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
5 * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
6 *
7 * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 */
13
14 #include "qcom-ipq4019.dtsi"
15 #include "qcom-ipq4019-bus.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/soc/qcom,tcsr.h>
19
20 / {
21 model = "Meraki MR33 Access Point";
22 compatible = "meraki,mr33", "qcom,ipq4019";
23
24 aliases {
25 led-boot = &status_green;
26 led-failsafe = &status_red;
27 led-running = &status_green;
28 led-upgrade = &power_orange;
29 };
30
31 /* Do we really need this defined? */
32 memory {
33 device_type = "memory";
34 reg = <0x80000000 0x10000000>;
35 };
36
37 reserved-memory {
38 #address-cells = <0x1>;
39 #size-cells = <0x1>;
40 ranges;
41
42 tz_apps@87b80000 {
43 reg = <0x87b80000 0x280000>;
44 reusable;
45 };
46
47 smem@87e00000 {
48 reg = <0x87e00000 0x080000>;
49 no-map;
50 };
51
52 tz@87e80000 {
53 reg = <0x87e80000 0x180000>;
54 no-map;
55 };
56 };
57
58 soc {
59 mdio@90000 {
60 status = "okay";
61 pinctrl-0 = <&mdio_pins>;
62 pinctrl-names = "default";
63 phy-reset-gpio = <&tlmm 47 0>;
64 /delete-node/ ethernet-phy@0;
65 /delete-node/ ethernet-phy@2;
66 /delete-node/ ethernet-phy@3;
67 /delete-node/ ethernet-phy@4;
68 };
69
70 /* It is a 56-bit counter that supplies the count to the ARM arch
71 timers and without upstream driver */
72 counter@4a1000 {
73 compatible = "qcom,qca-gcnt";
74 reg = <0x4a1000 0x4>;
75 };
76
77 ess_tcsr@1953000 {
78 compatible = "qcom,tcsr";
79 reg = <0x1953000 0x1000>;
80 qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
81 };
82
83 tcsr@1949000 {
84 compatible = "qcom,tcsr";
85 reg = <0x1949000 0x100>;
86 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
87 };
88
89 tcsr@1957000 {
90 compatible = "qcom,tcsr";
91 reg = <0x1957000 0x100>;
92 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
93 };
94
95 serial@78af000 {
96 pinctrl-0 = <&serial_0_pins>;
97 pinctrl-names = "default";
98 status = "okay";
99 };
100
101 serial@78b0000 {
102 pinctrl-0 = <&serial_1_pins>;
103 pinctrl-names = "default";
104 status = "okay";
105
106 bluetooth {
107 compatible = "ti,cc2650";
108 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
109 };
110 };
111
112 crypto@8e3a000 {
113 status = "okay";
114 };
115
116 watchdog@b017000 {
117 status = "okay";
118 };
119
120 ess-switch@c000000 {
121 switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
122 switch_lan_bmp = <0x0>; /* lan port bitmap */
123 switch_wan_bmp = <0x10>; /* wan port bitmap */
124 };
125
126 edma@c080000 {
127 qcom,single-phy;
128 qcom,num_gmac = <1>;
129 phy-mode = "rgmii-rxid";
130 status = "okay";
131 };
132 };
133
134 gpio-keys {
135 compatible = "gpio-keys";
136
137 reset {
138 label = "reset";
139 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
140 linux,code = <KEY_RESTART>;
141 };
142 };
143
144 gpio-leds {
145 compatible = "gpio-leds";
146
147 power_orange: power {
148 label = "mr33:orange:power";
149 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
150 panic-indicator;
151 };
152 };
153 };
154
155 &blsp_dma {
156 status = "okay";
157 };
158
159 &cryptobam {
160 status = "okay";
161 };
162
163 &gmac0 {
164 qcom,phy_mdio_addr = <1>;
165 qcom,poll_required = <1>;
166 vlan_tag = <0 0x20>;
167 };
168
169 &i2c_0 {
170 pinctrl-0 = <&i2c_0_pins>;
171 pinctrl-names = "default";
172 status = "okay";
173 at24@50 {
174 compatible = "atmel,24c64";
175 pagesize = <32>;
176 reg = <0x50>;
177 read-only; /* This holds our MAC & Meraki board-data */
178 };
179 };
180
181 &i2c_1 {
182 pinctrl-0 = <&i2c_1_pins>;
183 pinctrl-names = "default";
184 status = "okay";
185
186 lp5562@30 {
187 enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
188 compatible = "ti,lp5562";
189 clock-mode = /bits/8 <2>;
190 reg = <0x30>;
191
192 /* RGB led */
193 status_red: chan0 {
194 chan-name = "mr33:red:status";
195 led-cur = /bits/ 8 <0x20>;
196 max-cur = /bits/ 8 <0x60>;
197 };
198
199 status_green: chan1 {
200 chan-name = "mr33:green:status";
201 led-cur = /bits/ 8 <0x20>;
202 max-cur = /bits/ 8 <0x60>;
203 };
204
205 chan2 {
206 chan-name = "mr33:blue:status";
207 led-cur = /bits/ 8 <0x20>;
208 max-cur = /bits/ 8 <0x60>;
209 };
210
211 chan3 {
212 chan-name = "mr33:white:status";
213 led-cur = /bits/ 8 <0x20>;
214 max-cur = /bits/ 8 <0x60>;
215 };
216 };
217 };
218
219 &nand {
220 pinctrl-0 = <&nand_pins>;
221 pinctrl-names = "default";
222 status = "okay";
223
224 nand@0 {
225 partitions {
226 compatible = "fixed-partitions";
227 #address-cells = <1>;
228 #size-cells = <1>;
229
230 partition@0 {
231 label = "sbl1";
232 reg = <0x000000000000 0x000000100000>;
233 read-only;
234 };
235 partition@1 {
236 label = "mibib";
237 reg = <0x000000100000 0x000000100000>;
238 read-only;
239 };
240 partition@2 {
241 label = "bootconfig";
242 reg = <0x000000200000 0x000000100000>;
243 read-only;
244 };
245 partition@3 {
246 label = "qsee";
247 reg = <0x000000300000 0x000000100000>;
248 read-only;
249 };
250 partition@4 {
251 label = "qsee_alt";
252 reg = <0x000000400000 0x000000100000>;
253 read-only;
254 };
255 partition@5 {
256 label = "cdt";
257 reg = <0x000000500000 0x000000080000>;
258 read-only;
259 };
260 partition@6 {
261 label = "cdt_alt";
262 reg = <0x000000580000 0x000000080000>;
263 read-only;
264 };
265 partition@7 {
266 label = "ddrparams";
267 reg = <0x000000600000 0x000000080000>;
268 read-only;
269 };
270 partition@8 {
271 label = "u-boot";
272 reg = <0x000000700000 0x000000200000>;
273 read-only;
274 };
275 partition@9 {
276 label = "u-boot-backup";
277 reg = <0x000000900000 0x000000200000>;
278 read-only;
279 };
280 partition@10 {
281 label = "ART";
282 reg = <0x000000b00000 0x000000080000>;
283 read-only;
284 };
285 partition@11 {
286 label = "ubi";
287 reg = <0x000000c00000 0x000007000000>;
288 };
289 };
290 };
291 };
292
293 &pcie0 {
294 status = "okay";
295 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
296 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
297 };
298
299 &qpic_bam {
300 status = "okay";
301 };
302
303 &tlmm {
304 /*
305 * GPIO43 should be 0/1 whenever the unit is
306 * powered through PoE or AC-Adapter.
307 * That said, playing with this seems to
308 * reset the AP.
309 */
310
311 mdio_pins: mdio_pinmux {
312 mux_1 {
313 pins = "gpio6";
314 function = "mdio";
315 bias-pull-up;
316 };
317 mux_2 {
318 pins = "gpio7";
319 function = "mdc";
320 bias-pull-up;
321 };
322 };
323
324 serial_0_pins: serial_pinmux {
325 mux {
326 pins = "gpio16", "gpio17";
327 function = "blsp_uart0";
328 bias-disable;
329 };
330 };
331
332 serial_1_pins: serial1_pinmux {
333 mux {
334 /* We use the i2c-0 pins for serial_1 */
335 pins = "gpio8", "gpio9";
336 function = "blsp_uart1";
337 bias-disable;
338 };
339 };
340
341 i2c_0_pins: i2c_0_pinmux {
342 pinmux {
343 function = "blsp_i2c0";
344 pins = "gpio20", "gpio21";
345 };
346 pinconf {
347 pins = "gpio20", "gpio21";
348 drive-strength = <16>;
349 bias-disable;
350 };
351 };
352
353 i2c_1_pins: i2c_1_pinmux {
354 pinmux {
355 function = "blsp_i2c1";
356 pins = "gpio34", "gpio35";
357 };
358 pinconf {
359 pins = "gpio34", "gpio35";
360 drive-strength = <16>;
361 bias-disable;
362 };
363 };
364
365 nand_pins: nand_pins {
366 /*
367 * There are 18 pins. 15 pins are common between LCD and NAND.
368 * The QPIC controller arbitrates between LCD and NAND. Of the
369 * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
370 *
371 * The meraki source hints that the bluetooth module claims
372 * pin 52 as well. But sadly, there's no data whenever this
373 * is a NAND or LCD exclusive pin or not.
374 */
375
376 pullups {
377 pins = "gpio52", "gpio53", "gpio58",
378 "gpio59";
379 function = "qpic";
380 bias-pull-up;
381 };
382
383 pulldowns {
384 pins = "gpio54", "gpio55", "gpio56",
385 "gpio57", "gpio60", "gpio61",
386 "gpio62", "gpio63", "gpio64",
387 "gpio65", "gpio66", "gpio67",
388 "gpio68", "gpio69";
389 function = "qpic";
390 bias-pull-down;
391 };
392 };
393 };
394
395 &wifi0 {
396 status = "okay";
397 /* qcom,ath10k-calibration-variant = "MERAKI-MR33"; */
398 };
399
400 &wifi1 {
401 status = "okay";
402 /* qcom,ath10k-calibration-variant = "MERAKI-MR33"; */
403 };