target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch

   1 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
   2 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
   3 @@ -20,9 +20,9 @@
   4                 #address-cells = <1>;
   5                 #size-cells = <0>;
   6
   7 -               cpu@0 {
   8 +               cpu0: cpu@0 {
   9                         compatible = "qcom,krait";
  10                         enable-method = "qcom,kpss-acc-v1";
  11                         device_type = "cpu";
  12                         reg = <1>;
  13                         next-level-cache = <&L2>;
  14 @@ -30,9 +30,9 @@
  15                         qcom,saw = <&saw0>;
  16                 };
  17
  18 -               cpu@1 {
  19 +               cpu1: cpu@1 {
  20                         compatible = "qcom,krait";
  21                         enable-method = "qcom,kpss-acc-v1";
  22                         device_type = "cpu";
  23                         reg = <1>;
  24                         next-level-cache = <&L2>;
  25 @@ -67,7 +67,7 @@
  26                         no-map;
  27                 };
  28
  29 -               smem@41000000 {
  30 +               smem: smem@41000000 {
  31                         reg = <0x41000000 0x200000>;
  32                         no-map;
  33                 };
  34 @@ -128,6 +128,7 @@
  35                         gpio-ranges = <&qcom_pinmux 0 0 69>;
  36                         #gpio-cells = <2>;
  37                         interrupt-controller;
  38 +                       #address-cells = <0>;
  39                         #interrupt-cells = <2>;
  40                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
  41
  42 @@ -155,6 +155,7 @@
  43                                         function = "pcie3_rst";
  44                                         drive-strength = <12>;
  45                                         bias-disable;
  46 +                                       output-low;
  47                                 };
  48                         };
  49
  50 @@ -190,6 +190,7 @@
  51                 intc: interrupt-controller@2000000 {
  52                         compatible = "qcom,msm-qgic2";
  53                         interrupt-controller;
  54 +                       #address-cells = <0>;
  55                         #interrupt-cells = <3>;
  56                         reg = <0x02000000 0x1000>,
  57                               <0x02002000 0x1000>;
  58 @@ -219,21 +220,23 @@
  59                 acc0: clock-controller@2088000 {
  60                         compatible = "qcom,kpss-acc-v1";
  61                         reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
  62 +                       clock-output-names = "acpu0_aux";
  63                 };
  64
  65                 acc1: clock-controller@2098000 {
  66                         compatible = "qcom,kpss-acc-v1";
  67                         reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
  68 +                       clock-output-names = "acpu1_aux";
  69                 };
  70
  71                 saw0: regulator@2089000 {
  72 -                       compatible = "qcom,saw2";
  73 +                       compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
  74                         reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
  75                         regulator;
  76                 };
  77
  78                 saw1: regulator@2099000 {
  79 -                       compatible = "qcom,saw2";
  80 +                       compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
  81                         reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
  82                         regulator;
  83                 };
  84 @@ -251,7 +254,7 @@
  85
  86                         syscon-tcsr = <&tcsr>;
  87
  88 -                       serial@12490000 {
  89 +                       gsbi2_serial: serial@12490000 {
  90                                 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
  91                                 reg = <0x12490000 0x1000>,
  92                                       <0x12480000 0x1000>;
  93 @@ -326,7 +329,7 @@
  94
  95                         syscon-tcsr = <&tcsr>;
  96
  97 -                       serial@1a240000 {
  98 +                       gsbi5_serial: serial@1a240000 {
  99                                 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
 100                                 reg = <0x1a240000 0x1000>,
 101                                       <0x1a200000 0x1000>;
 102 @@ -397,7 +400,7 @@
 103                         status = "disabled";
 104                 };
 105
 106 -               sata@29000000 {
 107 +               sata: sata@29000000 {
 108                         compatible = "qcom,ipq806x-ahci", "generic-ahci";
 109                         reg = <0x29000000 0x180>;
 110
 111 @@ -430,6 +430,16 @@ qfprom: qfprom@700000 {
 112                         reg = <0x00700000 0x1000>;
 113                         #address-cells = <1>;
 114                         #size-cells = <1>;
 115 +
 116 +                       tsens_calib: calib@400 {
 117 +                               reg = <0x400 0xb>;
 118 +                       };
 119 +                       tsens_backup: backup@410 {
 120 +                               reg = <0x410 0xb>;
 121 +                       };
 122 +                       speedbin_efuse: speedbin@0c0 {
 123 +                               reg = <0x0c0 0x4>;
 124 +                       };
 125                 };
 126
 127                 gcc: clock-controller@900000 {
 128 @@ -437,9 +447,21 @@ gcc: clock-controller@900000 {
 129
 130                 gcc: clock-controller@900000 {
 131 -                       compatible = "qcom,gcc-ipq8064";
 132 +                       compatible = "qcom,gcc-ipq8064", "syscon";
 133                         reg = <0x00900000 0x4000>;
 134                         #clock-cells = <1>;
 135                         #reset-cells = <1>;
 136 +                       #power-domain-cells = <1>;
 137 +
 138 +                       tsens: thermal-sensor@900000 {
 139 +                               compatible = "qcom,ipq8064-tsens";
 140 +
 141 +                               nvmem-cells = <&tsens_calib>, <&tsens_backup>;
 142 +                               nvmem-cell-names = "calib", "calib_backup";
 143 +                               interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
 144 +                               interrupt-names = "uplow";
 145 +                               #thermal-sensor-cells = <1>;
 146 +                               #qcom,sensors = <11>;
 147 +                       };
 148                 };
 149
 150                 tcsr: syscon@1a400000 {
 151 @@ -625,13 +629,13 @@
 152                         qcom,ee = <0>;
 153                 };
 154
 155 -               amba {
 156 -                       compatible = "simple-bus";
 157 +               amba: amba {
 158 +                       compatible = "arm,amba-bus";
 159                         #address-cells = <1>;
 160                         #size-cells = <1>;
 161                         ranges;
 162
 163 -                       sdcc@12400000 {
 164 +                       sdcc1: sdcc@12400000 {
 165                                 status          = "disabled";
 166                                 compatible      = "arm,pl18x", "arm,primecell";
 167                                 arm,primecell-periphid = <0x00051180>;
 168 @@ -645,13 +649,12 @@
 169                                 non-removable;
 170                                 cap-sd-highspeed;
 171                                 cap-mmc-highspeed;
 172 -                               mmc-ddr-1_8v;
 173                                 vmmc-supply = <&vsdcc_fixed>;
 174                                 dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
 175                                 dma-names = "tx", "rx";
 176                         };
 177
 178 -                       sdcc@12180000 {
 179 +                       sdcc3: sdcc@12180000 {
 180                                 compatible      = "arm,pl18x", "arm,primecell";
 181                                 arm,primecell-periphid = <0x00051180>;
 182                                 status          = "disabled";