target/linux/ipq806x/patches-5.4/100-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch

   1 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
   2 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
   3 @@ -64,6 +64,17 @@
   4  #define NSS_COMMON_CLK_DIV_SGMII_100           4
   5  #define NSS_COMMON_CLK_DIV_SGMII_10            49
   6
   7 +#define QSGMII_PCS_ALL_CH_CTL                  0x80
   8 +#define QSGMII_PCS_CH_SPEED_FORCE              0x2
   9 +#define QSGMII_PCS_CH_SPEED_10                 0x0
  10 +#define QSGMII_PCS_CH_SPEED_100                        0x4
  11 +#define QSGMII_PCS_CH_SPEED_1000               0x8
  12 +#define QSGMII_PCS_CH_SPEED_MASK               (QSGMII_PCS_CH_SPEED_FORCE | \
  13 +                                                QSGMII_PCS_CH_SPEED_10 | \
  14 +                                                QSGMII_PCS_CH_SPEED_100 | \
  15 +                                                QSGMII_PCS_CH_SPEED_1000)
  16 +#define QSGMII_PCS_CH_SPEED_SHIFT(x)           (x * 4)
  17 +
  18  #define QSGMII_PCS_CAL_LCKDT_CTL               0x120
  19  #define QSGMII_PCS_CAL_LCKDT_CTL_RST           BIT(19)
  20
  21 @@ -345,6 +356,12 @@ static int ipq806x_gmac_probe(struct pla
  22                              0x1ul << QSGMII_PHY_RX_INPUT_EQU_OFFSET |
  23                              0x2ul << QSGMII_PHY_CDR_PI_SLEW_OFFSET |
  24                              0xCul << QSGMII_PHY_TX_DRV_AMP_OFFSET);
  25 +
  26 +               regmap_update_bits(gmac->qsgmii_csr,
  27 +                                  QSGMII_PCS_ALL_CH_CTL,
  28 +                                  QSGMII_PCS_CH_SPEED_MASK <<
  29 +                                   QSGMII_PCS_CH_SPEED_SHIFT(gmac->id),
  30 +                                  0);
  31         }
  32
  33         plat_dat->has_gmac = true;