target/linux/ipq806x/patches/0007-ARM-qcom-Rename-various-msm-prefixed-functions-to-qc.patch

   1 From 35eb6f73546d3b9475652a38fa641bd1a05a1ea1 Mon Sep 17 00:00:00 2001
   2 From: Kumar Gala <galak@codeaurora.org>
   3 Date: Tue, 4 Feb 2014 15:38:45 -0600
   4 Subject: [PATCH 007/182] ARM: qcom: Rename various msm prefixed functions to
   5  qcom
   6
   7 As mach-qcom will support a number of different Qualcomm SoC platforms
   8 we replace the msm prefix on function names with qcom to be a bit more
   9 generic.
  10
  11 Signed-off-by: Kumar Gala <galak@codeaurora.org>
  12 ---
  13  arch/arm/mach-qcom/board.c   |    4 ++--
  14  arch/arm/mach-qcom/platsmp.c |   22 +++++++++++-----------
  15  2 files changed, 13 insertions(+), 13 deletions(-)
  16
  17 --- a/arch/arm/mach-qcom/board.c
  18 +++ b/arch/arm/mach-qcom/board.c
  19 @@ -17,7 +17,7 @@
  20  #include <asm/mach/arch.h>
  21  #include <asm/mach/map.h>
  22
  23 -extern struct smp_operations msm_smp_ops;
  24 +extern struct smp_operations qcom_smp_ops;
  25
  26  static const char * const qcom_dt_match[] __initconst = {
  27         "qcom,msm8660-surf",
  28 @@ -31,7 +31,7 @@ static const char * const apq8074_dt_mat
  29  };
  30
  31  DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)")
  32 -       .smp = smp_ops(msm_smp_ops),
  33 +       .smp = smp_ops(qcom_smp_ops),
  34         .dt_compat = qcom_dt_match,
  35  MACHINE_END
  36
  37 --- a/arch/arm/mach-qcom/platsmp.c
  38 +++ b/arch/arm/mach-qcom/platsmp.c
  39 @@ -30,7 +30,7 @@ extern void secondary_startup(void);
  40  static DEFINE_SPINLOCK(boot_lock);
  41
  42  #ifdef CONFIG_HOTPLUG_CPU
  43 -static void __ref msm_cpu_die(unsigned int cpu)
  44 +static void __ref qcom_cpu_die(unsigned int cpu)
  45  {
  46         wfi();
  47  }
  48 @@ -42,7 +42,7 @@ static inline int get_core_count(void)
  49         return ((read_cpuid_id() >> 4) & 3) + 1;
  50  }
  51
  52 -static void msm_secondary_init(unsigned int cpu)
  53 +static void qcom_secondary_init(unsigned int cpu)
  54  {
  55         /*
  56          * Synchronise with the boot thread.
  57 @@ -70,7 +70,7 @@ static void prepare_cold_cpu(unsigned in
  58                                   "address\n");
  59  }
  60
  61 -static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
  62 +static int qcom_boot_secondary(unsigned int cpu, struct task_struct *idle)
  63  {
  64         static int cold_boot_done;
  65
  66 @@ -108,7 +108,7 @@ static int msm_boot_secondary(unsigned i
  67   * does not support the ARM SCU, so just set the possible cpu mask to
  68   * NR_CPUS.
  69   */
  70 -static void __init msm_smp_init_cpus(void)
  71 +static void __init qcom_smp_init_cpus(void)
  72  {
  73         unsigned int i, ncores = get_core_count();
  74
  75 @@ -122,16 +122,16 @@ static void __init msm_smp_init_cpus(voi
  76                 set_cpu_possible(i, true);
  77  }
  78
  79 -static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
  80 +static void __init qcom_smp_prepare_cpus(unsigned int max_cpus)
  81  {
  82  }
  83
  84 -struct smp_operations msm_smp_ops __initdata = {
  85 -       .smp_init_cpus          = msm_smp_init_cpus,
  86 -       .smp_prepare_cpus       = msm_smp_prepare_cpus,
  87 -       .smp_secondary_init     = msm_secondary_init,
  88 -       .smp_boot_secondary     = msm_boot_secondary,
  89 +struct smp_operations qcom_smp_ops __initdata = {
  90 +       .smp_init_cpus          = qcom_smp_init_cpus,
  91 +       .smp_prepare_cpus       = qcom_smp_prepare_cpus,
  92 +       .smp_secondary_init     = qcom_secondary_init,
  93 +       .smp_boot_secondary     = qcom_boot_secondary,
  94  #ifdef CONFIG_HOTPLUG_CPU
  95 -       .cpu_die                = msm_cpu_die,
  96 +       .cpu_die                = qcom_cpu_die,
  97  #endif
  98  };