lantiq: add Linux 5.4 support as testing kernel version
[openwrt/staging/wigyori.git] / target / linux / lantiq / files-5.4 / arch / mips / boot / dts / lantiq / ar9.dtsi
1 #include <dt-bindings/gpio/gpio.h>
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "lantiq,xway", "lantiq,ar9";
7
8 aliases {
9 serial0 = &asc1;
10 };
11
12 chosen {
13 stdout-path = "serial0:115200n8";
14 };
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 cpu@0 {
21 compatible = "mips,mips34K";
22 reg = <0>;
23 };
24 };
25
26 reboot {
27 compatible = "syscon-reboot";
28
29 regmap = <&rcu0>;
30 offset = <0x10>;
31 mask = <0x40000000>;
32 };
33
34 biu@1f800000 {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 compatible = "lantiq,biu", "simple-bus";
38 reg = <0x1f800000 0x800000>;
39 ranges = <0x0 0x1f800000 0x7fffff>;
40
41 icu0: icu@80200 {
42 #interrupt-cells = <1>;
43 interrupt-controller;
44 compatible = "lantiq,icu";
45 /* TODO: AR9 should have ICU1 (like VR9) too */
46 reg = <0x80200 0xc8>;
47 };
48
49 watchdog@803f0 {
50 compatible = "lantiq,xrx100-wdt", "lantiq,xrx100-wdt";
51 reg = <0x803f0 0x10>;
52
53 regmap = <&rcu0>;
54 };
55 };
56
57 sram@1f000000 {
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "lantiq,sram", "simple-bus";
61 reg = <0x1f000000 0x800000>;
62 ranges = <0x0 0x1f000000 0x7fffff>;
63
64 eiu0: eiu@101000 {
65 #interrupt-cells = <1>;
66 interrupt-controller;
67 compatible = "lantiq,eiu-xway";
68 reg = <0x101000 0x1000>;
69 interrupt-parent = <&icu0>;
70 lantiq,eiu-irqs = <166 135 66 40 41 42>;
71 };
72
73 pmu0: pmu@102000 {
74 compatible = "lantiq,pmu-xway";
75 reg = <0x102000 0x1000>;
76 };
77
78 cgu0: cgu@103000 {
79 compatible = "lantiq,cgu-xway";
80 reg = <0x103000 0x1000>;
81 #clock-cells = <1>;
82 };
83
84 rcu0: rcu@203000 {
85 #address-cells = <1>;
86 #size-cells = <1>;
87 compatible = "lantiq,xrx100-rcu", "simple-mfd", "syscon";
88 reg = <0x203000 0x1000>;
89 ranges = <0x0 0x203000 0x100>;
90 big-endian;
91
92 reset: reset-controller@10 {
93 compatible = "lantiq,xrx100-reset", "lantiq,danube-reset";
94 reg = <0x10 4>, <0x14 4>;
95
96 #reset-cells = <2>;
97 };
98
99 usb_phy0: usb2-phy@18 {
100 compatible = "lantiq,xrx100-usb2-phy";
101 reg = <0x18 4>;
102 status = "disabled";
103
104 resets = <&reset 4 4>;
105 reset-names = "ctrl";
106 #phy-cells = <0>;
107 };
108
109 usb_phy1: usb2-phy@34 {
110 compatible = "lantiq,xrx100-usb2-phy";
111 reg = <0x34 4>;
112 status = "disabled";
113
114 resets = <&reset 28 28>;
115 reset-names = "ctrl";
116 #phy-cells = <0>;
117 };
118 };
119 };
120
121 fpi@10000000 {
122 #address-cells = <1>;
123 #size-cells = <1>;
124 compatible = "lantiq,fpi", "simple-bus";
125 ranges = <0x0 0x10000000 0xeefffff>;
126 reg = <0x10000000 0xef00000>;
127
128 localbus: localbus@0 {
129 #address-cells = <2>;
130 #size-cells = <1>;
131 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
132 1 0 0x4000000 0x4000010>; /* addsel1 */
133 compatible = "lantiq,localbus", "simple-bus";
134 };
135
136 gptu@e100a00 {
137 compatible = "lantiq,gptu-xway";
138 reg = <0xe100a00 0x100>;
139 interrupt-parent = <&icu0>;
140 interrupts = <126 127 128 129 130 131>;
141 };
142
143 asc0: serial@e100400 {
144 compatible = "lantiq,asc";
145 reg = <0xe100400 0x400>;
146 interrupt-parent = <&icu0>;
147 interrupts = <104 105 106>;
148 status = "disabled";
149 };
150
151 spi: spi@e100800 {
152 compatible = "lantiq,xrx100-spi";
153 reg = <0xe100800 0x100>;
154 interrupt-parent = <&icu0>;
155 interrupts = <22 23 24>;
156 interrupt-names = "spi_rx", "spi_tx", "spi_err",
157 "spi_frm";
158 #address-cells = <1>;
159 #size-cells = <0>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&spi_pins>, <&spi_cs4_pins>;
162 status = "disabled";
163 };
164
165 gpio: pinmux@e100b10 {
166 compatible = "lantiq,xrx100-pinctrl";
167 #gpio-cells = <2>;
168 gpio-controller;
169 reg = <0xe100b10 0xa0>;
170
171 mdio_pins: mdio {
172 mux {
173 lantiq,groups = "mdio";
174 lantiq,function = "mdio";
175 };
176 };
177
178 nand_pins: nand {
179 mux-0 {
180 lantiq,groups = "nand cle", "nand ale",
181 "nand rd";
182 lantiq,function = "ebu";
183 lantiq,output = <1>;
184 lantiq,open-drain = <0>;
185 lantiq,pull = <0>;
186 };
187 mux-1 {
188 lantiq,groups = "nand rdy";
189 lantiq,function = "ebu";
190 lantiq,output = <0>;
191 lantiq,pull = <2>;
192 };
193 };
194
195 nand_cs1_pins: nand-cs1 {
196 mux {
197 lantiq,groups = "nand cs1";
198 lantiq,function = "ebu";
199 lantiq,open-drain = <0>;
200 lantiq,pull = <0>;
201 };
202 };
203
204 pci_gnt1_pins: pci-gnt1 {
205 mux {
206 lantiq,groups = "gnt1";
207 lantiq,function = "pci";
208 lantiq,output = <1>;
209 lantiq,open-drain = <0>;
210 lantiq,pull = <0>;
211 };
212 };
213
214 pci_gnt2_pins: pci-gnt2 {
215 mux {
216 lantiq,groups = "gnt2";
217 lantiq,function = "pci";
218 lantiq,output = <1>;
219 lantiq,open-drain = <0>;
220 lantiq,pull = <0>;
221 };
222 };
223
224 pci_gnt3_pins: pci-gnt3 {
225 mux {
226 lantiq,groups = "gnt3";
227 lantiq,function = "pci";
228 lantiq,output = <1>;
229 lantiq,open-drain = <0>;
230 lantiq,pull = <0>;
231 };
232 };
233
234 pci_gnt4_pins: pci-gnt4 {
235 mux {
236 lantiq,groups = "gnt4";
237 lantiq,function = "pci";
238 lantiq,output = <1>;
239 lantiq,open-drain = <0>;
240 lantiq,pull = <0>;
241 };
242 };
243
244 pci_req1_pins: pci-req1 {
245 mux {
246 lantiq,groups = "req1";
247 lantiq,function = "pci";
248 lantiq,output = <0>;
249 lantiq,open-drain = <1>;
250 lantiq,pull = <2>;
251 };
252 };
253
254 pci_req2_pins: pci-req2 {
255 mux {
256 lantiq,groups = "req2";
257 lantiq,function = "pci";
258 lantiq,output = <0>;
259 lantiq,open-drain = <1>;
260 lantiq,pull = <2>;
261 };
262 };
263
264 pci_req3_pins: pci-req3 {
265 mux {
266 lantiq,groups = "req3";
267 lantiq,function = "pci";
268 lantiq,output = <0>;
269 lantiq,open-drain = <1>;
270 lantiq,pull = <2>;
271 };
272 };
273
274 pci_req4_pins: pci-req4 {
275 mux {
276 lantiq,groups = "req4";
277 lantiq,function = "pci";
278 lantiq,output = <0>;
279 lantiq,open-drain = <1>;
280 lantiq,pull = <2>;
281 };
282 };
283
284 spi_pins: spi {
285 mux-0 {
286 lantiq,groups = "spi_di";
287 lantiq,function = "spi";
288 };
289 mux-1 {
290 lantiq,groups = "spi_do", "spi_clk";
291 lantiq,function = "spi";
292 lantiq,output = <1>;
293 };
294 };
295
296 spi_cs4_pins: spi-cs4 {
297 mux {
298 lantiq,groups = "spi_cs4";
299 lantiq,function = "spi";
300 lantiq,output = <1>;
301 };
302 };
303
304 stp_pins: stp {
305 mux {
306 lantiq,groups = "stp";
307 lantiq,function = "stp";
308 lantiq,pull = <0>;
309 lantiq,open-drain = <0>;
310 lantiq,output = <1>;
311 };
312 };
313 };
314
315 stp: stp@e100bb0 {
316 #gpio-cells = <2>;
317 compatible = "lantiq,gpio-stp-xway";
318 gpio-controller;
319 reg = <0xe100bb0 0x40>;
320
321 pinctrl-0 = <&stp_pins>;
322 pinctrl-names = "default";
323
324 status = "disabled";
325 };
326
327 asc1: serial@e100c00 {
328 compatible = "lantiq,asc";
329 reg = <0xe100c00 0x400>;
330 interrupt-parent = <&icu0>;
331 interrupts = <112 113 114>;
332 };
333
334 usb0: usb@e101000 {
335 compatible = "lantiq,arx100-usb";
336 reg = <0xe101000 0x1000
337 0xe120000 0x3f000>;
338 interrupt-parent = <&icu0>;
339 interrupts = <62 91>;
340 dr_mode = "host";
341 phys = <&usb_phy0>;
342 phy-names = "usb2-phy";
343 status = "disabled";
344 };
345
346 usb1: usb@e106000 {
347 compatible = "lantiq,arx100-usb";
348 reg = <0xe106000 0x1000
349 0xe1e0000 0x3f000>;
350 interrupt-parent = <&icu0>;
351 interrupts = <91>;
352 dr_mode = "host";
353 phys = <&usb_phy1>;
354 phy-names = "usb2-phy";
355 status = "disabled";
356 };
357
358 deu@e103100 {
359 compatible = "lantiq,deu-arx100";
360 reg = <0xe103100 0xf00>;
361 };
362
363 dma0: dma@e104100 {
364 compatible = "lantiq,dma-xway";
365 reg = <0xe104100 0x800>;
366 };
367
368 ebu0: ebu@e105300 {
369 compatible = "lantiq,ebu-xway";
370 reg = <0xe105300 0x100>;
371 };
372
373 mei@e116000 {
374 compatible = "lantiq,mei-xway";
375 reg = <0xe116000 0x9c>;
376 interrupt-parent = <&icu0>;
377 interrupts = <63>;
378 };
379
380 gsw: etop@e180000 {
381 compatible = "lantiq,etop-xway";
382 reg = <0xe180000 0x40000
383 0xe108000 0x200>;
384 interrupt-parent = <&icu0>;
385 interrupts = <73 72>;
386 mac-address = [ 00 11 22 33 44 55 ];
387 pinctrl-0 = <&mdio_pins>;
388 pinctrl-names = "default";
389 };
390
391 ppe@e234000 {
392 compatible = "lantiq,ppe-arx100";
393 reg = <0xe234000 0x3ffd>;
394 interrupt-parent = <&icu0>;
395 interrupts = <96>;
396 };
397
398 pci0: pci@e105400 {
399 status = "disabled";
400 #address-cells = <3>;
401 #size-cells = <2>;
402 #interrupt-cells = <1>;
403 compatible = "lantiq,pci-xway";
404 bus-range = <0x0 0x0>;
405 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
406 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
407 reg = <0x7000000 0x8000 /* config space */
408 0xe105400 0x400>; /* pci bridge */
409 lantiq,bus-clock = <33333333>;
410 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
411 interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
412 req-mask = <0x1>;
413 };
414 };
415
416 adsl {
417 compatible = "lantiq,adsl-arx100";
418 };
419 };