target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "lantiq,falcon";
   5
   6         cpus {
   7                 #address-cells = <1>;
   8                 #size-cells = <0>;
   9
  10                 cpu@0 {
  11                         compatible = "mips,mips34kc";
  12                         reg = <0>;
  13                 };
  14         };
  15
  16         aliases {
  17                 serial0 = &serial0;
  18                 serial1 = &serial1;
  19                 gpio0 = &gpio0;
  20                 gpio1 = &gpio1;
  21                 gpio2 = &gpio2;
  22                 gpio3 = &gpio3;
  23                 gpio4 = &gpio4;
  24         };
  25
  26         chosen {
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         ebu_cs0: localbus@10000000 {
  31                 #address-cells = <1>;
  32                 #size-cells = <1>;
  33                 compatible = "lantiq,localbus", "simple-bus";
  34                 reg = <0x10000000 0x4000000>;
  35                 ranges = <0x0 0x10000000 0x4000000>;
  36         };
  37         ebu_cs1: localbus@14000000 {
  38                 #address-cells = <1>;
  39                 #size-cells = <1>;
  40                 compatible = "lantiq,localbus", "simple-bus";
  41                 reg = <0x14000000 0x4000000>;
  42                 ranges = <0x0 0x14000000 0x4000000>;
  43         };
  44
  45         ebu@18000000 {
  46                 compatible = "lantiq,ebu-falcon";
  47                 reg = <0x18000000 0x100>;
  48         };
  49
  50         sbs2@1d000000 {
  51                 #address-cells = <1>;
  52                 #size-cells = <1>;
  53                 compatible = "lantiq,sysb2", "simple-bus";
  54                 reg = <0x1d000000 0x1000000>;
  55                 ranges = <0x0 0x1d000000 0x1000000>;
  56
  57                 clock_sysgpe: clock-controller@700000 {
  58                         compatible = "lantiq,sysgpe-falcon";
  59                         reg = <0x700000 0x100>;
  60                         #clock-cells = <1>;
  61                 };
  62
  63                 mps@4000 {
  64                         compatible = "lantiq,mps-falcon", "lantiq,mps-xrx100";
  65                         reg = <0x4000 0x1000>;
  66                         interrupt-parent = <&icu0>;
  67                         interrupts = <154 155>;
  68                         lantiq,mbx = <&mpsmbx>;
  69                 };
  70
  71                 gpio0: gpio@810000 {
  72                         compatible = "lantiq,falcon-gpio";
  73                         gpio-controller;
  74                         #gpio-cells = <2>;
  75                         interrupt-controller;
  76                         #interrupt-cells = <2>;
  77                         interrupt-parent = <&icu0>;
  78                         interrupts = <44>;
  79                         reg = <0x810000 0x80>;
  80                         clocks = <&clock_syseth 16>;
  81                 };
  82
  83                 gpio2: gpio@810100 {
  84                         compatible = "lantiq,falcon-gpio";
  85                         gpio-controller;
  86                         #gpio-cells = <2>;
  87                         interrupt-controller;
  88                         #interrupt-cells = <2>;
  89                         interrupt-parent = <&icu0>;
  90                         interrupts = <46>;
  91                         reg = <0x810100 0x80>;
  92                         clocks = <&clock_syseth 17>;
  93                 };
  94
  95                 clock_syseth: clock-controller@b00000 {
  96                         compatible = "lantiq,syseth-falcon";
  97                         reg = <0xb00000 0x100>;
  98                         #clock-cells = <1>;
  99                 };
 100
 101                 pad@b01000 {
 102                         compatible = "lantiq,pad-falcon";
 103                         reg = <0xb01000 0x100>;
 104                         lantiq,bank = <0>;
 105                         clocks = <&clock_syseth 20>;
 106                 };
 107
 108                 pad@b02000 {
 109                         compatible = "lantiq,pad-falcon";
 110                         reg = <0xb02000 0x100>;
 111                         lantiq,bank = <2>;
 112                         clocks = <&clock_syseth 21>;
 113                 };
 114         };
 115
 116         fpi@1e000000 {
 117                 #address-cells = <1>;
 118                 #size-cells = <1>;
 119                 compatible = "lantiq,fpi", "simple-bus";
 120                 reg = <0x1e000000 0x1000000>;
 121                 ranges = <0x0 0x1e000000 0x1000000>;
 122
 123                 serial1: serial@100b00 {
 124                         status = "disabled";
 125                         compatible = "lantiq,asc";
 126                         reg = <0x100b00 0x100>;
 127                         interrupt-parent = <&icu0>;
 128                         interrupts = <112 113 114>;
 129                         line = <1>;
 130                         pinctrl-names = "default";
 131                         pinctrl-0 = <&asc1_pins>;
 132                         clocks = <&clock_sys1 11>;
 133                 };
 134
 135                 serial0: serial@100c00 {
 136                         compatible = "lantiq,asc";
 137                         reg = <0x100c00 0x100>;
 138                         interrupt-parent = <&icu0>;
 139                         interrupts = <104 105 106>;
 140                         line = <0>;
 141                         pinctrl-names = "default";
 142                         pinctrl-0 = <&asc0_pins>;
 143                         clocks = <&clock_sys1 12>;
 144                 };
 145
 146                 spi: spi@100d00 {
 147                         status = "disabled";
 148                         compatible = "lantiq,falcon-spi", "lantiq,xrx100-spi", "lantiq,spi-lantiq-ssc";
 149                         interrupts = <22 23 24 25>;
 150                         interrupt-names = "spi_tx", "spi_rx", "spi_err", "spi_frm";
 151                         #address-cells = <1>;
 152                         #size-cells = <0>;
 153                         reg = <0x100d00 0x100>;
 154                         interrupt-parent = <&icu0>;
 155                         clocks = <&clock_sys1 13>;
 156                         base_cs = <1>;
 157                         num_cs = <2>;
 158                 };
 159
 160                 gptc@100e00 {
 161                         compatible = "lantiq,gptc-falcon";
 162                         reg = <0x100e00 0x100>;
 163                 };
 164
 165                 i2c: i2c@200000 {
 166                         status = "disabled";
 167                         #address-cells = <1>;
 168                         #size-cells = <0>;
 169                         compatible = "lantiq,lantiq-i2c";
 170                         reg = <0x200000 0x10000>;
 171                         interrupt-parent = <&icu0>;
 172                         interrupts = <18 19 20 21>;
 173                         gpios = <&gpio1 7 0 &gpio1 8 0>;
 174                         pinctrl-names = "default";
 175                         pinctrl-0 = <&i2c_pins>;
 176                         clocks = <&clock_sys1 14>;
 177                 };
 178
 179                 gpio1: gpio@800100 {
 180                         compatible = "lantiq,falcon-gpio";
 181                         gpio-controller;
 182                         #gpio-cells = <2>;
 183                         interrupt-controller;
 184                         #interrupt-cells = <2>;
 185                         interrupt-parent = <&icu0>;
 186                         interrupts = <45>;
 187                         reg = <0x800100 0x100>;
 188                         clocks = <&clock_sys1 16>;
 189                 };
 190
 191                 gpio3: gpio@800200 {
 192                         compatible = "lantiq,falcon-gpio";
 193                         gpio-controller;
 194                         #gpio-cells = <2>;
 195                         interrupt-controller;
 196                         #interrupt-cells = <2>;
 197                         interrupt-parent = <&icu0>;
 198                         interrupts = <47>;
 199                         reg = <0x800200 0x100>;
 200                         clocks = <&clock_sys1 17>;
 201                 };
 202
 203                 gpio4: gpio@800300 {
 204                         compatible = "lantiq,falcon-gpio";
 205                         gpio-controller;
 206                         #gpio-cells = <2>;
 207                         interrupt-controller;
 208                         #interrupt-cells = <2>;
 209                         interrupt-parent = <&icu0>;
 210                         interrupts = <48>;
 211                         reg = <0x800300 0x100>;
 212                         clocks = <&clock_sys1 18>;
 213                 };
 214
 215                 pad@800400 {
 216                         compatible = "lantiq,pad-falcon";
 217                         reg = <0x800400 0x100>;
 218                         lantiq,bank = <1>;
 219                         clocks = <&clock_sys1 20>;
 220                 };
 221
 222                 pad@800500 {
 223                         compatible = "lantiq,pad-falcon";
 224                         reg = <0x800500 0x100>;
 225                         lantiq,bank = <3>;
 226                         clocks = <&clock_sys1 21>;
 227                 };
 228
 229                 pad@800600 {
 230                         compatible = "lantiq,pad-falcon";
 231                         reg = <0x800600 0x100>;
 232                         lantiq,bank = <4>;
 233                         clocks = <&clock_sys1 22>;
 234                 };
 235
 236                 status@802000 {
 237                         compatible = "lantiq,status-falcon";
 238                         reg = <0x802000 0x80>;
 239                 };
 240
 241                 clock_sys1: clock-controller@f00000 {
 242                         compatible = "lantiq,sys1-falcon";
 243                         reg = <0xf00000 0x100>;
 244                         #clock-cells = <1>;
 245                 };
 246         };
 247
 248         sbs0@1f000000 {
 249                 #address-cells = <1>;
 250                 #size-cells = <1>;
 251                 compatible = "simple-bus";
 252                 reg = <0x1f000000 0x400000>;
 253                 ranges = <0x0 0x1f000000 0x400000>;
 254
 255                 mpsmbx: mpsmbx@200000 {
 256                         reg = <0x200000 0x200>;
 257                 };
 258         };
 259
 260         biu@1f800000 {
 261                 #address-cells = <1>;
 262                 #size-cells = <1>;
 263                 compatible = "lantiq,biu", "simple-bus";
 264                 reg = <0x1f800000 0x800000>;
 265                 ranges = <0x0 0x1f800000 0x800000>;
 266
 267                 icu0: icu@80200 {
 268                         #interrupt-cells = <1>;
 269                         interrupt-controller;
 270                         compatible = "lantiq,icu";
 271                         /* TODO: Number of ICUs isn't known */
 272                         reg = <0x80200 0xc8>;
 273                 };
 274
 275                 watchdog@803f0 {
 276                         compatible = "lantiq,wdt";
 277                         reg = <0x803f0 0x10>;
 278                 };
 279         };
 280
 281         pinctrl {
 282                 compatible = "lantiq,pinctrl-falcon";
 283                 pinctrl-names = "default";
 284                 pinctrl-0 = <&state_default>;
 285
 286                 state_default: pinctrl0 {
 287                         /*ntr {
 288                                 lantiq,groups = "ntr8k";
 289                                 lantiq,function = "ntr";
 290                         };*/
 291                         hrst {
 292                                 lantiq,groups = "hrst";
 293                                 lantiq,function = "rst";
 294                         };
 295                 };
 296
 297                 asc0_pins: asc0 {
 298                         asc0 {
 299                                 lantiq,groups = "asc0";
 300                                 lantiq,function = "asc";
 301                         };
 302                 };
 303                 asc1_pins: asc1 {
 304                         asc1 {
 305                                 lantiq,groups = "asc1";
 306                                 lantiq,function = "asc";
 307                         };
 308                 };
 309                 i2c_pins: i2c_pins {
 310                         i2c_pins {
 311                                 lantiq,groups = "i2c";
 312                                 lantiq,function = "i2c";
 313                         };
 314                 };
 315                 bootled_pins: bootled {
 316                         bootled {
 317                                 lantiq,groups = "bootled";
 318                                 lantiq,function = "led";
 319                         };
 320                 };
 321                 ntr_ntr8k: ntr8k {
 322                         ntr8k {
 323                                 lantiq,groups = "ntr8k";
 324                                 lantiq,function = "ntr";
 325                         };
 326                 };
 327                 ntr_pps: pps {
 328                         pps {
 329                                 lantiq,groups = "pps";
 330                                 lantiq,function = "ntr";
 331                         };
 332                 };
 333                 ntr_gpio: gpio {
 334                         gpio {
 335                                 lantiq,pins = "io5";
 336                                 lantiq,mux = <1>;
 337                                 lantiq,output = <0>;
 338                         };
 339                 };
 340                 slic_pins: slic {
 341                         slic {
 342                                 lantiq,groups = "slic";
 343                                 lantiq,function = "slic";
 344                         };
 345                 };
 346         };
 347
 348         pinselect-ntr {
 349                 compatible = "lantiq,onu-ntr","lantiq,pinselect-ntr";
 350                 pinctrl-names = "ntr8k", "pps", "gpio";
 351                 pinctrl-0 = <&ntr_ntr8k>;
 352                 pinctrl-1 = <&ntr_pps>;
 353                 pinctrl-2 = <&ntr_gpio>;
 354         };
 355
 356         pinselect-asc1 {
 357                 compatible = "lantiq,onu-asc1","lantiq,pinselect-asc1";
 358                 pinctrl-names = "default", "asc1";
 359                 pinctrl-0 = <&slic_pins>;
 360                 pinctrl-1 = <&asc1_pins>;
 361         };
 362
 363 };