target/linux/lantiq/patches-5.4/0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch

   1 From 74f03104ed465ff71b11076ef620e4eaa53dbf74 Mon Sep 17 00:00:00 2001
   2 From: Christoph Hellwig <hch@lst.de>
   3 Date: Fri, 1 Feb 2019 09:47:44 +0100
   4 Subject: [PATCH] MIPS: lantiq: pass struct device to DMA API functions
   5
   6 The DMA API generally relies on a struct device to work properly, and
   7 only barely works without one for legacy reasons.  Pass the easily
   8 available struct device from the platform_device to remedy this.
   9
  10 Also use GFP_KERNEL instead of GFP_ATOMIC as the gfp_t for the memory
  11 allocation, as we aren't in interrupt context or under a lock.
  12
  13 Note that this whole function looks somewhat bogus given that we never
  14 even look at the returned dma address, and the CPHYSADDR magic on
  15 a returned noncached mapping looks "interesting".  But I'll leave
  16 that to people more familiar with the code to sort out.
  17
  18 Signed-off-by: Christoph Hellwig <hch@lst.de>
  19 Signed-off-by: Paul Burton <paul.burton@mips.com>
  20 Cc: John Crispin <john@phrozen.org>
  21 Cc: Vinod Koul <vkoul@kernel.org>
  22 Cc: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
  23 Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
  24 Cc: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
  25 Cc: Felipe Balbi <balbi@kernel.org>
  26 Cc: linux-mips@vger.kernel.org
  27 Cc: linux-kernel@vger.kernel.org
  28 Cc: dmaengine@vger.kernel.org
  29 Cc: netdev@vger.kernel.org
  30 Cc: linux-usb@vger.kernel.org
  31 Cc: linux-fbdev@vger.kernel.org
  32 Cc: alsa-devel@alsa-project.org
  33 Cc: iommu@lists.linux-foundation.org
  34 ---
  35  arch/mips/lantiq/xway/vmmc.c | 4 ++--
  36  1 file changed, 2 insertions(+), 2 deletions(-)
  37
  38 --- a/arch/mips/lantiq/xway/vmmc.c
  39 +++ b/arch/mips/lantiq/xway/vmmc.c
  40 @@ -31,8 +31,8 @@ static int vmmc_probe(struct platform_de
  41         dma_addr_t dma;
  42
  43         cp1_base =
  44 -               (void *) CPHYSADDR(dma_alloc_coherent(NULL, CP1_SIZE,
  45 -                                                   &dma, GFP_ATOMIC));
  46 +               (void *) CPHYSADDR(dma_alloc_coherent(&pdev->dev, CP1_SIZE,
  47 +                                                   &dma, GFP_KERNEL));
  48
  49         gpio_count = of_gpio_count(pdev->dev.of_node);
  50         while (gpio_count > 0) {