target/linux/lantiq/patches/940-spi1.patch

   1 From: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
   2 Date: Thu, 3 Mar 2011 17:15:58 +0000 (+0100)
   3 Subject: MIPS: lantiq: Add platform data for Lantiq SoC SPI controller driver
   4 X-Git-Url: http://nbd.name/gitweb.cgi?p=lantiq.git;a=commitdiff_plain;h=3d21b04682ae8eb1c1965aba39d1796e8c5ad84b;hp=06b420500fe98e37662837e78d8e51aead8aea81
   5
   6 MIPS: lantiq: Add platform data for Lantiq SoC SPI controller driver
   7
   8 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
   9 ---
  10
  11 --- a/arch/mips/include/asm/mach-lantiq/lantiq_platform.h
  12 +++ b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h
  13 @@ -48,4 +48,13 @@
  14
  15  extern int (*lqpci_plat_dev_init)(struct pci_dev *dev);
  16
  17 +
  18 +struct lq_spi_platform_data {
  19 +       u16 num_chipselect;
  20 +};
  21 +
  22 +struct lq_spi_controller_data {
  23 +       unsigned gpio;
  24 +};
  25 +
  26  #endif
  27 --- a/arch/mips/include/asm/mach-lantiq/xway/xway.h
  28 +++ b/arch/mips/include/asm/mach-lantiq/xway/xway.h
  29 @@ -72,6 +72,7 @@
  30  #define LQ_PMU_BASE_ADDR       (KSEG1 + 0x1F102000)
  31
  32  #define PMU_DMA                                0x0020
  33 +#define PMU_SPI                                0x0100
  34  #define PMU_USB                                0x8041
  35  #define PMU_LED                                0x0800
  36  #define PMU_GPT                                0x1000
  37 @@ -105,6 +106,7 @@
  38
  39  /*------------ SSC */
  40  #define LQ_SSC_BASE_ADDR       (KSEG1 + 0x1e100800)
  41 +#define LQ_SSC_SIZE            0x100
  42
  43  /*------------ MEI */
  44  #define LQ_MEI_BASE_ADDR       (KSEG1 + 0x1E116000)