target/linux/layerscape/patches-4.4/8050-PCI-layerscape-Fix-MSG-TLP-drop-setting.patch

   1 From 61959c53020fff0584d88e28d6dae9806184f1a8 Mon Sep 17 00:00:00 2001
   2 From: Minghuan Lian <Minghuan.Lian@nxp.com>
   3 Date: Mon, 29 Feb 2016 17:24:15 -0600
   4 Subject: [PATCH 50/70] PCI: layerscape: Fix MSG TLP drop setting
   5
   6 Some kinds of Layerscape PCIe controllers will forward the received message
   7 TLPs to system application address space, which could corrupt system memory
   8 or lead to a system hang.  Enable MSG_DROP to fix this issue.
   9
  10 Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
  11 Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  12 ---
  13  drivers/pci/host/pci-layerscape.c |   21 +++++++++++++--------
  14  1 file changed, 13 insertions(+), 8 deletions(-)
  15
  16 --- a/drivers/pci/host/pci-layerscape.c
  17 +++ b/drivers/pci/host/pci-layerscape.c
  18 @@ -77,6 +77,16 @@ static void ls_pcie_fix_class(struct ls_
  19         iowrite16(PCI_CLASS_BRIDGE_PCI, pcie->dbi + PCI_CLASS_DEVICE);
  20  }
  21
  22 +/* Drop MSG TLP except for Vendor MSG */
  23 +static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie)
  24 +{
  25 +       u32 val;
  26 +
  27 +       val = ioread32(pcie->dbi + PCIE_STRFMR1);
  28 +       val &= 0xDFFFFFFF;
  29 +       iowrite32(val, pcie->dbi + PCIE_STRFMR1);
  30 +}
  31 +
  32  static int ls1021_pcie_link_up(struct pcie_port *pp)
  33  {
  34         u32 state;
  35 @@ -97,7 +107,7 @@ static int ls1021_pcie_link_up(struct pc
  36  static void ls1021_pcie_host_init(struct pcie_port *pp)
  37  {
  38         struct ls_pcie *pcie = to_ls_pcie(pp);
  39 -       u32 val, index[2];
  40 +       u32 index[2];
  41
  42         pcie->scfg = syscon_regmap_lookup_by_phandle(pp->dev->of_node,
  43                                                      "fsl,pcie-scfg");
  44 @@ -116,13 +126,7 @@ static void ls1021_pcie_host_init(struct
  45
  46         dw_pcie_setup_rc(pp);
  47
  48 -       /*
  49 -        * LS1021A Workaround for internal TKT228622
  50 -        * to fix the INTx hang issue
  51 -        */
  52 -       val = ioread32(pcie->dbi + PCIE_STRFMR1);
  53 -       val &= 0xffff;
  54 -       iowrite32(val, pcie->dbi + PCIE_STRFMR1);
  55 +       ls_pcie_drop_msg_tlp(pcie);
  56  }
  57
  58  static int ls_pcie_link_up(struct pcie_port *pp)
  59 @@ -147,6 +151,7 @@ static void ls_pcie_host_init(struct pci
  60         iowrite32(1, pcie->dbi + PCIE_DBI_RO_WR_EN);
  61         ls_pcie_fix_class(pcie);
  62         ls_pcie_clear_multifunction(pcie);
  63 +       ls_pcie_drop_msg_tlp(pcie);
  64         iowrite32(0, pcie->dbi + PCIE_DBI_RO_WR_EN);
  65  }
  66