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[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-4.9 / 817-usb-support-layerscape.patch
1 From b14460ee524a34d3b94b44032b52155c4cd708e5 Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Wed, 27 Sep 2017 10:34:07 +0800
4 Subject: [PATCH] usb: support layerscape
5
6 This is a integrated patch for layerscape usb support.
7
8 Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
9 Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
10 Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
11 Signed-off-by: Changming Huang <jerry.huang@nxp.com>
12 Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
13 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
14 Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
15 Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
16 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
17 ---
18 drivers/net/usb/r8152.c | 4 +
19 drivers/usb/common/common.c | 50 ++++++
20 drivers/usb/core/hub.c | 8 +
21 drivers/usb/dwc3/core.c | 235 ++++++++++++++++++++++++++-
22 drivers/usb/dwc3/core.h | 46 +++++-
23 drivers/usb/dwc3/host.c | 15 +-
24 drivers/usb/gadget/udc/fsl_udc_core.c | 46 +++---
25 drivers/usb/gadget/udc/fsl_usb2_udc.h | 16 +-
26 drivers/usb/host/Kconfig | 2 +-
27 drivers/usb/host/ehci-fsl.c | 289 +++++++++++++++++++++++++++++++---
28 drivers/usb/host/ehci-fsl.h | 3 +
29 drivers/usb/host/ehci-hub.c | 2 +
30 drivers/usb/host/ehci.h | 5 +
31 drivers/usb/host/fsl-mph-dr-of.c | 12 ++
32 drivers/usb/phy/phy-fsl-usb.c | 59 +++++--
33 drivers/usb/phy/phy-fsl-usb.h | 8 +
34 include/linux/usb.h | 1 +
35 include/linux/usb/of.h | 2 +
36 18 files changed, 730 insertions(+), 73 deletions(-)
37
38 diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
39 index afb953a2..c9c86495 100644
40 --- a/drivers/net/usb/r8152.c
41 +++ b/drivers/net/usb/r8152.c
42 @@ -1812,6 +1812,10 @@ static int rx_bottom(struct r8152 *tp, int budget)
43 unsigned int pkt_len;
44 struct sk_buff *skb;
45
46 + /* limite the skb numbers for rx_queue */
47 + if (unlikely(skb_queue_len(&tp->rx_queue) >= 1000))
48 + break;
49 +
50 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
51 if (pkt_len < ETH_ZLEN)
52 break;
53 diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
54 index 5ef8da6e..176dee01 100644
55 --- a/drivers/usb/common/common.c
56 +++ b/drivers/usb/common/common.c
57 @@ -105,6 +105,56 @@ static const char *const usb_dr_modes[] = {
58 [USB_DR_MODE_OTG] = "otg",
59 };
60
61 +/**
62 + * of_usb_get_dr_mode - Get dual role mode for given device_node
63 + * @np: Pointer to the given device_node
64 + *
65 + * The function gets phy interface string from property 'dr_mode',
66 + * and returns the correspondig enum usb_dr_mode
67 + */
68 +enum usb_dr_mode of_usb_get_dr_mode(struct device_node *np)
69 +{
70 + const char *dr_mode;
71 + int err, i;
72 +
73 + err = of_property_read_string(np, "dr_mode", &dr_mode);
74 + if (err < 0)
75 + return USB_DR_MODE_UNKNOWN;
76 +
77 + for (i = 0; i < ARRAY_SIZE(usb_dr_modes); i++)
78 + if (!strcmp(dr_mode, usb_dr_modes[i]))
79 + return i;
80 +
81 + return USB_DR_MODE_UNKNOWN;
82 +}
83 +EXPORT_SYMBOL_GPL(of_usb_get_dr_mode);
84 +
85 +/**
86 + * of_usb_get_maximum_speed - Get maximum requested speed for a given USB
87 + * controller.
88 + * @np: Pointer to the given device_node
89 + *
90 + * The function gets the maximum speed string from property "maximum-speed",
91 + * and returns the corresponding enum usb_device_speed.
92 + */
93 +enum usb_device_speed of_usb_get_maximum_speed(struct device_node *np)
94 +{
95 + const char *maximum_speed;
96 + int err;
97 + int i;
98 +
99 + err = of_property_read_string(np, "maximum-speed", &maximum_speed);
100 + if (err < 0)
101 + return USB_SPEED_UNKNOWN;
102 +
103 + for (i = 0; i < ARRAY_SIZE(speed_names); i++)
104 + if (strcmp(maximum_speed, speed_names[i]) == 0)
105 + return i;
106 +
107 + return USB_SPEED_UNKNOWN;
108 +}
109 +EXPORT_SYMBOL_GPL(of_usb_get_maximum_speed);
110 +
111 static enum usb_dr_mode usb_get_dr_mode_from_string(const char *str)
112 {
113 int ret;
114 diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
115 index 80d4ef31..e23acf03 100644
116 --- a/drivers/usb/core/hub.c
117 +++ b/drivers/usb/core/hub.c
118 @@ -4412,6 +4412,14 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
119 else
120 speed = usb_speed_string(udev->speed);
121
122 +#if !defined(CONFIG_FSL_USB2_OTG) && !defined(CONFIG_FSL_USB2_OTG_MODULE)
123 +if (udev->speed != USB_SPEED_SUPER)
124 + dev_info(&udev->dev,
125 + "%s %s USB device number %d using %s\n",
126 + (udev->config) ? "reset" : "new", speed,
127 + devnum, udev->bus->controller->driver->name);
128 +#endif
129 +
130 if (udev->speed < USB_SPEED_SUPER)
131 dev_info(&udev->dev,
132 "%s %s USB device number %d using %s\n",
133 diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
134 index fea44690..e34ef90a 100644
135 --- a/drivers/usb/dwc3/core.c
136 +++ b/drivers/usb/dwc3/core.c
137 @@ -58,6 +58,7 @@ static int dwc3_get_dr_mode(struct dwc3 *dwc)
138 enum usb_dr_mode mode;
139 struct device *dev = dwc->dev;
140 unsigned int hw_mode;
141 + struct device_node *node = dev->of_node;
142
143 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN)
144 dwc->dr_mode = USB_DR_MODE_OTG;
145 @@ -83,6 +84,24 @@ static int dwc3_get_dr_mode(struct dwc3 *dwc)
146 mode = USB_DR_MODE_HOST;
147 break;
148 default:
149 + /* Adjust Frame Length */
150 + if (dwc->configure_gfladj)
151 + dwc3_writel(dwc->regs, DWC3_GFLADJ, GFLADJ_30MHZ_REG_SEL |
152 + GFLADJ_30MHZ(GFLADJ_30MHZ_DEFAULT));
153 +
154 + /* Change burst beat and outstanding pipelined transfers requests */
155 + dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
156 + (dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) & ~0xff) | 0xf);
157 + dwc3_writel(dwc->regs, DWC3_GSBUSCFG1,
158 + dwc3_readl(dwc->regs, DWC3_GSBUSCFG1) | 0xf00);
159 +
160 + /* Enable Snooping */
161 + if (node && of_dma_is_coherent(node)) {
162 + dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
163 + dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) | 0x22220000);
164 + dev_dbg(dev, "enabled snooping for usb\n");
165 + }
166 +
167 if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
168 mode = USB_DR_MODE_HOST;
169 else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))
170 @@ -213,8 +232,9 @@ static void dwc3_frame_length_adjustment(struct dwc3 *dwc)
171
172 reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
173 dft = reg & DWC3_GFLADJ_30MHZ_MASK;
174 - if (!dev_WARN_ONCE(dwc->dev, dft == dwc->fladj,
175 - "request value same as default, ignoring\n")) {
176 + if (dft == dwc->fladj) {
177 + dev_warn(dwc->dev, "request value same as default, ignoring\n");
178 + } else {
179 reg &= ~DWC3_GFLADJ_30MHZ_MASK;
180 reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj;
181 dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
182 @@ -579,6 +599,99 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
183 return 0;
184 }
185
186 +/* set global soc bus configuration registers */
187 +static void dwc3_set_soc_bus_cfg(struct dwc3 *dwc)
188 +{
189 + struct device *dev = dwc->dev;
190 + u32 *vals;
191 + u32 cfg;
192 + int ntype;
193 + int ret;
194 + int i;
195 +
196 + cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0);
197 +
198 + /*
199 + * Handle property "snps,incr-burst-type-adjustment".
200 + * Get the number of value from this property:
201 + * result <= 0, means this property is not supported.
202 + * result = 1, means INCRx burst mode supported.
203 + * result > 1, means undefined length burst mode supported.
204 + */
205 + ntype = device_property_read_u32_array(dev,
206 + "snps,incr-burst-type-adjustment", NULL, 0);
207 + if (ntype > 0) {
208 + vals = kcalloc(ntype, sizeof(u32), GFP_KERNEL);
209 + if (!vals) {
210 + dev_err(dev, "Error to get memory\n");
211 + return;
212 + }
213 + /* Get INCR burst type, and parse it */
214 + ret = device_property_read_u32_array(dev,
215 + "snps,incr-burst-type-adjustment", vals, ntype);
216 + if (ret) {
217 + dev_err(dev, "Error to get property\n");
218 + return;
219 + }
220 + *(dwc->incrx_type + 1) = vals[0];
221 + if (ntype > 1) {
222 + *dwc->incrx_type = 1;
223 + for (i = 1; i < ntype; i++) {
224 + if (vals[i] > *(dwc->incrx_type + 1))
225 + *(dwc->incrx_type + 1) = vals[i];
226 + }
227 + } else
228 + *dwc->incrx_type = 0;
229 +
230 + /* Enable Undefined Length INCR Burst and Enable INCRx Burst */
231 + cfg &= ~DWC3_GSBUSCFG0_INCRBRST_MASK;
232 + if (*dwc->incrx_type)
233 + cfg |= DWC3_GSBUSCFG0_INCRBRSTENA;
234 + switch (*(dwc->incrx_type + 1)) {
235 + case 256:
236 + cfg |= DWC3_GSBUSCFG0_INCR256BRSTENA;
237 + break;
238 + case 128:
239 + cfg |= DWC3_GSBUSCFG0_INCR128BRSTENA;
240 + break;
241 + case 64:
242 + cfg |= DWC3_GSBUSCFG0_INCR64BRSTENA;
243 + break;
244 + case 32:
245 + cfg |= DWC3_GSBUSCFG0_INCR32BRSTENA;
246 + break;
247 + case 16:
248 + cfg |= DWC3_GSBUSCFG0_INCR16BRSTENA;
249 + break;
250 + case 8:
251 + cfg |= DWC3_GSBUSCFG0_INCR8BRSTENA;
252 + break;
253 + case 4:
254 + cfg |= DWC3_GSBUSCFG0_INCR4BRSTENA;
255 + break;
256 + case 1:
257 + break;
258 + default:
259 + dev_err(dev, "Invalid property\n");
260 + break;
261 + }
262 + }
263 +
264 + /* Handle usb snooping */
265 + if (dwc->dma_snooping_quirk) {
266 + cfg &= ~DWC3_GSBUSCFG0_SNP_MASK;
267 + cfg |= (AXI3_CACHE_TYPE_SNP << DWC3_GSBUSCFG0_DATARD_SHIFT) |
268 + (AXI3_CACHE_TYPE_SNP << DWC3_GSBUSCFG0_DESCRD_SHIFT) |
269 + (AXI3_CACHE_TYPE_SNP << DWC3_GSBUSCFG0_DATAWR_SHIFT) |
270 + (AXI3_CACHE_TYPE_SNP << DWC3_GSBUSCFG0_DESCWR_SHIFT);
271 + }
272 +
273 + dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg);
274 +
275 +}
276 +
277 +
278 +
279 static void dwc3_core_exit(struct dwc3 *dwc)
280 {
281 dwc3_event_buffers_cleanup(dwc);
282 @@ -721,6 +834,8 @@ static int dwc3_core_init(struct dwc3 *dwc)
283 if (ret)
284 goto err1;
285
286 + dwc3_set_soc_bus_cfg(dwc);
287 +
288 /* Adjust Frame Length */
289 dwc3_frame_length_adjustment(dwc);
290
291 @@ -919,11 +1034,109 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc)
292 }
293 }
294
295 +static void dwc3_get_properties(struct dwc3 *dwc)
296 +{
297 + struct device *dev = dwc->dev;
298 + struct device_node *node = dev->of_node;
299 + u8 lpm_nyet_threshold;
300 + u8 tx_de_emphasis;
301 + u8 hird_threshold;
302 +
303 + /* default to highest possible threshold */
304 + lpm_nyet_threshold = 0xff;
305 +
306 + /* default to -3.5dB de-emphasis */
307 + tx_de_emphasis = 1;
308 +
309 + /*
310 + * default to assert utmi_sleep_n and use maximum allowed HIRD
311 + * threshold value of 0b1100
312 + */
313 + hird_threshold = 12;
314 +
315 + dwc->maximum_speed = usb_get_maximum_speed(dev);
316 + dwc->dr_mode = usb_get_dr_mode(dev);
317 + dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node);
318 +
319 + dwc->sysdev_is_parent = device_property_read_bool(dev,
320 + "linux,sysdev_is_parent");
321 + if (dwc->sysdev_is_parent)
322 + dwc->sysdev = dwc->dev->parent;
323 + else
324 + dwc->sysdev = dwc->dev;
325 +
326 + dwc->has_lpm_erratum = device_property_read_bool(dev,
327 + "snps,has-lpm-erratum");
328 + device_property_read_u8(dev, "snps,lpm-nyet-threshold",
329 + &lpm_nyet_threshold);
330 + dwc->is_utmi_l1_suspend = device_property_read_bool(dev,
331 + "snps,is-utmi-l1-suspend");
332 + device_property_read_u8(dev, "snps,hird-threshold",
333 + &hird_threshold);
334 + dwc->usb3_lpm_capable = device_property_read_bool(dev,
335 + "snps,usb3_lpm_capable");
336 +
337 + dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
338 +
339 + dwc->configure_gfladj =
340 + of_property_read_bool(node, "configure-gfladj");
341 + dwc->dr_mode = usb_get_dr_mode(dev);
342 +
343 + dwc->disable_scramble_quirk = device_property_read_bool(dev,
344 + "snps,disable_scramble_quirk");
345 + dwc->u2exit_lfps_quirk = device_property_read_bool(dev,
346 + "snps,u2exit_lfps_quirk");
347 + dwc->u2ss_inp3_quirk = device_property_read_bool(dev,
348 + "snps,u2ss_inp3_quirk");
349 + dwc->req_p1p2p3_quirk = device_property_read_bool(dev,
350 + "snps,req_p1p2p3_quirk");
351 + dwc->del_p1p2p3_quirk = device_property_read_bool(dev,
352 + "snps,del_p1p2p3_quirk");
353 + dwc->del_phy_power_chg_quirk = device_property_read_bool(dev,
354 + "snps,del_phy_power_chg_quirk");
355 + dwc->lfps_filter_quirk = device_property_read_bool(dev,
356 + "snps,lfps_filter_quirk");
357 + dwc->rx_detect_poll_quirk = device_property_read_bool(dev,
358 + "snps,rx_detect_poll_quirk");
359 + dwc->dis_u3_susphy_quirk = device_property_read_bool(dev,
360 + "snps,dis_u3_susphy_quirk");
361 + dwc->dis_u2_susphy_quirk = device_property_read_bool(dev,
362 + "snps,dis_u2_susphy_quirk");
363 + dwc->dis_enblslpm_quirk = device_property_read_bool(dev,
364 + "snps,dis_enblslpm_quirk");
365 + dwc->dis_rxdet_inp3_quirk = device_property_read_bool(dev,
366 + "snps,dis_rxdet_inp3_quirk");
367 + dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev,
368 + "snps,dis-u2-freeclk-exists-quirk");
369 + dwc->dis_del_phy_power_chg_quirk = device_property_read_bool(dev,
370 + "snps,dis-del-phy-power-chg-quirk");
371 + dwc->dma_snooping_quirk = device_property_read_bool(dev,
372 + "snps,dma-snooping");
373 +
374 + dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
375 + "snps,tx_de_emphasis_quirk");
376 + device_property_read_u8(dev, "snps,tx_de_emphasis",
377 + &tx_de_emphasis);
378 + device_property_read_string(dev, "snps,hsphy_interface",
379 + &dwc->hsphy_interface);
380 + device_property_read_u32(dev, "snps,quirk-frame-length-adjustment",
381 + &dwc->fladj);
382 +
383 + dwc->lpm_nyet_threshold = lpm_nyet_threshold;
384 + dwc->tx_de_emphasis = tx_de_emphasis;
385 +
386 + dwc->hird_threshold = hird_threshold
387 + | (dwc->is_utmi_l1_suspend << 4);
388 +
389 + dwc->imod_interval = 0;
390 +}
391 +
392 #define DWC3_ALIGN_MASK (16 - 1)
393
394 static int dwc3_probe(struct platform_device *pdev)
395 {
396 struct device *dev = &pdev->dev;
397 + struct device_node *node = dev->of_node;
398 struct resource *res;
399 struct dwc3 *dwc;
400 u8 lpm_nyet_threshold;
401 @@ -955,6 +1168,11 @@ static int dwc3_probe(struct platform_device *pdev)
402 dwc->xhci_resources[0].flags = res->flags;
403 dwc->xhci_resources[0].name = res->name;
404
405 + if (node) {
406 + dwc->configure_gfladj =
407 + of_property_read_bool(node, "configure-gfladj");
408 + }
409 +
410 res->start += DWC3_GLOBALS_REGS_START;
411
412 /*
413 @@ -997,6 +1215,12 @@ static int dwc3_probe(struct platform_device *pdev)
414 dwc->usb3_lpm_capable = device_property_read_bool(dev,
415 "snps,usb3_lpm_capable");
416
417 + dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
418 +
419 + dwc->configure_gfladj =
420 + of_property_read_bool(node, "configure-gfladj");
421 + dwc->dr_mode = of_usb_get_dr_mode(node);
422 +
423 dwc->disable_scramble_quirk = device_property_read_bool(dev,
424 "snps,disable_scramble_quirk");
425 dwc->u2exit_lfps_quirk = device_property_read_bool(dev,
426 @@ -1041,6 +1265,8 @@ static int dwc3_probe(struct platform_device *pdev)
427 dwc->hird_threshold = hird_threshold
428 | (dwc->is_utmi_l1_suspend << 4);
429
430 + dwc3_get_properties(dwc);
431 +
432 platform_set_drvdata(pdev, dwc);
433 dwc3_cache_hwparams(dwc);
434
435 @@ -1064,6 +1290,11 @@ static int dwc3_probe(struct platform_device *pdev)
436 if (ret < 0)
437 goto err1;
438
439 + /* Adjust Frame Length */
440 + if (dwc->configure_gfladj)
441 + dwc3_writel(dwc->regs, DWC3_GFLADJ, GFLADJ_30MHZ_REG_SEL |
442 + GFLADJ_30MHZ(GFLADJ_30MHZ_DEFAULT));
443 +
444 pm_runtime_forbid(dev);
445
446 ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
447 diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
448 index 884c4371..9151eef4 100644
449 --- a/drivers/usb/dwc3/core.h
450 +++ b/drivers/usb/dwc3/core.h
451 @@ -26,6 +26,7 @@
452 #include <linux/dma-mapping.h>
453 #include <linux/mm.h>
454 #include <linux/debugfs.h>
455 +#include <linux/of_address.h>
456
457 #include <linux/usb/ch9.h>
458 #include <linux/usb/gadget.h>
459 @@ -154,6 +155,32 @@
460
461 /* Bit fields */
462
463 +/* Global SoC Bus Configuration Register 0 */
464 +#define AXI3_CACHE_TYPE_AW 0x8 /* write allocate */
465 +#define AXI3_CACHE_TYPE_AR 0x4 /* read allocate */
466 +#define AXI3_CACHE_TYPE_SNP 0x2 /* cacheable */
467 +#define AXI3_CACHE_TYPE_BUF 0x1 /* bufferable */
468 +#define DWC3_GSBUSCFG0_DATARD_SHIFT 28
469 +#define DWC3_GSBUSCFG0_DESCRD_SHIFT 24
470 +#define DWC3_GSBUSCFG0_DATAWR_SHIFT 20
471 +#define DWC3_GSBUSCFG0_DESCWR_SHIFT 16
472 +#define DWC3_GSBUSCFG0_SNP_MASK 0xffff0000
473 +#define DWC3_GSBUSCFG0_DATABIGEND (1 << 11)
474 +#define DWC3_GSBUSCFG0_DESCBIGEND (1 << 10)
475 +#define DWC3_GSBUSCFG0_INCR256BRSTENA (1 << 7) /* INCR256 burst */
476 +#define DWC3_GSBUSCFG0_INCR128BRSTENA (1 << 6) /* INCR128 burst */
477 +#define DWC3_GSBUSCFG0_INCR64BRSTENA (1 << 5) /* INCR64 burst */
478 +#define DWC3_GSBUSCFG0_INCR32BRSTENA (1 << 4) /* INCR32 burst */
479 +#define DWC3_GSBUSCFG0_INCR16BRSTENA (1 << 3) /* INCR16 burst */
480 +#define DWC3_GSBUSCFG0_INCR8BRSTENA (1 << 2) /* INCR8 burst */
481 +#define DWC3_GSBUSCFG0_INCR4BRSTENA (1 << 1) /* INCR4 burst */
482 +#define DWC3_GSBUSCFG0_INCRBRSTENA (1 << 0) /* undefined length enable */
483 +#define DWC3_GSBUSCFG0_INCRBRST_MASK 0xff
484 +
485 +/* Global SoC Bus Configuration Register 1 */
486 +#define DWC3_GSBUSCFG1_1KPAGEENA (1 << 12) /* 1K page boundary enable */
487 +#define DWC3_GSBUSCFG1_PTRANSLIMIT_MASK 0xf00
488 +
489 /* Global Debug Queue/FIFO Space Available Register */
490 #define DWC3_GDBGFIFOSPACE_NUM(n) ((n) & 0x1f)
491 #define DWC3_GDBGFIFOSPACE_TYPE(n) (((n) << 5) & 0x1e0)
492 @@ -180,7 +207,6 @@
493 #define DWC3_GCTL_CLK_PIPE (1)
494 #define DWC3_GCTL_CLK_PIPEHALF (2)
495 #define DWC3_GCTL_CLK_MASK (3)
496 -
497 #define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12)
498 #define DWC3_GCTL_PRTCAPDIR(n) ((n) << 12)
499 #define DWC3_GCTL_PRTCAP_HOST 1
500 @@ -289,6 +315,10 @@
501 /* Global Frame Length Adjustment Register */
502 #define DWC3_GFLADJ_30MHZ_SDBND_SEL (1 << 7)
503 #define DWC3_GFLADJ_30MHZ_MASK 0x3f
504 +#define GFLADJ_30MHZ_REG_SEL (1 << 7)
505 +#define GFLADJ_30MHZ(n) ((n) & 0x3f)
506 +#define GFLADJ_30MHZ_DEFAULT 0x20
507 +
508
509 /* Global User Control Register 2 */
510 #define DWC3_GUCTL2_RST_ACTBITLATER (1 << 14)
511 @@ -753,6 +783,7 @@ struct dwc3_scratchpad_array {
512 * @regs: base address for our registers
513 * @regs_size: address space size
514 * @fladj: frame length adjustment
515 + * @incrx_type: INCR burst type adjustment
516 * @irq_gadget: peripheral controller's IRQ number
517 * @nr_scratch: number of scratch buffers
518 * @u1u2: only used on revisions <1.83a for workaround
519 @@ -847,6 +878,7 @@ struct dwc3 {
520 spinlock_t lock;
521
522 struct device *dev;
523 + struct device *sysdev;
524
525 struct platform_device *xhci;
526 struct resource xhci_resources[DWC3_XHCI_RESOURCES_NUM];
527 @@ -872,6 +904,12 @@ struct dwc3 {
528 enum usb_phy_interface hsphy_mode;
529
530 u32 fladj;
531 + /*
532 + * For INCR burst type.
533 + * First field: for undefined length INCR burst type enable.
534 + * Second field: for INCRx burst type enable
535 + */
536 + u32 incrx_type[2];
537 u32 irq_gadget;
538 u32 nr_scratch;
539 u32 u1u2;
540 @@ -948,9 +986,12 @@ struct dwc3 {
541 unsigned ep0_bounced:1;
542 unsigned ep0_expect_in:1;
543 unsigned has_hibernation:1;
544 + unsigned sysdev_is_parent:1;
545 unsigned has_lpm_erratum:1;
546 unsigned is_utmi_l1_suspend:1;
547 unsigned is_fpga:1;
548 + unsigned needs_fifo_resize:1;
549 + unsigned configure_gfladj:1;
550 unsigned pending_events:1;
551 unsigned pullups_connected:1;
552 unsigned setup_packet_pending:1;
553 @@ -971,9 +1012,12 @@ struct dwc3 {
554 unsigned dis_rxdet_inp3_quirk:1;
555 unsigned dis_u2_freeclk_exists_quirk:1;
556 unsigned dis_del_phy_power_chg_quirk:1;
557 + unsigned dma_snooping_quirk:1;
558
559 unsigned tx_de_emphasis_quirk:1;
560 unsigned tx_de_emphasis:2;
561 +
562 + u16 imod_interval;
563 };
564
565 /* -------------------------------------------------------------------------- */
566 diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
567 index 626d87d5..f1b98273 100644
568 --- a/drivers/usb/dwc3/host.c
569 +++ b/drivers/usb/dwc3/host.c
570 @@ -17,6 +17,8 @@
571
572 #include <linux/platform_device.h>
573
574 +#include <linux/of_device.h>
575 +
576 #include "core.h"
577
578 int dwc3_host_init(struct dwc3 *dwc)
579 @@ -73,12 +75,21 @@ int dwc3_host_init(struct dwc3 *dwc)
580 return -ENOMEM;
581 }
582
583 - dma_set_coherent_mask(&xhci->dev, dwc->dev->coherent_dma_mask);
584 + if (IS_ENABLED(CONFIG_OF) && dwc->dev->of_node)
585 + of_dma_configure(&xhci->dev, dwc->dev->of_node);
586 + else
587 + dma_set_coherent_mask(&xhci->dev, dwc->dev->coherent_dma_mask);
588
589 - xhci->dev.parent = dwc->dev;
590 + xhci->dev.parent = dwc->dev;
591 xhci->dev.dma_mask = dwc->dev->dma_mask;
592 xhci->dev.dma_parms = dwc->dev->dma_parms;
593
594 + /* set DMA operations */
595 + if (dwc->dev->of_node && of_dma_is_coherent(dwc->dev->of_node)) {
596 + xhci->dev.archdata.dma_ops = dwc->dev->archdata.dma_ops;
597 + dev_dbg(dwc->dev, "set dma_ops for usb\n");
598 + }
599 +
600 dwc->xhci = xhci;
601
602 ret = platform_device_add_resources(xhci, dwc->xhci_resources,
603 diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c b/drivers/usb/gadget/udc/fsl_udc_core.c
604 index aac0ce8a..fe49e758 100644
605 --- a/drivers/usb/gadget/udc/fsl_udc_core.c
606 +++ b/drivers/usb/gadget/udc/fsl_udc_core.c
607 @@ -198,7 +198,11 @@ __acquires(ep->udc->lock)
608
609 spin_unlock(&ep->udc->lock);
610
611 - usb_gadget_giveback_request(&ep->ep, &req->req);
612 + /* this complete() should a func implemented by gadget layer,
613 + * eg fsg->bulk_in_complete()
614 + */
615 + if (req->req.complete)
616 + usb_gadget_giveback_request(&ep->ep, &req->req);
617
618 spin_lock(&ep->udc->lock);
619 ep->stopped = stopped;
620 @@ -245,10 +249,10 @@ static int dr_controller_setup(struct fsl_udc *udc)
621 if (udc->pdata->have_sysif_regs) {
622 if (udc->pdata->controller_ver) {
623 /* controller version 1.6 or above */
624 - ctrl = __raw_readl(&usb_sys_regs->control);
625 + ctrl = ioread32be(&usb_sys_regs->control);
626 ctrl &= ~USB_CTRL_UTMI_PHY_EN;
627 ctrl |= USB_CTRL_USB_EN;
628 - __raw_writel(ctrl, &usb_sys_regs->control);
629 + iowrite32be(ctrl, &usb_sys_regs->control);
630 }
631 }
632 portctrl |= PORTSCX_PTS_ULPI;
633 @@ -257,13 +261,14 @@ static int dr_controller_setup(struct fsl_udc *udc)
634 portctrl |= PORTSCX_PTW_16BIT;
635 /* fall through */
636 case FSL_USB2_PHY_UTMI:
637 + case FSL_USB2_PHY_UTMI_DUAL:
638 if (udc->pdata->have_sysif_regs) {
639 if (udc->pdata->controller_ver) {
640 /* controller version 1.6 or above */
641 - ctrl = __raw_readl(&usb_sys_regs->control);
642 + ctrl = ioread32be(&usb_sys_regs->control);
643 ctrl |= (USB_CTRL_UTMI_PHY_EN |
644 USB_CTRL_USB_EN);
645 - __raw_writel(ctrl, &usb_sys_regs->control);
646 + iowrite32be(ctrl, &usb_sys_regs->control);
647 mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI
648 PHY CLK to become stable - 10ms*/
649 }
650 @@ -329,22 +334,22 @@ static int dr_controller_setup(struct fsl_udc *udc)
651 /* Config control enable i/o output, cpu endian register */
652 #ifndef CONFIG_ARCH_MXC
653 if (udc->pdata->have_sysif_regs) {
654 - ctrl = __raw_readl(&usb_sys_regs->control);
655 + ctrl = ioread32be(&usb_sys_regs->control);
656 ctrl |= USB_CTRL_IOENB;
657 - __raw_writel(ctrl, &usb_sys_regs->control);
658 + iowrite32be(ctrl, &usb_sys_regs->control);
659 }
660 #endif
661
662 -#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
663 +#if !defined(CONFIG_NOT_COHERENT_CACHE)
664 /* Turn on cache snooping hardware, since some PowerPC platforms
665 * wholly rely on hardware to deal with cache coherent. */
666
667 if (udc->pdata->have_sysif_regs) {
668 /* Setup Snooping for all the 4GB space */
669 tmp = SNOOP_SIZE_2GB; /* starts from 0x0, size 2G */
670 - __raw_writel(tmp, &usb_sys_regs->snoop1);
671 + iowrite32be(tmp, &usb_sys_regs->snoop1);
672 tmp |= 0x80000000; /* starts from 0x8000000, size 2G */
673 - __raw_writel(tmp, &usb_sys_regs->snoop2);
674 + iowrite32be(tmp, &usb_sys_regs->snoop2);
675 }
676 #endif
677
678 @@ -1057,7 +1062,7 @@ static int fsl_ep_fifo_status(struct usb_ep *_ep)
679 struct ep_queue_head *qh;
680
681 ep = container_of(_ep, struct fsl_ep, ep);
682 - if (!_ep || (!ep->ep.desc && ep_index(ep) != 0))
683 + if (!_ep || !ep->ep.desc || (ep_index(ep) == 0))
684 return -ENODEV;
685
686 udc = (struct fsl_udc *)ep->udc;
687 @@ -1599,14 +1604,13 @@ static int process_ep_req(struct fsl_udc *udc, int pipe,
688 struct fsl_req *curr_req)
689 {
690 struct ep_td_struct *curr_td;
691 - int td_complete, actual, remaining_length, j, tmp;
692 + int actual, remaining_length, j, tmp;
693 int status = 0;
694 int errors = 0;
695 struct ep_queue_head *curr_qh = &udc->ep_qh[pipe];
696 int direction = pipe % 2;
697
698 curr_td = curr_req->head;
699 - td_complete = 0;
700 actual = curr_req->req.length;
701
702 for (j = 0; j < curr_req->dtd_count; j++) {
703 @@ -1651,11 +1655,9 @@ static int process_ep_req(struct fsl_udc *udc, int pipe,
704 status = -EPROTO;
705 break;
706 } else {
707 - td_complete++;
708 break;
709 }
710 } else {
711 - td_complete++;
712 VDBG("dTD transmitted successful");
713 }
714
715 @@ -1698,7 +1700,7 @@ static void dtd_complete_irq(struct fsl_udc *udc)
716 curr_ep = get_ep_by_pipe(udc, i);
717
718 /* If the ep is configured */
719 - if (curr_ep->name == NULL) {
720 + if (strncmp(curr_ep->name, "ep", 2)) {
721 WARNING("Invalid EP?");
722 continue;
723 }
724 @@ -2420,10 +2422,12 @@ static int fsl_udc_probe(struct platform_device *pdev)
725 usb_sys_regs = (void *)dr_regs + USB_DR_SYS_OFFSET;
726 #endif
727
728 +#ifdef CONFIG_ARCH_MXC
729 /* Initialize USB clocks */
730 ret = fsl_udc_clk_init(pdev);
731 if (ret < 0)
732 goto err_iounmap_noclk;
733 +#endif
734
735 /* Read Device Controller Capability Parameters register */
736 dccparams = fsl_readl(&dr_regs->dccparams);
737 @@ -2463,9 +2467,11 @@ static int fsl_udc_probe(struct platform_device *pdev)
738 dr_controller_setup(udc_controller);
739 }
740
741 +#ifdef CONFIG_ARCH_MXC
742 ret = fsl_udc_clk_finalize(pdev);
743 if (ret)
744 goto err_free_irq;
745 +#endif
746
747 /* Setup gadget structure */
748 udc_controller->gadget.ops = &fsl_gadget_ops;
749 @@ -2478,6 +2484,7 @@ static int fsl_udc_probe(struct platform_device *pdev)
750 /* Setup gadget.dev and register with kernel */
751 dev_set_name(&udc_controller->gadget.dev, "gadget");
752 udc_controller->gadget.dev.of_node = pdev->dev.of_node;
753 + set_dma_ops(&udc_controller->gadget.dev, pdev->dev.archdata.dma_ops);
754
755 if (!IS_ERR_OR_NULL(udc_controller->transceiver))
756 udc_controller->gadget.is_otg = 1;
757 @@ -2529,7 +2536,9 @@ static int fsl_udc_probe(struct platform_device *pdev)
758 err_iounmap:
759 if (pdata->exit)
760 pdata->exit(pdev);
761 +#ifdef CONFIG_ARCH_MXC
762 fsl_udc_clk_release();
763 +#endif
764 err_iounmap_noclk:
765 iounmap(dr_regs);
766 err_release_mem_region:
767 @@ -2557,8 +2566,9 @@ static int fsl_udc_remove(struct platform_device *pdev)
768 udc_controller->done = &done;
769 usb_del_gadget_udc(&udc_controller->gadget);
770
771 +#ifdef CONFIG_ARCH_MXC
772 fsl_udc_clk_release();
773 -
774 +#endif
775 /* DR has been stopped in usb_gadget_unregister_driver() */
776 remove_proc_file();
777
778 @@ -2570,7 +2580,7 @@ static int fsl_udc_remove(struct platform_device *pdev)
779 dma_pool_destroy(udc_controller->td_pool);
780 free_irq(udc_controller->irq, udc_controller);
781 iounmap(dr_regs);
782 - if (pdata->operating_mode == FSL_USB2_DR_DEVICE)
783 + if (res && (pdata->operating_mode == FSL_USB2_DR_DEVICE))
784 release_mem_region(res->start, resource_size(res));
785
786 /* free udc --wait for the release() finished */
787 diff --git a/drivers/usb/gadget/udc/fsl_usb2_udc.h b/drivers/usb/gadget/udc/fsl_usb2_udc.h
788 index 84715625..f76c4ddd 100644
789 --- a/drivers/usb/gadget/udc/fsl_usb2_udc.h
790 +++ b/drivers/usb/gadget/udc/fsl_usb2_udc.h
791 @@ -20,6 +20,10 @@
792 #define USB_MAX_CTRL_PAYLOAD 64
793 #define USB_DR_SYS_OFFSET 0x400
794
795 +#ifdef CONFIG_SOC_LS1021A
796 +#undef CONFIG_ARCH_MXC
797 +#endif
798 +
799 /* USB DR device mode registers (Little Endian) */
800 struct usb_dr_device {
801 /* Capability register */
802 @@ -597,18 +601,6 @@ struct platform_device;
803 int fsl_udc_clk_init(struct platform_device *pdev);
804 int fsl_udc_clk_finalize(struct platform_device *pdev);
805 void fsl_udc_clk_release(void);
806 -#else
807 -static inline int fsl_udc_clk_init(struct platform_device *pdev)
808 -{
809 - return 0;
810 -}
811 -static inline int fsl_udc_clk_finalize(struct platform_device *pdev)
812 -{
813 - return 0;
814 -}
815 -static inline void fsl_udc_clk_release(void)
816 -{
817 -}
818 #endif
819
820 #endif
821 diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
822 index 0b80cee3..a57d95c3 100644
823 --- a/drivers/usb/host/Kconfig
824 +++ b/drivers/usb/host/Kconfig
825 @@ -165,7 +165,7 @@ config XPS_USB_HCD_XILINX
826
827 config USB_EHCI_FSL
828 tristate "Support for Freescale PPC on-chip EHCI USB controller"
829 - depends on FSL_SOC
830 + depends on USB_EHCI_HCD
831 select USB_EHCI_ROOT_HUB_TT
832 ---help---
833 Variation of ARC USB block used in some Freescale chips.
834 diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
835 index 9f5ffb62..cd16860c 100644
836 --- a/drivers/usb/host/ehci-fsl.c
837 +++ b/drivers/usb/host/ehci-fsl.c
838 @@ -37,13 +37,141 @@
839 #include <linux/fsl_devices.h>
840 #include <linux/of_platform.h>
841
842 +#ifdef CONFIG_PPC
843 +#include <asm/fsl_pm.h>
844 +#include <linux/suspend.h>
845 +#endif
846 +
847 #include "ehci.h"
848 #include "ehci-fsl.h"
849
850 +#define FSL_USB_PHY_ADDR 0xffe214000
851 +
852 +struct ccsr_usb_port_ctrl {
853 + u32 ctrl;
854 + u32 drvvbuscfg;
855 + u32 pwrfltcfg;
856 + u32 sts;
857 + u8 res_14[0xc];
858 + u32 bistcfg;
859 + u32 biststs;
860 + u32 abistcfg;
861 + u32 abiststs;
862 + u8 res_30[0x10];
863 + u32 xcvrprg;
864 + u32 anaprg;
865 + u32 anadrv;
866 + u32 anasts;
867 +};
868 +
869 +struct ccsr_usb_phy {
870 + u32 id;
871 + struct ccsr_usb_port_ctrl port1;
872 + u8 res_50[0xc];
873 + u32 tvr;
874 + u32 pllprg[4];
875 + u8 res_70[0x4];
876 + u32 anaccfg;
877 + u32 dbg;
878 + u8 res_7c[0x4];
879 + struct ccsr_usb_port_ctrl port2;
880 + u8 res_dc[0x334];
881 +};
882 +
883 #define DRIVER_DESC "Freescale EHCI Host controller driver"
884 #define DRV_NAME "ehci-fsl"
885
886 static struct hc_driver __read_mostly fsl_ehci_hc_driver;
887 +struct ehci_fsl {
888 + /* store current hcd state for otg;
889 + * have_hcd is true when host drv al already part of otg framework,
890 + * otherwise false;
891 + * hcd_add is true when otg framework wants to add host
892 + * drv as part of otg;flase when it wants to remove it
893 + */
894 +unsigned have_hcd:1;
895 +unsigned hcd_add:1;
896 +};
897 +
898 +static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
899 +{
900 +struct ehci_hcd *ehci = hcd_to_ehci(hcd);
901 +
902 +return container_of(ehci, struct ehci_fsl, ehci);
903 +}
904 +
905 +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE)
906 +static void do_change_hcd(struct work_struct *work)
907 +{
908 +struct ehci_hcd *ehci = container_of(work, struct ehci_hcd,
909 + change_hcd_work);
910 +struct usb_hcd *hcd = ehci_to_hcd(ehci);
911 +struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
912 +void __iomem *non_ehci = hcd->regs;
913 +int retval;
914 +
915 + if (ehci_fsl->hcd_add && !ehci_fsl->have_hcd) {
916 + writel(USBMODE_CM_HOST, non_ehci + FSL_SOC_USB_USBMODE);
917 + /* host, gadget and otg share same int line */
918 + retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
919 + if (retval == 0)
920 + ehci_fsl->have_hcd = 1;
921 + } else if (!ehci_fsl->hcd_add && ehci_fsl->have_hcd) {
922 + usb_remove_hcd(hcd);
923 + ehci_fsl->have_hcd = 0;
924 + }
925 +}
926 +#endif
927 +
928 +struct ehci_fsl {
929 + struct ehci_hcd ehci;
930 +
931 +#ifdef CONFIG_PM
932 +struct ehci_regs saved_regs;
933 +struct ccsr_usb_phy saved_phy_regs;
934 +/* Saved USB PHY settings, need to restore after deep sleep. */
935 +u32 usb_ctrl;
936 +#endif
937 + /*
938 + * store current hcd state for otg;
939 + * have_hcd is true when host drv al already part of otg framework,
940 + * otherwise false;
941 + * hcd_add is true when otg framework wants to add host
942 + * drv as part of otg;flase when it wants to remove it
943 + */
944 +unsigned have_hcd:1;
945 +unsigned hcd_add:1;
946 +};
947 +
948 +static strut ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
949 +{
950 +struct ehci_hcd *ehci = hcd_to_ehci(hcd);
951 +
952 +return container_of(ehci, struct ehci_fsl, ehci);
953 +}
954 +
955 +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE)
956 +static void do_change_hcd(struct work_struct *work)
957 +{
958 +struct ehci_hcd *ehci = container_of(work, struct ehci_hcd,
959 +change_hcd_work);
960 +struct usb_hcd *hcd = ehci_to_hcd(ehci);
961 +struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
962 +void __iomem *non_ehci = hcd->regs;
963 +int retval;
964 +
965 +if (ehci_fsl->hcd_add && !ehci_fsl->have_hcd) {
966 +writel(USBMODE_CM_HOST, non_ehci + FSL_SOC_USB_USBMODE);
967 +/* host, gadget and otg share same int line */
968 +retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
969 +if (retval == 0)
970 +ehci_fsl->have_hcd = 1;
971 +} else if (!ehci_fsl->hcd_add && ehci_fsl->have_hcd) {
972 + usb_remove_hcd(hcd);
973 +ehci_fsl->have_hcd = 0;
974 +}
975 +}
976 +#endif
977
978 /* configure so an HC device and id are always provided */
979 /* always called with process context; sleeping is OK */
980 @@ -131,6 +259,12 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
981 clrsetbits_be32(hcd->regs + FSL_SOC_USB_CTRL,
982 CONTROL_REGISTER_W1C_MASK, 0x4);
983
984 + /* Set USB_EN bit to select ULPI phy for USB controller version 2.5 */
985 + if (pdata->controller_ver == FSL_USB_VER_2_5 &&
986 + pdata->phy_mode == FSL_USB2_PHY_ULPI)
987 + iowrite32be(USB_CTRL_USB_EN, hcd->regs + FSL_SOC_USB_CTRL);
988 +
989 +
990 /*
991 * Enable UTMI phy and program PTS field in UTMI mode before asserting
992 * controller reset for USB Controller version 2.5
993 @@ -143,16 +277,20 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
994
995 /* Don't need to set host mode here. It will be done by tdi_reset() */
996
997 - retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
998 + retval = usb_add_hcd(hcd, irq, IRQF_SHARED | IRQF_NO_SUSPEND);
999 if (retval != 0)
1000 goto err2;
1001 device_wakeup_enable(hcd->self.controller);
1002
1003 -#ifdef CONFIG_USB_OTG
1004 +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE)
1005 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
1006 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1007 + struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
1008
1009 hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2);
1010 +
1011 + INIT_WORK(&ehci->change_hcd_work, do_change_hcd);
1012 +
1013 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n",
1014 hcd, ehci, hcd->usb_phy);
1015
1016 @@ -168,6 +306,11 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
1017 retval = -ENODEV;
1018 goto err2;
1019 }
1020 +
1021 + ehci_fsl->have_hcd = 1;
1022 + } else {
1023 + dev_err(&pdev->dev, "wrong operating mode\n");
1024 + return -ENODEV;
1025 }
1026 #endif
1027 return retval;
1028 @@ -181,6 +324,18 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
1029 return retval;
1030 }
1031
1032 +static bool usb_phy_clk_valid(struct usb_hcd *hcd,
1033 + enum fsl_usb2_phy_modes phy_mode)
1034 +{
1035 + void __iomem *non_ehci = hcd->regs;
1036 + bool ret = true;
1037 +
1038 + if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
1039 + ret = false;
1040 +
1041 + return ret;
1042 +}
1043 +
1044 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
1045 enum fsl_usb2_phy_modes phy_mode,
1046 unsigned int port_offset)
1047 @@ -219,6 +374,21 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
1048 /* fall through */
1049 case FSL_USB2_PHY_UTMI:
1050 case FSL_USB2_PHY_UTMI_DUAL:
1051 + if (pdata->has_fsl_erratum_a006918) {
1052 + pr_warn("fsl-ehci: USB PHY clock invalid\n");
1053 + return -EINVAL;
1054 + }
1055 +
1056 + /* PHY_CLK_VALID bit is de-featured from all controller
1057 + * versions below 2.4 and is to be checked only for
1058 + * internal UTMI phy
1059 + */
1060 + if (pdata->controller_ver > FSL_USB_VER_2_4 &&
1061 + pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
1062 + pr_err("fsl-ehci: USB PHY clock invalid\n");
1063 + return -EINVAL;
1064 + }
1065 +
1066 if (pdata->have_sysif_regs && pdata->controller_ver) {
1067 /* controller version 1.6 or above */
1068 clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
1069 @@ -292,14 +462,9 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
1070 return -EINVAL;
1071
1072 if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
1073 - unsigned int chip, rev, svr;
1074 -
1075 - svr = mfspr(SPRN_SVR);
1076 - chip = svr >> 16;
1077 - rev = (svr >> 4) & 0xf;
1078
1079 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
1080 - if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
1081 + if (pdata->has_fsl_erratum_14 == 1)
1082 ehci->has_fsl_port_bug = 1;
1083
1084 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
1085 @@ -379,16 +544,57 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
1086 return retval;
1087 }
1088
1089 -struct ehci_fsl {
1090 - struct ehci_hcd ehci;
1091
1092 #ifdef CONFIG_PM
1093 - /* Saved USB PHY settings, need to restore after deep sleep. */
1094 - u32 usb_ctrl;
1095 -#endif
1096 -};
1097 +void __iomem *phy_reg;
1098
1099 -#ifdef CONFIG_PM
1100 +#ifdef CONFIG_PPC
1101 +/* save usb registers */
1102 +static int ehci_fsl_save_context(struct usb_hcd *hcd)
1103 +{
1104 + struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
1105 + struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1106 + void __iomem *non_ehci = hcd->regs;
1107 + struct device *dev = hcd->self.controller;
1108 + struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
1109 +
1110 + if (pdata->phy_mode == FSL_USB2_PHY_UTMI_DUAL) {
1111 + phy_reg = ioremap(FSL_USB_PHY_ADDR,
1112 + sizeof(struct ccsr_usb_phy));
1113 + _memcpy_fromio((void *)&ehci_fsl->saved_phy_regs, phy_reg,
1114 + sizeof(struct ccsr_usb_phy));
1115 + }
1116 +
1117 + _memcpy_fromio((void *)&ehci_fsl->saved_regs, ehci->regs,
1118 + sizeof(struct ehci_regs));
1119 + ehci_fsl->usb_ctrl = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
1120 +
1121 + return 0;
1122 +}
1123 +
1124 +/*Restore usb registers */
1125 +static int ehci_fsl_restore_context(struct usb_hcd *hcd)
1126 +{
1127 + struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
1128 + struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1129 + void __iomem *non_ehci = hcd->regs;
1130 + struct device *dev = hcd->self.controller;
1131 + struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
1132 +
1133 + if (pdata->phy_mode == FSL_USB2_PHY_UTMI_DUAL) {
1134 + if (phy_reg)
1135 + _memcpy_toio(phy_reg,
1136 + (void *)&ehci_fsl->saved_phy_regs,
1137 + sizeof(struct ccsr_usb_phy));
1138 + }
1139 +
1140 + _memcpy_toio(ehci->regs, (void *)&ehci_fsl->saved_regs,
1141 + sizeof(struct ehci_regs));
1142 + iowrite32be(ehci_fsl->usb_ctrl, non_ehci + FSL_SOC_USB_CTRL);
1143 +
1144 + return 0;
1145 +}
1146 +#endif
1147
1148 #ifdef CONFIG_PPC_MPC512x
1149 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
1150 @@ -535,26 +741,43 @@ static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
1151 }
1152 #endif /* CONFIG_PPC_MPC512x */
1153
1154 -static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
1155 -{
1156 - struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1157 -
1158 - return container_of(ehci, struct ehci_fsl, ehci);
1159 -}
1160 -
1161 static int ehci_fsl_drv_suspend(struct device *dev)
1162 {
1163 struct usb_hcd *hcd = dev_get_drvdata(dev);
1164 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
1165 void __iomem *non_ehci = hcd->regs;
1166 +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE)
1167 + struct usb_bus host = hcd->self;
1168 +#endif
1169 +
1170 +#ifdef CONFIG_PPC
1171 +suspend_state_t pm_state;
1172 +pm_state = pm_suspend_state();
1173 +
1174 +if (pm_state == PM_SUSPEND_MEM)
1175 + ehci_fsl_save_context(hcd);
1176 +#endif
1177
1178 if (of_device_is_compatible(dev->parent->of_node,
1179 "fsl,mpc5121-usb2-dr")) {
1180 return ehci_fsl_mpc512x_drv_suspend(dev);
1181 }
1182
1183 +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE)
1184 + if (host.is_otg) {
1185 + struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1186 +
1187 + /* remove hcd */
1188 + ehci_fsl->hcd_add = 0;
1189 + schedule_work(&ehci->change_hcd_work);
1190 + host.is_otg = 0;
1191 + return 0;
1192 + }
1193 +#endif
1194 +
1195 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
1196 device_may_wakeup(dev));
1197 +
1198 if (!fsl_deep_sleep())
1199 return 0;
1200
1201 @@ -568,12 +791,34 @@ static int ehci_fsl_drv_resume(struct device *dev)
1202 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
1203 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1204 void __iomem *non_ehci = hcd->regs;
1205 +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE)
1206 + struct usb_bus host = hcd->self;
1207 +#endif
1208 +
1209 +#ifdef CONFIG_PPC
1210 +suspend_state_t pm_state;
1211 +pm_state = pm_suspend_state();
1212 +
1213 +if (pm_state == PM_SUSPEND_MEM)
1214 + ehci_fsl_restore_context(hcd);
1215 +#endif
1216
1217 if (of_device_is_compatible(dev->parent->of_node,
1218 "fsl,mpc5121-usb2-dr")) {
1219 return ehci_fsl_mpc512x_drv_resume(dev);
1220 }
1221
1222 +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE)
1223 + if (host.is_otg) {
1224 + /* add hcd */
1225 + ehci_fsl->hcd_add = 1;
1226 + schedule_work(&ehci->change_hcd_work);
1227 + usb_hcd_resume_root_hub(hcd);
1228 + host.is_otg = 0;
1229 + return 0;
1230 + }
1231 +#endif
1232 +
1233 ehci_prepare_ports_for_controller_resume(ehci);
1234 if (!fsl_deep_sleep())
1235 return 0;
1236 diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
1237 index 1a8a60a5..42ea2976 100644
1238 --- a/drivers/usb/host/ehci-fsl.h
1239 +++ b/drivers/usb/host/ehci-fsl.h
1240 @@ -63,4 +63,7 @@
1241 #define UTMI_PHY_EN (1<<9)
1242 #define ULPI_PHY_CLK_SEL (1<<10)
1243 #define PHY_CLK_VALID (1<<17)
1244 +
1245 +/* Retry count for checking UTMI PHY CLK validity */
1246 +#define UTMI_PHY_CLK_VALID_CHK_RETRY 5
1247 #endif /* _EHCI_FSL_H */
1248 diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
1249 index 255acca8..c8838c33 100644
1250 --- a/drivers/usb/host/ehci-hub.c
1251 +++ b/drivers/usb/host/ehci-hub.c
1252 @@ -305,6 +305,8 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
1253 USB_PORT_STAT_HIGH_SPEED)
1254 fs_idle_delay = true;
1255 ehci_writel(ehci, t2, reg);
1256 + if (ehci_has_fsl_susp_errata(ehci))
1257 + usleep_range(10000, 20000);
1258 changed = 1;
1259 }
1260 }
1261 diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
1262 index 3b06bb77..f296d1fb 100644
1263 --- a/drivers/usb/host/ehci.h
1264 +++ b/drivers/usb/host/ehci.h
1265 @@ -180,6 +180,9 @@ struct ehci_hcd { /* one per controller */
1266 unsigned periodic_count; /* periodic activity count */
1267 unsigned uframe_periodic_max; /* max periodic time per uframe */
1268
1269 +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE)
1270 + struct work_struct change_hcd_work;
1271 +#endif
1272
1273 /* list of itds & sitds completed while now_frame was still active */
1274 struct list_head cached_itd_list;
1275 @@ -706,8 +709,10 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
1276 * incoming packets get corrupted in HS mode
1277 */
1278 #define ehci_has_fsl_hs_errata(e) ((e)->has_fsl_hs_errata)
1279 +#define ehci_has_fsl_susp_errata(e) ((e)->has_fsl_susp_errata)
1280 #else
1281 #define ehci_has_fsl_hs_errata(e) (0)
1282 +#define ehci_has_fsl_susp_errata(e) (0)
1283 #endif
1284
1285 /*
1286 diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
1287 index f07ccb25..1e59ea9f 100644
1288 --- a/drivers/usb/host/fsl-mph-dr-of.c
1289 +++ b/drivers/usb/host/fsl-mph-dr-of.c
1290 @@ -226,6 +226,18 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device *ofdev)
1291 of_property_read_bool(np, "fsl,usb-erratum-a007792");
1292 pdata->has_fsl_erratum_a005275 =
1293 of_property_read_bool(np, "fsl,usb-erratum-a005275");
1294 + pdata->has_fsl_erratum_a005697 =
1295 + of_property_read_bool(np, "fsl,usb_erratum-a005697");
1296 + if (of_get_property(np, "fsl,erratum_a006918", NULL))
1297 + pdata->has_fsl_erratum_a006918 = 1;
1298 + else
1299 + pdata->has_fsl_erratum_a006918 = 0;
1300 +
1301 + if (of_get_property(np, "fsl,usb_erratum_14", NULL))
1302 + pdata->has_fsl_erratum_14 = 1;
1303 + else
1304 + pdata->has_fsl_erratum_14 = 0;
1305 +
1306
1307 /*
1308 * Determine whether phy_clk_valid needs to be checked
1309 diff --git a/drivers/usb/phy/phy-fsl-usb.c b/drivers/usb/phy/phy-fsl-usb.c
1310 index 94eb2923..836355fa 100644
1311 --- a/drivers/usb/phy/phy-fsl-usb.c
1312 +++ b/drivers/usb/phy/phy-fsl-usb.c
1313 @@ -1,5 +1,5 @@
1314 /*
1315 - * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
1316 + * Copyright 2007,2008 Freescale Semiconductor, Inc.
1317 *
1318 * Author: Li Yang <LeoLi@freescale.com>
1319 * Jerry Huang <Chang-Ming.Huang@freescale.com>
1320 @@ -463,6 +463,7 @@ void otg_reset_controller(void)
1321 int fsl_otg_start_host(struct otg_fsm *fsm, int on)
1322 {
1323 struct usb_otg *otg = fsm->otg;
1324 + struct usb_bus *host = otg->host;
1325 struct device *dev;
1326 struct fsl_otg *otg_dev =
1327 container_of(otg->usb_phy, struct fsl_otg, phy);
1328 @@ -486,6 +487,7 @@ int fsl_otg_start_host(struct otg_fsm *fsm, int on)
1329 otg_reset_controller();
1330 VDBG("host on......\n");
1331 if (dev->driver->pm && dev->driver->pm->resume) {
1332 + host->is_otg = 1;
1333 retval = dev->driver->pm->resume(dev);
1334 if (fsm->id) {
1335 /* default-b */
1336 @@ -510,8 +512,11 @@ int fsl_otg_start_host(struct otg_fsm *fsm, int on)
1337 else {
1338 VDBG("host off......\n");
1339 if (dev && dev->driver) {
1340 - if (dev->driver->pm && dev->driver->pm->suspend)
1341 + if (dev->driver->pm &&
1342 + dev->driver->pm->suspend) {
1343 + host->is_otg = 1;
1344 retval = dev->driver->pm->suspend(dev);
1345 + }
1346 if (fsm->id)
1347 /* default-b */
1348 fsl_otg_drv_vbus(fsm, 0);
1349 @@ -539,8 +544,17 @@ int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
1350 dev = otg->gadget->dev.parent;
1351
1352 if (on) {
1353 - if (dev->driver->resume)
1354 + /* Delay gadget resume to synchronize between host and gadget
1355 + * drivers. Upon role-reversal host drv is shutdown by kernel
1356 + * worker thread. By the time host drv shuts down, controller
1357 + * gets programmed for gadget role. Shutting host drv after
1358 + * this results in controller getting reset, and it stops
1359 + * responding to otg events
1360 + */
1361 + if (dev->driver->resume) {
1362 + msleep(1000);
1363 dev->driver->resume(dev);
1364 + }
1365 } else {
1366 if (dev->driver->suspend)
1367 dev->driver->suspend(dev, otg_suspend_state);
1368 @@ -672,6 +686,10 @@ static void fsl_otg_event(struct work_struct *work)
1369 fsl_otg_start_host(fsm, 0);
1370 otg_drv_vbus(fsm, 0);
1371 fsl_otg_start_gadget(fsm, 1);
1372 + } else {
1373 + fsl_otg_start_gadget(fsm, 0);
1374 + otg_drv_vbus(fsm, 1);
1375 + fsl_otg_start_host(fsm, 1);
1376 }
1377 }
1378
1379 @@ -724,6 +742,7 @@ irqreturn_t fsl_otg_isr(int irq, void *dev_id)
1380 {
1381 struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
1382 struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
1383 + struct fsl_otg *otg_dev = dev_id;
1384 u32 otg_int_src, otg_sc;
1385
1386 otg_sc = fsl_readl(&usb_dr_regs->otgsc);
1387 @@ -753,18 +772,8 @@ irqreturn_t fsl_otg_isr(int irq, void *dev_id)
1388 otg->gadget->is_a_peripheral = !fsm->id;
1389 VDBG("ID int (ID is %d)\n", fsm->id);
1390
1391 - if (fsm->id) { /* switch to gadget */
1392 - schedule_delayed_work(
1393 - &((struct fsl_otg *)dev_id)->otg_event,
1394 - 100);
1395 - } else { /* switch to host */
1396 - cancel_delayed_work(&
1397 - ((struct fsl_otg *)dev_id)->
1398 - otg_event);
1399 - fsl_otg_start_gadget(fsm, 0);
1400 - otg_drv_vbus(fsm, 1);
1401 - fsl_otg_start_host(fsm, 1);
1402 - }
1403 + schedule_delayed_work(&otg_dev->otg_event, 100);
1404 +
1405 return IRQ_HANDLED;
1406 }
1407 }
1408 @@ -923,12 +932,32 @@ int usb_otg_start(struct platform_device *pdev)
1409 temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
1410 switch (pdata->phy_mode) {
1411 case FSL_USB2_PHY_ULPI:
1412 + if (pdata->controller_ver) {
1413 + /* controller version 1.6 or above */
1414 + setbits32(&p_otg->dr_mem_map->control,
1415 + USB_CTRL_ULPI_PHY_CLK_SEL);
1416 + /*
1417 + * Due to controller issue of PHY_CLK_VALID in ULPI
1418 + * mode, we set USB_CTRL_USB_EN before checking
1419 + * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
1420 + */
1421 + clrsetbits_be32(&p_otg->dr_mem_map->control,
1422 + USB_CTRL_UTMI_PHY_EN, USB_CTRL_IOENB);
1423 + }
1424 temp |= PORTSC_PTS_ULPI;
1425 break;
1426 case FSL_USB2_PHY_UTMI_WIDE:
1427 temp |= PORTSC_PTW_16BIT;
1428 /* fall through */
1429 case FSL_USB2_PHY_UTMI:
1430 + if (pdata->controller_ver) {
1431 + /* controller version 1.6 or above */
1432 + setbits32(&p_otg->dr_mem_map->control,
1433 + USB_CTRL_UTMI_PHY_EN);
1434 + /* Delay for UTMI PHY CLK to become stable - 10ms */
1435 + mdelay(FSL_UTMI_PHY_DLY);
1436 + }
1437 + setbits32(&p_otg->dr_mem_map->control, USB_CTRL_UTMI_PHY_EN);
1438 temp |= PORTSC_PTS_UTMI;
1439 /* fall through */
1440 default:
1441 diff --git a/drivers/usb/phy/phy-fsl-usb.h b/drivers/usb/phy/phy-fsl-usb.h
1442 index 23149954..c4c08730 100644
1443 --- a/drivers/usb/phy/phy-fsl-usb.h
1444 +++ b/drivers/usb/phy/phy-fsl-usb.h
1445 @@ -199,6 +199,14 @@
1446 /* control Register Bit Masks */
1447 #define USB_CTRL_IOENB (0x1<<2)
1448 #define USB_CTRL_ULPI_INT0EN (0x1<<0)
1449 +#define USB_CTRL_WU_INT_EN (0x1<<1)
1450 +#define USB_CTRL_LINE_STATE_FILTER__EN (0x1<<3)
1451 +#define USB_CTRL_KEEP_OTG_ON (0x1<<4)
1452 +#define USB_CTRL_OTG_PORT (0x1<<5)
1453 +#define USB_CTRL_PLL_RESET (0x1<<8)
1454 +#define USB_CTRL_UTMI_PHY_EN (0x1<<9)
1455 +#define USB_CTRL_ULPI_PHY_CLK_SEL (0x1<<10)
1456 +#define USB_CTRL_PHY_CLK_VALID (0x1<<17)
1457
1458 /* BCSR5 */
1459 #define BCSR5_INT_USB (0x02)
1460 diff --git a/include/linux/usb.h b/include/linux/usb.h
1461 index eba1f10e..c334e281 100644
1462 --- a/include/linux/usb.h
1463 +++ b/include/linux/usb.h
1464 @@ -362,6 +362,7 @@ struct usb_bus {
1465 * for control transfers?
1466 */
1467 u8 otg_port; /* 0, or number of OTG/HNP port */
1468 + unsigned is_otg:1; /* true when host is also otg */
1469 unsigned is_b_host:1; /* true during some HNP roleswitches */
1470 unsigned b_hnp_enable:1; /* OTG: did A-Host enable HNP? */
1471 unsigned no_stop_on_short:1; /*
1472 diff --git a/include/linux/usb/of.h b/include/linux/usb/of.h
1473 index 5ff9032e..2a57e0d2 100644
1474 --- a/include/linux/usb/of.h
1475 +++ b/include/linux/usb/of.h
1476 @@ -11,6 +11,8 @@
1477 #include <linux/usb/otg.h>
1478 #include <linux/usb/phy.h>
1479
1480 +enum usb_dr_mode of_usb_get_dr_mode(struct device_node *np);
1481 +
1482 #if IS_ENABLED(CONFIG_OF)
1483 enum usb_dr_mode of_usb_get_dr_mode_by_phy(struct device_node *np, int arg0);
1484 bool of_usb_host_tpl_support(struct device_node *np);
1485 --
1486 2.14.1
1487
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