mt76: update to the latest version
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / ArcherC20i.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 compatible = "ralink,mt7620a-soc";
9 model = "TP-Link Archer C20i";
10
11 chosen {
12 bootargs = "console=ttyS0,115200";
13 };
14
15 gpio-leds {
16 compatible = "gpio-leds";
17 lan {
18 label = "c20i:blue:lan";
19 gpios = <&gpio0 1 1>;
20 };
21 usb {
22 label = "c20i:blue:usb";
23 gpios = <&gpio0 11 1>;
24 };
25 wps {
26 label = "c20i:blue:wps";
27 gpios = <&gpio1 15 1>;
28 };
29 wan {
30 label = "c20i:blue:wan";
31 gpios = <&gpio2 0 1>;
32 };
33 wlan {
34 label = "c20i:blue:wlan";
35 gpios = <&gpio3 0 1>;
36 };
37 };
38
39 gpio-keys {
40 compatible = "gpio-keys";
41 #address-cells = <1>;
42 #size-cells = <0>;
43 rfkill {
44 label = "rfkill";
45 gpios = <&gpio0 2 1>;
46 linux,code = <KEY_RFKILL>;
47 };
48 reset_wps {
49 label = "reset_wps";
50 gpios = <&gpio0 13 1>;
51 linux,code = <KEY_RESTART>;
52 };
53 };
54 };
55
56 &gpio1 {
57 status = "okay";
58 };
59
60 &gpio2 {
61 status = "okay";
62 };
63
64 &gpio3 {
65 status = "okay";
66 };
67
68 &spi0 {
69 status = "okay";
70
71 m25p80@0 {
72 #address-cells = <1>;
73 #size-cells = <1>;
74 compatible = "jedec,spi-nor";
75 reg = <0>;
76 linux,modalias = "m25p80", "mx25l6405d";
77 spi-max-frequency = <10000000>;
78
79 partition@0 {
80 label = "u-boot";
81 reg = <0x0 0x20000>;
82 read-only;
83 };
84
85 partition@20000 {
86 label = "firmware";
87 reg = <0x20000 0x7a0000>;
88 };
89
90 partition@7c0000 {
91 label = "config";
92 reg = <0x7c0000 0x10000>;
93 };
94
95 rom: partition@7d0000 {
96 label = "rom";
97 reg = <0x7d0000 0x10000>;
98 };
99
100 partition@7e0000 {
101 label = "romfile";
102 reg = <0x7e0000 0x10000>;
103 };
104
105 radio: partition@7f0000 {
106 label = "radio";
107 reg = <0x7f0000 0x10000>;
108 };
109 };
110 };
111
112 &pinctrl {
113 state_default: pinctrl0 {
114 gpio {
115 ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
116 ralink,function = "gpio";
117 };
118 };
119 };
120
121 &ethernet {
122 pinctrl-names = "default";
123 mtd-mac-address = <&rom 0xf100>;
124 mediatek,portmap = "wllll";
125 };
126
127 &ehci {
128 status = "okay";
129 };
130
131 &ohci {
132 status = "okay";
133 };
134
135 &gsw {
136 mediatek,port4 = "ephy";
137 };
138
139 &wmac {
140 ralink,mtd-eeprom = <&radio 0>;
141 };
142
143 &pcie {
144 status = "okay";
145
146 pcie-bridge {
147 mt76@0,0 {
148 reg = <0x0000 0 0 0 0>;
149 device_type = "pci";
150 mediatek,mtd-eeprom = <&radio 32768>;
151 };
152 };
153 };