6430d84dd8a4dcfd462b5c862e509f8e8d40fdcb
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / CY-SWR1100.dts
1 /dts-v1/;
2
3 #include "rt3883.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "samsung,cy-swr1100", "ralink,rt3883-soc";
10 model = "Samsung CY-SWR1100";
11
12 aliases {
13 led-status = &led_wps;
14 };
15
16 nor-flash@1c000000 {
17 compatible = "cfi-flash";
18 reg = <0x1c000000 0x800000>;
19 bank-width = <2>;
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 partition@0 {
24 label = "uboot";
25 reg = <0x0 0x30000>;
26 read-only;
27 };
28
29 partition@30000 {
30 label = "uboot-env";
31 reg = <0x30000 0x4000>;
32 read-only;
33 };
34
35 factory: partition@34000 {
36 label = "factory";
37 reg = <0x34000 0x4000>;
38 read-only;
39 };
40
41 partition@38000 {
42 label = "nvram";
43 reg = <0x38000 0x8000>;
44 read-only;
45 };
46
47 partition@40000 {
48 label = "devdata";
49 reg = <0x40000 0x10000>;
50 };
51
52 partition@50000 {
53 label = "firmware";
54 reg = <0x50000 0x7b0000>;
55 };
56 };
57
58 rtl8367 {
59 compatible = "realtek,rtl8367";
60 gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
61 gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
62 realtek,extif0 = <1 0 1 1 1 1 1 1 2>;
63 };
64
65 gpio-keys-polled {
66 compatible = "gpio-keys-polled";
67 #address-cells = <1>;
68 #size-cells = <0>;
69 poll-interval = <100>;
70
71 reset {
72 label = "reset";
73 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
74 linux,code = <KEY_RESTART>;
75 };
76
77 wps {
78 label = "wps";
79 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
80 linux,code = <KEY_WPS_BUTTON>;
81 };
82 };
83
84 gpio-leds {
85 compatible = "gpio-leds";
86
87 led_wps: wps {
88 label = "cy-swr1100:blue:wps";
89 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
90 };
91
92 usb {
93 label = "cy-swr1100:blue:usb";
94 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
95 };
96 };
97 };
98
99 &gpio1 {
100 status = "okay";
101 };
102
103 &pinctrl {
104 state_default: pinctrl0 {
105 gpio {
106 ralink,group = "i2c", "spi";
107 ralink,function = "gpio";
108 };
109 };
110 };
111
112 &ethernet {
113 port@0 {
114 mediatek,fixed-link = <1000 1 1 1>;
115 phy-mode = "rgmii";
116 };
117 };
118
119 &pci {
120 status = "okay";
121 };
122
123 &pci1 {
124 status = "okay";
125
126 wifi@0,0 {
127 compatible = "pci0,0";
128 reg = <0x10000 0 0 0 0>;
129 ralink,5ghz = <0>;
130 ralink,mtd-eeprom = <&factory 0x2000>;
131 };
132 };
133
134 &wmac {
135 status = "okay";
136 ralink,2ghz = <0>;
137 ralink,mtd-eeprom = <&factory 0>;
138 };
139
140 &ehci {
141 status = "okay";
142 };
143
144 &ohci {
145 status = "okay";
146 };