target/linux/ramips/dts/PSG1208.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "phicomm,psg1208", "ralink,mt7620a-soc";
  10         model = "Phicomm PSG1208";
  11
  12         aliases {
  13                 led-status = &led_wps;
  14         };
  15
  16         gpio-leds {
  17                 compatible = "gpio-leds";
  18
  19                 led_wps: wps {
  20                         label = "psg1208:white:wps";
  21                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  22                 };
  23
  24                 wlan {
  25                         label = "psg1208:white:wlan2g";
  26                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  27                 };
  28         };
  29
  30         gpio-keys-polled {
  31                 compatible = "gpio-keys-polled";
  32                 #address-cells = <1>;
  33                 #size-cells = <0>;
  34                 poll-interval = <20>;
  35
  36                 reset {
  37                         label = "reset";
  38                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  39                         linux,code = <KEY_RESTART>;
  40                 };
  41         };
  42 };
  43
  44 &gpio1 {
  45         status = "okay";
  46 };
  47
  48 &gpio3 {
  49         status = "okay";
  50 };
  51
  52 &spi0 {
  53         status = "okay";
  54
  55         m25p80@0 {
  56                 #address-cells = <1>;
  57                 #size-cells = <1>;
  58                 compatible = "jedec,spi-nor";
  59                 reg = <0>;
  60                 spi-max-frequency = <10000000>;
  61
  62                 partition@0 {
  63                         label = "u-boot";
  64                         reg = <0x0 0x30000>;
  65                         read-only;
  66                 };
  67
  68                 partition@20000 {
  69                         label = "u-boot-env";
  70                         reg = <0x30000 0x10000>;
  71                         read-only;
  72                 };
  73
  74                 factory: partition@30000 {
  75                         label = "factory";
  76                         reg = <0x40000 0x10000>;
  77                         read-only;
  78                 };
  79
  80                 partition@40000 {
  81                         label = "firmware";
  82                         reg = <0x50000 0x7b0000>;
  83                 };
  84         };
  85 };
  86
  87 &pinctrl {
  88         state_default: pinctrl0 {
  89                 gpio {
  90                         ralink,group = "i2c", "spi refclk", "wled";
  91                         ralink,function = "gpio";
  92                 };
  93         };
  94 };
  95
  96 &ethernet {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&ephy_pins>;
  99         mtd-mac-address = <&factory 0x4>;
 100         mediatek,portmap = "llllw";
 101 };
 102
 103 &pcie {
 104         status = "okay";
 105 };
 106
 107 &pcie0 {
 108         mt76@0,0 {
 109                 reg = <0x0000 0 0 0 0>;
 110                 mediatek,mtd-eeprom = <&factory 0x8000>;
 111                 ieee80211-freq-limit = <5000000 6000000>;
 112         };
 113 };
 114
 115 &wmac {
 116         ralink,mtd-eeprom = <&factory 0>;
 117 };