2450f7d0081823c7598b9f01d7c7eeb4f91f3c46
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / mt7620a.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,mtk7620a-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24KEc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 cpuintc: cpuintc@0 {
17 #address-cells = <0>;
18 #interrupt-cells = <1>;
19 interrupt-controller;
20 compatible = "mti,cpu-interrupt-controller";
21 };
22
23 aliases {
24 spi0 = &spi0;
25 spi1 = &spi1;
26 serial0 = &uartlite;
27 };
28
29 palmbus: palmbus@10000000 {
30 compatible = "palmbus";
31 reg = <0x10000000 0x200000>;
32 ranges = <0x0 0x10000000 0x1FFFFF>;
33
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 sysc: sysc@0 {
38 compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
39 reg = <0x0 0x100>;
40 };
41
42 timer: timer@100 {
43 compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
44 reg = <0x100 0x20>;
45
46 interrupt-parent = <&intc>;
47 interrupts = <1>;
48 };
49
50 watchdog: watchdog@120 {
51 compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
52 reg = <0x120 0x10>;
53
54 resets = <&rstctrl 8>;
55 reset-names = "wdt";
56
57 interrupt-parent = <&intc>;
58 interrupts = <1>;
59 };
60
61 intc: intc@200 {
62 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
63 reg = <0x200 0x100>;
64
65 resets = <&rstctrl 19>;
66 reset-names = "intc";
67
68 interrupt-controller;
69 #interrupt-cells = <1>;
70
71 interrupt-parent = <&cpuintc>;
72 interrupts = <2>;
73 };
74
75 memc: memc@300 {
76 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
77 reg = <0x300 0x100>;
78
79 resets = <&rstctrl 20>;
80 reset-names = "mc";
81
82 interrupt-parent = <&intc>;
83 interrupts = <3>;
84 };
85
86 uart: uart@500 {
87 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
88 reg = <0x500 0x100>;
89
90 resets = <&rstctrl 12>;
91 reset-names = "uart";
92
93 interrupt-parent = <&intc>;
94 interrupts = <5>;
95
96 reg-shift = <2>;
97
98 status = "disabled";
99 };
100
101 gpio0: gpio@600 {
102 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
103 reg = <0x600 0x34>;
104
105 resets = <&rstctrl 13>;
106 reset-names = "pio";
107
108 interrupt-parent = <&intc>;
109 interrupts = <6>;
110
111 gpio-controller;
112 #gpio-cells = <2>;
113
114 ralink,gpio-base = <0>;
115 ralink,num-gpios = <24>;
116 ralink,register-map = [ 00 04 08 0c
117 20 24 28 2c
118 30 34 ];
119 };
120
121 gpio1: gpio@638 {
122 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
123 reg = <0x638 0x24>;
124
125 interrupt-parent = <&intc>;
126 interrupts = <6>;
127
128 gpio-controller;
129 #gpio-cells = <2>;
130
131 ralink,gpio-base = <24>;
132 ralink,num-gpios = <16>;
133 ralink,register-map = [ 00 04 08 0c
134 10 14 18 1c
135 20 24 ];
136
137 status = "disabled";
138 };
139
140 gpio2: gpio@660 {
141 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
142 reg = <0x660 0x24>;
143
144 interrupt-parent = <&intc>;
145 interrupts = <6>;
146
147 gpio-controller;
148 #gpio-cells = <2>;
149
150 ralink,gpio-base = <40>;
151 ralink,num-gpios = <32>;
152 ralink,register-map = [ 00 04 08 0c
153 10 14 18 1c
154 20 24 ];
155
156 status = "disabled";
157 };
158
159 gpio3: gpio@688 {
160 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
161 reg = <0x688 0x24>;
162
163 interrupt-parent = <&intc>;
164 interrupts = <6>;
165
166 gpio-controller;
167 #gpio-cells = <2>;
168
169 ralink,gpio-base = <72>;
170 ralink,num-gpios = <1>;
171 ralink,register-map = [ 00 04 08 0c
172 10 14 18 1c
173 20 24 ];
174
175 status = "disabled";
176 };
177
178 i2c: i2c@900 {
179 compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
180 reg = <0x900 0x100>;
181
182 resets = <&rstctrl 16>;
183 reset-names = "i2c";
184
185 #address-cells = <1>;
186 #size-cells = <0>;
187
188 status = "disabled";
189
190 pinctrl-names = "default";
191 pinctrl-0 = <&i2c_pins>;
192 };
193
194 i2s: i2s@a00 {
195 compatible = "ralink,mt7620a-i2s";
196 reg = <0xa00 0x100>;
197
198 resets = <&rstctrl 17>;
199 reset-names = "i2s";
200
201 interrupt-parent = <&intc>;
202 interrupts = <10>;
203
204 dmas = <&gdma 4>,
205 <&gdma 5>;
206 dma-names = "tx", "rx";
207
208 status = "disabled";
209 };
210
211 spi0: spi@b00 {
212 compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
213 reg = <0xb00 0x40>;
214
215 resets = <&rstctrl 18>;
216 reset-names = "spi";
217
218 #address-cells = <1>;
219 #size-cells = <0>;
220
221 status = "disabled";
222
223 pinctrl-names = "default";
224 pinctrl-0 = <&spi_pins>;
225 };
226
227 spi1: spi@b40 {
228 compatible = "ralink,rt2880-spi";
229 reg = <0xb40 0x60>;
230
231 resets = <&rstctrl 18>;
232 reset-names = "spi";
233
234 #address-cells = <1>;
235 #size-cells = <1>;
236
237 status = "disabled";
238
239 pinctrl-names = "default";
240 pinctrl-0 = <&spi_cs1>;
241 };
242
243 uartlite: uartlite@c00 {
244 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
245 reg = <0xc00 0x100>;
246
247 resets = <&rstctrl 19>;
248 reset-names = "uartl";
249
250 interrupt-parent = <&intc>;
251 interrupts = <12>;
252
253 reg-shift = <2>;
254
255 pinctrl-names = "default";
256 pinctrl-0 = <&uartlite_pins>;
257 };
258
259 systick: systick@d00 {
260 compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
261 reg = <0xd00 0x10>;
262
263 resets = <&rstctrl 28>;
264 reset-names = "intc";
265
266 interrupt-parent = <&cpuintc>;
267 interrupts = <7>;
268 };
269
270 pcm: pcm@2000 {
271 compatible = "ralink,mt7620a-pcm";
272 reg = <0x2000 0x800>;
273
274 resets = <&rstctrl 11>;
275 reset-names = "pcm";
276
277 interrupt-parent = <&intc>;
278 interrupts = <4>;
279
280 status = "disabled";
281 };
282
283 gdma: gdma@2800 {
284 compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
285 reg = <0x2800 0x800>;
286
287 resets = <&rstctrl 14>;
288 reset-names = "dma";
289
290 interrupt-parent = <&intc>;
291 interrupts = <7>;
292
293 #dma-cells = <1>;
294 #dma-channels = <16>;
295 #dma-requests = <16>;
296
297 status = "disabled";
298 };
299 };
300
301 pinctrl: pinctrl {
302 compatible = "ralink,rt2880-pinmux";
303 pinctrl-names = "default";
304 pinctrl-0 = <&state_default>;
305
306 state_default: pinctrl0 {
307 };
308
309 pcm_i2s_pins: pcm_i2s {
310 pcm_i2s {
311 ralink,group = "uartf";
312 ralink,function = "pcm i2s";
313 };
314 };
315
316 uartf_gpio_pins: uartf_gpio {
317 uartf_gpio {
318 ralink,group = "uartf";
319 ralink,function = "gpio uartf";
320 };
321 };
322
323 spi_pins: spi {
324 spi {
325 ralink,group = "spi";
326 ralink,function = "spi";
327 };
328 };
329
330 spi_cs1: spi1 {
331 spi1 {
332 ralink,group = "spi_cs1";
333 ralink,function = "spi_cs1";
334 };
335 };
336
337 i2c_pins: i2c {
338 i2c {
339 ralink,group = "i2c";
340 ralink,function = "i2c";
341 };
342 };
343
344 uartlite_pins: uartlite {
345 uart {
346 ralink,group = "uartlite";
347 ralink,function = "uartlite";
348 };
349 };
350
351 mdio_pins: mdio {
352 mdio {
353 ralink,group = "mdio";
354 ralink,function = "mdio";
355 };
356 };
357
358 ephy_pins: ephy {
359 ephy {
360 ralink,group = "ephy";
361 ralink,function = "ephy";
362 };
363 };
364
365 wled_pins: wled {
366 wled {
367 ralink,group = "wled";
368 ralink,function = "wled";
369 };
370 };
371
372 rgmii1_pins: rgmii1 {
373 rgmii1 {
374 ralink,group = "rgmii1";
375 ralink,function = "rgmii1";
376 };
377 };
378
379 rgmii2_pins: rgmii2 {
380 rgmii2 {
381 ralink,group = "rgmii2";
382 ralink,function = "rgmii2";
383 };
384 };
385
386 pcie_pins: pcie {
387 pcie {
388 ralink,group = "pcie";
389 ralink,function = "pcie rst";
390 };
391 };
392 };
393
394 rstctrl: rstctrl {
395 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
396 #reset-cells = <1>;
397 };
398
399 clkctrl: clkctrl {
400 compatible = "ralink,rt2880-clock";
401 #clock-cells = <1>;
402 };
403
404 usbphy: usbphy {
405 compatible = "mediatek,mt7620-usbphy";
406 #phy-cells = <1>;
407
408 resets = <&rstctrl 22 &rstctrl 25>;
409 reset-names = "host", "device";
410
411 clocks = <&clkctrl 22 &clkctrl 25>;
412 clock-names = "host", "device";
413 };
414
415 ethernet: ethernet@10100000 {
416 compatible = "mediatek,mt7620-eth";
417 reg = <0x10100000 0x10000>;
418
419 #address-cells = <1>;
420 #size-cells = <0>;
421
422 interrupt-parent = <&cpuintc>;
423 interrupts = <5>;
424
425 resets = <&rstctrl 21 &rstctrl 23>;
426 reset-names = "fe", "esw";
427
428 mediatek,switch = <&gsw>;
429
430 port@4 {
431 compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
432 reg = <4>;
433
434 status = "disabled";
435 };
436
437 port@5 {
438 compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
439 reg = <5>;
440
441 status = "disabled";
442 };
443
444 mdio-bus {
445 #address-cells = <1>;
446 #size-cells = <0>;
447
448 status = "disabled";
449 };
450 };
451
452 gsw: gsw@10110000 {
453 compatible = "mediatek,mt7620-gsw";
454 reg = <0x10110000 0x8000>;
455
456 resets = <&rstctrl 23>;
457 reset-names = "esw";
458
459 interrupt-parent = <&intc>;
460 interrupts = <17>;
461 };
462
463 sdhci: sdhci@10130000 {
464 compatible = "ralink,mt7620-sdhci";
465 reg = <0x10130000 0x4000>;
466
467 interrupt-parent = <&intc>;
468 interrupts = <14>;
469
470 status = "disabled";
471 };
472
473 ehci: ehci@101c0000 {
474 compatible = "generic-ehci";
475 reg = <0x101c0000 0x1000>;
476
477 interrupt-parent = <&intc>;
478 interrupts = <18>;
479
480 phys = <&usbphy 1>;
481 phy-names = "usb";
482
483 status = "disabled";
484 };
485
486 ohci: ohci@101c1000 {
487 compatible = "generic-ohci";
488 reg = <0x101c1000 0x1000>;
489
490 interrupt-parent = <&intc>;
491 interrupts = <18>;
492
493 phys = <&usbphy 1>;
494 phy-names = "usb";
495
496 status = "disabled";
497 };
498
499 pcie: pcie@10140000 {
500 compatible = "mediatek,mt7620-pci";
501 reg = <0x10140000 0x100
502 0x10142000 0x100>;
503
504 #address-cells = <3>;
505 #size-cells = <2>;
506
507 resets = <&rstctrl 26>;
508 reset-names = "pcie0";
509
510 clocks = <&clkctrl 26>;
511 clock-names = "pcie0";
512
513 interrupt-parent = <&cpuintc>;
514 interrupts = <4>;
515
516 pinctrl-names = "default";
517 pinctrl-0 = <&pcie_pins>;
518
519 device_type = "pci";
520
521 bus-range = <0 255>;
522 ranges = <
523 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
524 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
525 >;
526
527 status = "disabled";
528
529 pcie-bridge {
530 reg = <0x0000 0 0 0 0>;
531
532 #address-cells = <3>;
533 #size-cells = <2>;
534
535 device_type = "pci";
536 };
537 };
538
539 wmac: wmac@10180000 {
540 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
541 reg = <0x10180000 0x40000>;
542
543 interrupt-parent = <&cpuintc>;
544 interrupts = <6>;
545
546 ralink,eeprom = "soc_wmac.eeprom";
547 };
548 };