ralink: mt7621 is a 1004Kc
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / mt7621.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "mediatek,mtk7621-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips1004Kc";
9 };
10
11 cpu@1 {
12 compatible = "mips,mips1004Kc";
13 };
14 };
15
16 cpuintc: cpuintc@0 {
17 #address-cells = <0>;
18 #interrupt-cells = <1>;
19 interrupt-controller;
20 compatible = "mti,cpu-interrupt-controller";
21 };
22
23 palmbus@1E000000 {
24 compatible = "palmbus";
25 reg = <0x1E000000 0x100000>;
26 ranges = <0x0 0x1E000000 0x0FFFFF>;
27
28 #address-cells = <1>;
29 #size-cells = <1>;
30
31 sysc@0 {
32 compatible = "mtk,mt7621-sysc";
33 reg = <0x0 0x100>;
34 };
35
36 wdt@100 {
37 compatible = "mtk,mt7621-wdt";
38 reg = <0x100 0x100>;
39 };
40
41 gpio@600 {
42 #address-cells = <1>;
43 #size-cells = <0>;
44
45 compatible = "mtk,mt7621-gpio";
46 reg = <0x600 0x100>;
47
48 gpio0: bank@0 {
49 reg = <0>;
50 compatible = "mtk,mt7621-gpio-bank";
51 gpio-controller;
52 #gpio-cells = <2>;
53 };
54
55 gpio1: bank@1 {
56 reg = <1>;
57 compatible = "mtk,mt7621-gpio-bank";
58 gpio-controller;
59 #gpio-cells = <2>;
60 };
61
62 gpio2: bank@2 {
63 reg = <2>;
64 compatible = "mtk,mt7621-gpio-bank";
65 gpio-controller;
66 #gpio-cells = <2>;
67 };
68 };
69
70 memc@5000 {
71 compatible = "mtk,mt7621-memc";
72 reg = <0x300 0x100>;
73 };
74
75 uartlite@c00 {
76 compatible = "ns16550a";
77 reg = <0xc00 0x100>;
78
79 interrupt-parent = <&gic>;
80 interrupts = <26>;
81
82 reg-shift = <2>;
83 reg-io-width = <4>;
84 no-loopback-test;
85 };
86
87 spi@b00 {
88 status = "okay";
89
90 compatible = "ralink,mt7621-spi";
91 reg = <0xb00 0x100>;
92
93 resets = <&rstctrl 18>;
94 reset-names = "spi";
95
96 #address-cells = <1>;
97 #size-cells = <1>;
98
99 pinctrl-names = "default";
100 pinctrl-0 = <&spi_pins>;
101
102 m25p80@0 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105 compatible = "en25q64";
106 reg = <0 0>;
107 linux,modalias = "m25p80", "en25q64";
108 spi-max-frequency = <10000000>;
109
110 m25p,chunked-io;
111
112 partition@0 {
113 label = "u-boot";
114 reg = <0x0 0x30000>;
115 read-only;
116 };
117
118 partition@30000 {
119 label = "u-boot-env";
120 reg = <0x30000 0x10000>;
121 read-only;
122 };
123
124 factory: partition@40000 {
125 label = "factory";
126 reg = <0x40000 0x10000>;
127 read-only;
128 };
129
130 partition@50000 {
131 label = "firmware";
132 reg = <0x50000 0x7a0000>;
133 };
134
135 partition@7f0000 {
136 label = "test";
137 reg = <0x7f0000 0x10000>;
138 };
139 };
140 };
141 };
142
143 pinctrl {
144 compatible = "ralink,rt2880-pinmux";
145 pinctrl-names = "default";
146 pinctrl-0 = <&state_default>;
147 state_default: pinctrl0 {
148 };
149 spi_pins: spi {
150 spi {
151 ralink,group = "spi";
152 ralink,function = "spi";
153 };
154 };
155 i2c_pins: i2c {
156 i2c {
157 lantiq,group = "i2c";
158 lantiq,function = "i2c";
159 };
160 };
161 uart1_pins: uart1 {
162 uart1 {
163 ralink,group = "uart1";
164 ralink,function = "uart";
165 };
166 };
167 uart2_pins: uart2 {
168 uart2 {
169 ralink,group = "uart2";
170 ralink,function = "uart";
171 };
172 };
173 uart3_pins: uart3 {
174 uart3 {
175 ralink,group = "uart3";
176 ralink,function = "uart";
177 };
178 };
179 rgmii1_pins: rgmii1 {
180 rgmii1 {
181 ralink,group = "rgmii1";
182 ralink,function = "rgmii";
183 };
184 };
185 rgmii2_pins: rgmii2 {
186 rgmii2 {
187 ralink,group = "rgmii2";
188 ralink,function = "rgmii";
189 };
190 };
191 mdio_pins: mdio {
192 mdio {
193 ralink,group = "mdio";
194 ralink,function = "mdio";
195 };
196 };
197 pcie_pins: pcie {
198 pcie {
199 ralink,group = "pcie";
200 ralink,function = "pcie rst";
201 };
202 };
203 nand_pins: nand {
204 spi-nand {
205 ralink,group = "spi";
206 ralink,function = "nand";
207 };
208 sdhci-nand {
209 ralink,group = "sdhci";
210 ralink,function = "nand";
211 };
212 };
213 sdhci_pins: sdhci {
214 sdhci {
215 ralink,group = "sdhci";
216 ralink,function = "sdhci";
217 };
218 };
219 };
220
221 rstctrl: rstctrl {
222 compatible = "ralink,rt2880-reset";
223 #reset-cells = <1>;
224 };
225
226 sdhci@1E130000 {
227 compatible = "ralink,mt7620-sdhci";
228 reg = <0x1E130000 4000>;
229
230 interrupt-parent = <&gic>;
231 interrupts = <20>;
232 };
233
234 xhci@1E1C0000 {
235 compatible = "xhci-platform";
236 reg = <0x1E1C0000 4000>;
237
238 interrupt-parent = <&gic>;
239 interrupts = <22>;
240 };
241
242 gic: gic@1fbc0000 {
243 #address-cells = <0>;
244 #interrupt-cells = <1>;
245 interrupt-controller;
246 compatible = "ralink,mt7621-gic";
247 reg = < 0x1fbc0000 0x80 /* gic */
248 0x1fbf0000 0x8000 /* cpc */
249 0x1fbf8000 0x8000 /* gpmc */
250 >;
251 };
252
253 nand@1e003000 {
254 compatible = "mtk,mt7621-nand";
255 bank-width = <2>;
256 reg = <0x1e003000 0x800
257 0x1e003800 0x800>;
258 #address-cells = <1>;
259 #size-cells = <1>;
260
261 partition@0 {
262 label = "uboot";
263 reg = <0x00000 0x80000>; /* 64 KB */
264 };
265 partition@80000 {
266 label = "uboot_env";
267 reg = <0x80000 0x80000>; /* 64 KB */
268 };
269 partition@100000 {
270 label = "factory";
271 reg = <0x100000 0x40000>;
272 };
273 partition@140000 {
274 label = "rootfs";
275 reg = <0x140000 0xec0000>;
276 };
277 };
278
279 ethernet@1e100000 {
280 compatible = "ralink,mt7621-eth";
281 reg = <0x1e100000 10000>;
282
283 #address-cells = <1>;
284 #size-cells = <0>;
285
286 interrupt-parent = <&gic>;
287 interrupts = <3>;
288
289 mdio-bus {
290 #address-cells = <1>;
291 #size-cells = <0>;
292
293 phy1f: ethernet-phy@1f {
294 reg = <0x1f>;
295 phy-mode = "rgmii";
296 };
297 };
298 };
299
300 gsw@1e110000 {
301 compatible = "ralink,mt7620a-gsw";
302 reg = <0x1e110000 8000>;
303 interrupt-parent = <&gic>;
304 interrupts = <23>;
305 };
306 };