target/linux/ramips/dts/mt7621_iptime_a8004t.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include "mt7621.dtsi"
   5
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8
   9 / {
  10         compatible = "iptime,a8004t", "mediatek,mt7621-soc";
  11         model = "ipTIME A8004T";
  12
  13         chosen {
  14                 bootargs = "console=ttyS0,57600";
  15         };
  16
  17         aliases {
  18                 led-boot = &led_cpu;
  19                 led-failsafe = &led_cpu;
  20                 led-running = &led_cpu;
  21                 led-upgrade = &led_cpu;
  22         };
  23
  24         leds {
  25                 compatible = "gpio-leds";
  26
  27                 led_cpu: cpu {
  28                         label = "a8004t:orange:cpu";
  29                         gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  30                 };
  31
  32                 wlan2g {
  33                         label = "a8004t:orange:wlan2g";
  34                         gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
  35                         linux,default-trigger = "phy0radio";
  36                 };
  37
  38                 wlan5g {
  39                         label = "a8004t:orange:wlan5g";
  40                         gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  41                         linux,default-trigger = "phy1radio";
  42                 };
  43         };
  44
  45         keys {
  46                 compatible = "gpio-keys";
  47
  48                 reset {
  49                         label = "reset";
  50                         gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
  51                         linux,code = <KEY_RESTART>;
  52                 };
  53
  54                 wps {
  55                         label = "wps";
  56                         gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  57                         linux,code = <KEY_WPS_BUTTON>;
  58                 };
  59         };
  60 };
  61
  62 &spi0 {
  63         status = "okay";
  64
  65         flash@0 {
  66                 compatible = "jedec,spi-nor";
  67                 reg = <0>;
  68                 spi-max-frequency = <80000000>;
  69                 m25p,fast-read;
  70
  71                 partitions {
  72                         compatible = "fixed-partitions";
  73                         #address-cells = <1>;
  74                         #size-cells = <1>;
  75
  76                         uboot: partition@0 {
  77                                 label = "u-boot";
  78                                 reg = <0x0 0x20000>;
  79                                 read-only;
  80                         };
  81
  82                         partition@20000 {
  83                                 label = "config";
  84                                 reg = <0x20000 0x10000>;
  85                                 read-only;
  86                         };
  87
  88                         factory: partition@30000 {
  89                                 label = "factory";
  90                                 reg = <0x30000 0x10000>;
  91                                 read-only;
  92                         };
  93
  94                         partition@40000 {
  95                                 compatible = "denx,uimage";
  96                                 label = "firmware";
  97                                 reg = <0x40000 0xfc0000>;
  98                         };
  99                 };
 100         };
 101 };
 102
 103 &ethernet {
 104         mtd-mac-address = <&uboot 0x1fc20>;
 105 };
 106
 107 &pcie {
 108         status = "okay";
 109 };
 110
 111 &pcie0 {
 112         wifi@0,0 {
 113                 compatible = "mediatek,mt76";
 114                 reg = <0x0000 0 0 0 0>;
 115                 mediatek,mtd-eeprom = <&factory 0x0000>;
 116                 ieee80211-freq-limit = <2400000 2500000>;
 117         };
 118 };
 119
 120 &pcie1 {
 121         wifi@0,0 {
 122                 compatible = "mediatek,mt76";
 123                 reg = <0x0000 0 0 0 0>;
 124                 mediatek,mtd-eeprom = <&factory 0x8000>;
 125                 ieee80211-freq-limit = <5000000 6000000>;
 126         };
 127 };
 128
 129 &state_default {
 130         gpio {
 131                 ralink,group = "wdt", "jtag", "i2c";
 132                 ralink,function = "gpio";
 133         };
 134 };