target/linux/ramips/dts/mt7628an.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "mediatek,mt7628an-soc";
   5
   6         cpus {
   7                 #address-cells = <1>;
   8                 #size-cells = <0>;
   9
  10                 cpu@0 {
  11                         compatible = "mips,mips24KEc";
  12                         reg = <0>;
  13                 };
  14         };
  15
  16         chosen {
  17                 bootargs = "console=ttyS0,57600";
  18         };
  19
  20         aliases {
  21                 serial0 = &uartlite;
  22         };
  23
  24         cpuintc: cpuintc {
  25                 #address-cells = <0>;
  26                 #interrupt-cells = <1>;
  27                 interrupt-controller;
  28                 compatible = "mti,cpu-interrupt-controller";
  29         };
  30
  31         palmbus: palmbus@10000000 {
  32                 compatible = "palmbus";
  33                 reg = <0x10000000 0x200000>;
  34                 ranges = <0x0 0x10000000 0x1FFFFF>;
  35
  36                 #address-cells = <1>;
  37                 #size-cells = <1>;
  38
  39                 sysc: sysc@0 {
  40                         compatible = "ralink,mt7620a-sysc", "syscon";
  41                         reg = <0x0 0x100>;
  42                 };
  43
  44                 watchdog: watchdog@100 {
  45                         compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt";
  46                         reg = <0x100 0x30>;
  47
  48                         resets = <&rstctrl 8>;
  49                         reset-names = "wdt";
  50
  51                         interrupt-parent = <&intc>;
  52                         interrupts = <24>;
  53                 };
  54
  55                 intc: intc@200 {
  56                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  57                         reg = <0x200 0x100>;
  58
  59                         resets = <&rstctrl 9>;
  60                         reset-names = "intc";
  61
  62                         interrupt-controller;
  63                         #interrupt-cells = <1>;
  64
  65                         interrupt-parent = <&cpuintc>;
  66                         interrupts = <2>;
  67
  68                         ralink,intc-registers = <0x9c 0xa0
  69                                                  0x6c 0xa4
  70                                                  0x80 0x78>;
  71                 };
  72
  73                 memc: memc@300 {
  74                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  75                         reg = <0x300 0x100>;
  76
  77                         resets = <&rstctrl 20>;
  78                         reset-names = "mc";
  79
  80                         interrupt-parent = <&intc>;
  81                         interrupts = <3>;
  82                 };
  83
  84                 gpio: gpio@600 {
  85                         compatible = "mediatek,mt7621-gpio";
  86                         reg = <0x600 0x100>;
  87
  88                         interrupt-parent = <&intc>;
  89                         interrupts = <6>;
  90
  91                         #interrupt-cells = <2>;
  92                         interrupt-controller;
  93
  94                         gpio-controller;
  95                         #gpio-cells = <2>;
  96                 };
  97
  98                 i2c: i2c@900 {
  99                         compatible = "mediatek,mt7621-i2c";
 100                         reg = <0x900 0x100>;
 101
 102                         resets = <&rstctrl 16>;
 103                         reset-names = "i2c";
 104
 105                         #address-cells = <1>;
 106                         #size-cells = <0>;
 107
 108                         status = "disabled";
 109
 110                         pinctrl-names = "default";
 111                         pinctrl-0 = <&i2c_pins>;
 112                 };
 113
 114                 i2s: i2s@a00 {
 115                         compatible = "mediatek,mt7628-i2s";
 116                         reg = <0xa00 0x100>;
 117
 118                         resets = <&rstctrl 17>;
 119                         reset-names = "i2s";
 120
 121                         interrupt-parent = <&intc>;
 122                         interrupts = <10>;
 123
 124                         txdma-req = <2>;
 125                         rxdma-req = <3>;
 126
 127                         dmas = <&gdma 4>,
 128                                 <&gdma 6>;
 129                         dma-names = "tx", "rx";
 130
 131                         status = "disabled";
 132                 };
 133
 134                 spi0: spi@b00 {
 135                         compatible = "ralink,mt7621-spi";
 136                         reg = <0xb00 0x100>;
 137
 138                         resets = <&rstctrl 18>;
 139                         reset-names = "spi";
 140
 141                         #address-cells = <1>;
 142                         #size-cells = <0>;
 143
 144                         pinctrl-names = "default";
 145                         pinctrl-0 = <&spi_pins>;
 146
 147                         status = "disabled";
 148                 };
 149
 150                 uartlite: uartlite@c00 {
 151                         compatible = "ns16550a";
 152                         reg = <0xc00 0x100>;
 153
 154                         reg-shift = <2>;
 155                         reg-io-width = <4>;
 156                         no-loopback-test;
 157
 158                         clock-frequency = <40000000>;
 159
 160                         resets = <&rstctrl 12>;
 161                         reset-names = "uartl";
 162
 163                         interrupt-parent = <&intc>;
 164                         interrupts = <20>;
 165
 166                         pinctrl-names = "default";
 167                         pinctrl-0 = <&uart0_pins>;
 168                 };
 169
 170                 uart1: uart1@d00 {
 171                         compatible = "ns16550a";
 172                         reg = <0xd00 0x100>;
 173
 174                         reg-shift = <2>;
 175                         reg-io-width = <4>;
 176                         no-loopback-test;
 177
 178                         clock-frequency = <40000000>;
 179
 180                         resets = <&rstctrl 19>;
 181                         reset-names = "uart1";
 182
 183                         interrupt-parent = <&intc>;
 184                         interrupts = <21>;
 185
 186                         pinctrl-names = "default";
 187                         pinctrl-0 = <&uart1_pins>;
 188
 189                         status = "disabled";
 190                 };
 191
 192                 uart2: uart2@e00 {
 193                         compatible = "ns16550a";
 194                         reg = <0xe00 0x100>;
 195
 196                         reg-shift = <2>;
 197                         reg-io-width = <4>;
 198                         no-loopback-test;
 199
 200                         clock-frequency = <40000000>;
 201
 202                         resets = <&rstctrl 20>;
 203                         reset-names = "uart2";
 204
 205                         interrupt-parent = <&intc>;
 206                         interrupts = <22>;
 207
 208                         pinctrl-names = "default";
 209                         pinctrl-0 = <&uart2_pins>;
 210
 211                         status = "disabled";
 212                 };
 213
 214                 pwm: pwm@5000 {
 215                         compatible = "mediatek,mt7628-pwm";
 216                         reg = <0x5000 0x1000>;
 217                         #pwm-cells = <2>;
 218
 219                         resets = <&rstctrl 31>;
 220                         reset-names = "pwm";
 221
 222                         pinctrl-names = "default";
 223                         pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
 224
 225                         status = "disabled";
 226                 };
 227
 228                 pcm: pcm@2000 {
 229                         compatible = "ralink,mt7620a-pcm";
 230                         reg = <0x2000 0x800>;
 231
 232                         resets = <&rstctrl 11>;
 233                         reset-names = "pcm";
 234
 235                         interrupt-parent = <&intc>;
 236                         interrupts = <4>;
 237
 238                         status = "disabled";
 239                 };
 240
 241                 gdma: gdma@2800 {
 242                         compatible = "ralink,rt3883-gdma";
 243                         reg = <0x2800 0x800>;
 244
 245                         resets = <&rstctrl 14>;
 246                         reset-names = "dma";
 247
 248                         interrupt-parent = <&intc>;
 249                         interrupts = <7>;
 250
 251                         #dma-cells = <1>;
 252                         #dma-channels = <16>;
 253                         #dma-requests = <16>;
 254
 255                         status = "disabled";
 256                 };
 257         };
 258
 259         pinctrl: pinctrl {
 260                 compatible = "ralink,rt2880-pinmux";
 261                 pinctrl-names = "default";
 262                 pinctrl-0 = <&state_default>;
 263
 264                 state_default: pinctrl0 {
 265                 };
 266
 267                 spi_pins: spi_pins {
 268                         spi_pins {
 269                                 groups = "spi";
 270                                 function = "spi";
 271                         };
 272                 };
 273
 274                 spi_cs1_pins: spi_cs1 {
 275                         spi_cs1 {
 276                                 groups = "spi cs1";
 277                                 function = "spi cs1";
 278                         };
 279                 };
 280
 281                 i2c_pins: i2c_pins {
 282                         i2c_pins {
 283                                 groups = "i2c";
 284                                 function = "i2c";
 285                         };
 286                 };
 287
 288                 i2s_pins: i2s {
 289                         i2s {
 290                                 groups = "i2s";
 291                                 function = "i2s";
 292                         };
 293                 };
 294
 295                 uart0_pins: uartlite {
 296                         uartlite {
 297                                 groups = "uart0";
 298                                 function = "uart0";
 299                         };
 300                 };
 301
 302                 uart1_pins: uart1 {
 303                         uart1 {
 304                                 groups = "uart1";
 305                                 function = "uart1";
 306                         };
 307                 };
 308
 309                 uart2_pins: uart2 {
 310                         uart2 {
 311                                 groups = "uart2";
 312                                 function = "uart2";
 313                         };
 314                 };
 315
 316                 sdxc_pins: sdxc {
 317                         sdxc {
 318                                 groups = "sdmode";
 319                                 function = "sdxc";
 320                         };
 321                 };
 322
 323                 pwm0_pins: pwm0 {
 324                         pwm0 {
 325                                 groups = "pwm0";
 326                                 function = "pwm0";
 327                         };
 328                 };
 329
 330                 pwm1_pins: pwm1 {
 331                         pwm1 {
 332                                 groups = "pwm1";
 333                                 function = "pwm1";
 334                         };
 335                 };
 336
 337                 pcm_i2s_pins: pcm_i2s {
 338                         pcm_i2s {
 339                                 groups = "i2s";
 340                                 function = "pcm";
 341                         };
 342                 };
 343
 344                 refclk_pins: refclk {
 345                         refclk {
 346                                 groups = "refclk";
 347                                 function = "refclk";
 348                         };
 349                 };
 350         };
 351
 352         rstctrl: rstctrl {
 353                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 354                 #reset-cells = <1>;
 355         };
 356
 357         clkctrl: clkctrl {
 358                 compatible = "ralink,rt2880-clock";
 359                 #clock-cells = <1>;
 360         };
 361
 362         usbphy: usbphy@10120000 {
 363                 compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
 364                 reg = <0x10120000 0x1000>;
 365                 #phy-cells = <0>;
 366
 367                 ralink,sysctl = <&sysc>;
 368                 resets = <&rstctrl 22 &rstctrl 25>;
 369                 reset-names = "host", "device";
 370                 clocks = <&clkctrl 22 &clkctrl 25>;
 371                 clock-names = "host", "device";
 372         };
 373
 374         sdhci: sdhci@10130000 {
 375                 compatible = "ralink,mt7620-sdhci";
 376                 reg = <0x10130000 0x4000>;
 377
 378                 interrupt-parent = <&intc>;
 379                 interrupts = <14>;
 380
 381                 pinctrl-names = "default";
 382                 pinctrl-0 = <&sdxc_pins>;
 383
 384                 status = "disabled";
 385         };
 386
 387         ehci: ehci@101c0000 {
 388                 #address-cells = <1>;
 389                 #size-cells = <0>;
 390                 compatible = "generic-ehci";
 391                 reg = <0x101c0000 0x1000>;
 392
 393                 phys = <&usbphy>;
 394                 phy-names = "usb";
 395
 396                 interrupt-parent = <&intc>;
 397                 interrupts = <18>;
 398
 399                 ehci_port1: port@1 {
 400                         reg = <1>;
 401                         #trigger-source-cells = <0>;
 402                 };
 403         };
 404
 405         ohci: ohci@101c1000 {
 406                 #address-cells = <1>;
 407                 #size-cells = <0>;
 408                 compatible = "generic-ohci";
 409                 reg = <0x101c1000 0x1000>;
 410
 411                 phys = <&usbphy>;
 412                 phy-names = "usb";
 413
 414                 interrupt-parent = <&intc>;
 415                 interrupts = <18>;
 416
 417                 ohci_port1: port@1 {
 418                         reg = <1>;
 419                         #trigger-source-cells = <0>;
 420                 };
 421         };
 422
 423         ethernet: ethernet@10100000 {
 424                 compatible = "ralink,rt5350-eth";
 425                 reg = <0x10100000 0x10000>;
 426
 427                 interrupt-parent = <&cpuintc>;
 428                 interrupts = <5>;
 429
 430                 resets = <&rstctrl 21 &rstctrl 23>;
 431                 reset-names = "fe", "esw";
 432
 433                 mediatek,switch = <&esw>;
 434         };
 435
 436         esw: esw@10110000 {
 437                 compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
 438                 reg = <0x10110000 0x8000>;
 439
 440                 resets = <&rstctrl 23>;
 441                 reset-names = "esw";
 442
 443                 interrupt-parent = <&intc>;
 444                 interrupts = <17>;
 445         };
 446
 447         pcie: pcie@10140000 {
 448                 compatible = "mediatek,mt7620-pci";
 449                 reg = <0x10140000 0x100
 450                         0x10142000 0x100>;
 451
 452                 #address-cells = <3>;
 453                 #size-cells = <2>;
 454
 455                 interrupt-parent = <&cpuintc>;
 456                 interrupts = <4>;
 457
 458                 resets = <&rstctrl 26 &rstctrl 27>;
 459                 reset-names = "pcie0", "pcie1";
 460                 clocks = <&clkctrl 26 &clkctrl 27>;
 461                 clock-names = "pcie0", "pcie1";
 462
 463                 status = "disabled";
 464
 465                 device_type = "pci";
 466
 467                 bus-range = <0 255>;
 468                 ranges = <
 469                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 470                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 471                 >;
 472
 473                 pcie0: pcie@0,0 {
 474                         reg = <0x0000 0 0 0 0>;
 475
 476                         #address-cells = <3>;
 477                         #size-cells = <2>;
 478
 479                         device_type = "pci";
 480
 481                         ranges;
 482                 };
 483         };
 484
 485         wmac: wmac@10300000 {
 486                 compatible = "mediatek,mt7628-wmac";
 487                 reg = <0x10300000 0x100000>;
 488
 489                 interrupt-parent = <&cpuintc>;
 490                 interrupts = <6>;
 491
 492                 status = "disabled";
 493
 494                 mediatek,mtd-eeprom = <&factory 0x0000>;
 495         };
 496 };