target/linux/ramips/dts/mt7628an.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,mtk7628an-soc";
   5
   6         cpus {
   7                 cpu@0 {
   8                         compatible = "mips,mips24KEc";
   9                 };
  10         };
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,57600";
  14         };
  15
  16         aliases {
  17                 serial0 = &uartlite;
  18         };
  19
  20         cpuintc: cpuintc@0 {
  21                 #address-cells = <0>;
  22                 #interrupt-cells = <1>;
  23                 interrupt-controller;
  24                 compatible = "mti,cpu-interrupt-controller";
  25         };
  26
  27         palmbus: palmbus@10000000 {
  28                 compatible = "palmbus";
  29                 reg = <0x10000000 0x200000>;
  30                 ranges = <0x0 0x10000000 0x1FFFFF>;
  31
  32                 #address-cells = <1>;
  33                 #size-cells = <1>;
  34
  35                 sysc: sysc@0 {
  36                         compatible = "ralink,mt7620a-sysc";
  37                         reg = <0x0 0x100>;
  38                 };
  39
  40                 watchdog: watchdog@120 {
  41                         compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
  42                         reg = <0x120 0x10>;
  43
  44                         resets = <&rstctrl 8>;
  45                         reset-names = "wdt";
  46
  47                         interrupt-parent = <&intc>;
  48                         interrupts = <24>;
  49                 };
  50
  51                 intc: intc@200 {
  52                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  53                         reg = <0x200 0x100>;
  54
  55                         resets = <&rstctrl 9>;
  56                         reset-names = "intc";
  57
  58                         interrupt-controller;
  59                         #interrupt-cells = <1>;
  60
  61                         interrupt-parent = <&cpuintc>;
  62                         interrupts = <2>;
  63
  64                         ralink,intc-registers = <0x9c 0xa0
  65                                                  0x6c 0xa4
  66                                                  0x80 0x78>;
  67                 };
  68
  69                 memc: memc@300 {
  70                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  71                         reg = <0x300 0x100>;
  72
  73                         resets = <&rstctrl 20>;
  74                         reset-names = "mc";
  75
  76                         interrupt-parent = <&intc>;
  77                         interrupts = <3>;
  78                 };
  79
  80                 gpio@600 {
  81                         #address-cells = <1>;
  82                         #size-cells = <0>;
  83
  84                         compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
  85                         reg = <0x600 0x100>;
  86
  87                         interrupt-parent = <&intc>;
  88                         interrupts = <6>;
  89
  90                         gpio0: bank@0 {
  91                                 reg = <0>;
  92                                 compatible = "mtk,mt7621-gpio-bank";
  93                                 gpio-controller;
  94                                 #gpio-cells = <2>;
  95                         };
  96
  97                         gpio1: bank@1 {
  98                                 reg = <1>;
  99                                 compatible = "mtk,mt7621-gpio-bank";
 100                                 gpio-controller;
 101                                 #gpio-cells = <2>;
 102                         };
 103
 104                         gpio2: bank@2 {
 105                                 reg = <2>;
 106                                 compatible = "mtk,mt7621-gpio-bank";
 107                                 gpio-controller;
 108                                 #gpio-cells = <2>;
 109                         };
 110                 };
 111
 112                 i2c: i2c@900 {
 113                         compatible = "mediatek,mt7628-i2c";
 114                         reg = <0x900 0x100>;
 115
 116                         resets = <&rstctrl 16>;
 117                         reset-names = "i2c";
 118
 119                         #address-cells = <1>;
 120                         #size-cells = <0>;
 121
 122                         status = "disabled";
 123
 124                         pinctrl-names = "default";
 125                         pinctrl-0 = <&i2c_pins>;
 126                 };
 127
 128                 i2s: i2s@a00 {
 129                         compatible = "ralink,mt7620a-i2s";
 130                         reg = <0xa00 0x100>;
 131
 132                         resets = <&rstctrl 17>;
 133                         reset-names = "i2s";
 134
 135                         interrupt-parent = <&intc>;
 136                         interrupts = <10>;
 137
 138                         dmas = <&gdma 2>,
 139                                 <&gdma 3>;
 140                         dma-names = "tx", "rx";
 141
 142                         status = "disabled";
 143                 };
 144
 145                 spi0: spi@b00 {
 146                         compatible = "ralink,mt7621-spi";
 147                         reg = <0xb00 0x100>;
 148
 149                         resets = <&rstctrl 18>;
 150                         reset-names = "spi";
 151
 152                         #address-cells = <1>;
 153                         #size-cells = <0>;
 154
 155                         pinctrl-names = "default";
 156                         pinctrl-0 = <&spi_pins>;
 157
 158                         status = "disabled";
 159                 };
 160
 161                 uartlite: uartlite@c00 {
 162                         compatible = "ns16550a";
 163                         reg = <0xc00 0x100>;
 164
 165                         reg-shift = <2>;
 166                         reg-io-width = <4>;
 167                         no-loopback-test;
 168
 169                         clock-frequency = <40000000>;
 170
 171                         resets = <&rstctrl 12>;
 172                         reset-names = "uartl";
 173
 174                         interrupt-parent = <&intc>;
 175                         interrupts = <20>;
 176
 177                         pinctrl-names = "default";
 178                         pinctrl-0 = <&uart0_pins>;
 179                 };
 180
 181                 uart1: uart1@d00 {
 182                         compatible = "ns16550a";
 183                         reg = <0xd00 0x100>;
 184
 185                         reg-shift = <2>;
 186                         reg-io-width = <4>;
 187                         no-loopback-test;
 188
 189                         clock-frequency = <40000000>;
 190
 191                         resets = <&rstctrl 19>;
 192                         reset-names = "uart1";
 193
 194                         interrupt-parent = <&intc>;
 195                         interrupts = <21>;
 196
 197                         pinctrl-names = "default";
 198                         pinctrl-0 = <&uart1_pins>;
 199
 200                         status = "disabled";
 201                 };
 202
 203                 uart2: uart2@e00 {
 204                         compatible = "ns16550a";
 205                         reg = <0xe00 0x100>;
 206
 207                         reg-shift = <2>;
 208                         reg-io-width = <4>;
 209                         no-loopback-test;
 210
 211                         clock-frequency = <40000000>;
 212
 213                         resets = <&rstctrl 20>;
 214                         reset-names = "uart2";
 215
 216                         interrupt-parent = <&intc>;
 217                         interrupts = <22>;
 218
 219                         pinctrl-names = "default";
 220                         pinctrl-0 = <&uart2_pins>;
 221
 222                         status = "disabled";
 223                 };
 224
 225                 pwm: pwm@5000 {
 226                         compatible = "mediatek,mt7628-pwm";
 227                         reg = <0x5000 0x1000>;
 228
 229                         resets = <&rstctrl 31>;
 230                         reset-names = "pwm";
 231
 232                         pinctrl-names = "default";
 233                         pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
 234
 235                         status = "disabled";
 236                 };
 237
 238                 pcm: pcm@2000 {
 239                         compatible = "ralink,mt7620a-pcm";
 240                         reg = <0x2000 0x800>;
 241
 242                         resets = <&rstctrl 11>;
 243                         reset-names = "pcm";
 244
 245                         interrupt-parent = <&intc>;
 246                         interrupts = <4>;
 247
 248                         status = "disabled";
 249                 };
 250
 251                 gdma: gdma@2800 {
 252                         compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
 253                         reg = <0x2800 0x800>;
 254
 255                         resets = <&rstctrl 14>;
 256                         reset-names = "dma";
 257
 258                         interrupt-parent = <&intc>;
 259                         interrupts = <7>;
 260
 261                         #dma-cells = <1>;
 262                         #dma-channels = <16>;
 263                         #dma-requests = <16>;
 264
 265                         status = "disabled";
 266                 };
 267         };
 268
 269         pinctrl: pinctrl {
 270                 compatible = "ralink,rt2880-pinmux";
 271                 pinctrl-names = "default";
 272                 pinctrl-0 = <&state_default>;
 273
 274                 state_default: pinctrl0 {
 275                 };
 276
 277                 spi_pins: spi {
 278                         spi {
 279                                 ralink,group = "spi";
 280                                 ralink,function = "spi";
 281                         };
 282                 };
 283
 284                 spi_cs1_pins: spi_cs1 {
 285                         spi_cs1 {
 286                                 ralink,group = "spi cs1";
 287                                 ralink,function = "spi cs1";
 288                         };
 289                 };
 290
 291                 i2c_pins: i2c {
 292                         i2c {
 293                                 ralink,group = "i2c";
 294                                 ralink,function = "i2c";
 295                         };
 296                 };
 297
 298                 uart0_pins: uartlite {
 299                         uartlite {
 300                                 ralink,group = "uart0";
 301                                 ralink,function = "uart0";
 302                         };
 303                 };
 304
 305                 uart1_pins: uart1 {
 306                         uart1 {
 307                                 ralink,group = "uart1";
 308                                 ralink,function = "uart1";
 309                         };
 310                 };
 311
 312                 uart2_pins: uart2 {
 313                         uart2 {
 314                                 ralink,group = "uart2";
 315                                 ralink,function = "uart2";
 316                         };
 317                 };
 318
 319                 sdxc_pins: sdxc {
 320                         sdxc {
 321                                 ralink,group = "sdmode";
 322                                 ralink,function = "sdxc";
 323                         };
 324                 };
 325
 326                 pwm0_pins: pwm0 {
 327                         pwm0 {
 328                                 ralink,group = "pwm0";
 329                                 ralink,function = "pwm0";
 330                         };
 331                 };
 332
 333                 pwm1_pins: pwm1 {
 334                         pwm1 {
 335                                 ralink,group = "pwm1";
 336                                 ralink,function = "pwm1";
 337                         };
 338                 };
 339
 340                 pcm_i2s_pins: i2s {
 341                         i2s {
 342                                 ralink,group = "i2s";
 343                                 ralink,function = "pcm";
 344                         };
 345                 };
 346         };
 347
 348         rstctrl: rstctrl {
 349                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 350                 #reset-cells = <1>;
 351         };
 352
 353         clkctrl: clkctrl {
 354                 compatible = "ralink,rt2880-clock";
 355                 #clock-cells = <1>;
 356         };
 357
 358         usbphy: usbphy@10120000 {
 359                 compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy";
 360                 reg = <0x10120000 0x4000>;
 361                 #phy-cells = <1>;
 362
 363                 resets = <&rstctrl 22 &rstctrl 25>;
 364                 reset-names = "host", "device";
 365                 clocks = <&clkctrl 22 &clkctrl 25>;
 366                 clock-names = "host", "device";
 367         };
 368
 369         sdhci: sdhci@10130000 {
 370                 compatible = "ralink,mt7620-sdhci";
 371                 reg = <0x10130000 0x4000>;
 372
 373                 interrupt-parent = <&intc>;
 374                 interrupts = <14>;
 375
 376                 pinctrl-names = "default";
 377                 pinctrl-0 = <&sdxc_pins>;
 378
 379                 status = "disabled";
 380         };
 381
 382         ehci: ehci@101c0000 {
 383                 compatible = "generic-ehci";
 384                 reg = <0x101c0000 0x1000>;
 385
 386                 phys = <&usbphy 1>;
 387                 phy-names = "usb";
 388
 389                 interrupt-parent = <&intc>;
 390                 interrupts = <18>;
 391         };
 392
 393         ohci: ohci@101c1000 {
 394                 compatible = "generic-ohci";
 395                 reg = <0x101c1000 0x1000>;
 396
 397                 phys = <&usbphy 1>;
 398                 phy-names = "usb";
 399
 400                 interrupt-parent = <&intc>;
 401                 interrupts = <18>;
 402         };
 403
 404         ethernet: ethernet@10100000 {
 405                 compatible = "ralink,rt5350-eth";
 406                 reg = <0x10100000 0x10000>;
 407
 408                 interrupt-parent = <&cpuintc>;
 409                 interrupts = <5>;
 410
 411                 resets = <&rstctrl 21 &rstctrl 23>;
 412                 reset-names = "fe", "esw";
 413
 414                 mediatek,switch = <&esw>;
 415         };
 416
 417         esw: esw@10110000 {
 418                 compatible = "ralink,rt3050-esw";
 419                 reg = <0x10110000 0x8000>;
 420
 421                 resets = <&rstctrl 23>;
 422                 reset-names = "esw";
 423
 424                 interrupt-parent = <&intc>;
 425                 interrupts = <17>;
 426         };
 427
 428         pcie: pcie@10140000 {
 429                 compatible = "mediatek,mt7620-pci";
 430                 reg = <0x10140000 0x100
 431                         0x10142000 0x100>;
 432
 433                 #address-cells = <3>;
 434                 #size-cells = <2>;
 435
 436                 interrupt-parent = <&cpuintc>;
 437                 interrupts = <4>;
 438
 439                 resets = <&rstctrl 26 &rstctrl 27>;
 440                 reset-names = "pcie0", "pcie1";
 441                 clocks = <&clkctrl 26 &clkctrl 27>;
 442                 clock-names = "pcie0", "pcie1";
 443
 444                 status = "disabled";
 445
 446                 device_type = "pci";
 447
 448                 bus-range = <0 255>;
 449                 ranges = <
 450                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 451                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 452                 >;
 453
 454                 pcie-bridge {
 455                         reg = <0x0000 0 0 0 0>;
 456
 457                         #address-cells = <3>;
 458                         #size-cells = <2>;
 459
 460                         device_type = "pci";
 461                 };
 462         };
 463
 464         wmac: wmac@10300000 {
 465                 compatible = "mediatek,mt7628-wmac";
 466                 reg = <0x10300000 0x100000>;
 467
 468                 interrupt-parent = <&cpuintc>;
 469                 interrupts = <6>;
 470
 471                 status = "disabled";
 472
 473                 mediatek,mtd-eeprom = <&factory 0x0000>;
 474                 mediatek,5ghz = <0>;
 475         };
 476 };