ramips: move compatible for Ubiquiti Edgerouter X to DTS file
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / rt2880.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt2880-soc";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 cpu@0 {
11 compatible = "mips,mips24KEc";
12 reg = <0>;
13 };
14 };
15
16 chosen {
17 bootargs = "console=ttyS0,57600";
18 };
19
20 aliases {
21 serial0 = &uartlite;
22 };
23
24 cpuintc: cpuintc {
25 #address-cells = <0>;
26 #interrupt-cells = <1>;
27 interrupt-controller;
28 compatible = "mti,cpu-interrupt-controller";
29 };
30
31 palmbus: palmbus@300000 {
32 compatible = "palmbus";
33 reg = <0x300000 0x200000>;
34 ranges = <0x0 0x300000 0x1FFFFF>;
35
36 #address-cells = <1>;
37 #size-cells = <1>;
38
39 sysc: sysc@0 {
40 compatible = "ralink,rt2880-sysc";
41 reg = <0x000 0x100>;
42 };
43
44 timer: timer@100 {
45 compatible = "ralink,rt2880-timer";
46 reg = <0x100 0x20>;
47
48 interrupt-parent = <&intc>;
49 interrupts = <1>;
50
51 status = "disabled";
52 };
53
54 watchdog: watchdog@120 {
55 compatible = "ralink,rt2880-wdt";
56 reg = <0x120 0x10>;
57 };
58
59 intc: intc@200 {
60 compatible = "ralink,rt2880-intc";
61 reg = <0x200 0x100>;
62
63 interrupt-controller;
64 #interrupt-cells = <1>;
65
66 interrupt-parent = <&cpuintc>;
67 interrupts = <2>;
68 };
69
70 memc: memc@300 {
71 compatible = "ralink,rt2880-memc";
72 reg = <0x300 0x100>;
73 };
74
75 gpio0: gpio@600 {
76 compatible = "ralink,rt2880-gpio";
77 reg = <0x600 0x34>;
78
79 gpio-controller;
80 #gpio-cells = <2>;
81
82 ralink,gpio-base = <0>;
83 ralink,nr-gpio = <24>;
84 ralink,register-map = [ 00 04 08 0c
85 20 24 28 2c
86 30 34 ];
87 };
88
89 gpio1: gpio@638 {
90 compatible = "ralink,rt2880-gpio";
91 reg = <0x638 0x24>;
92
93 gpio-controller;
94 #gpio-cells = <2>;
95
96 ralink,gpio-base = <24>;
97 ralink,nr-gpio = <16>;
98 ralink,register-map = [ 00 04 08 0c
99 10 14 18 1c
100 20 24 ];
101
102 status = "disabled";
103 };
104
105 gpio2: gpio@660 {
106 compatible = "ralink,rt2880-gpio";
107 reg = <0x660 0x24>;
108
109 gpio-controller;
110 #gpio-cells = <2>;
111
112 ralink,gpio-base = <40>;
113 ralink,nr-gpio = <32>;
114 ralink,register-map = [ 00 04 08 0c
115 10 14 18 1c
116 20 24 ];
117
118 status = "disabled";
119 };
120
121 i2c: i2c@900 {
122 compatible = "ralink,rt2880-i2c";
123 reg = <0x900 0x100>;
124
125 resets = <&rstctrl 9>;
126 reset-names = "i2c";
127
128 #address-cells = <1>;
129 #size-cells = <0>;
130
131 status = "disabled";
132
133 pinctrl-names = "default";
134 pinctrl-0 = <&i2c_pins>;
135 };
136
137 uartlite: uartlite@c00 {
138 compatible = "ralink,rt2880-uart", "ns16550a";
139 reg = <0xc00 0x100>;
140
141 interrupt-parent = <&intc>;
142 interrupts = <8>;
143
144 reg-shift = <2>;
145 };
146 };
147
148 pinctrl: pinctrl {
149 compatible = "ralink,rt2880-pinmux";
150
151 pinctrl-names = "default";
152 pinctrl-0 = <&state_default>;
153
154 state_default: pinctrl0 {
155 sdram {
156 ralink,group = "sdram";
157 ralink,function = "sdram";
158 };
159 };
160
161 i2c_pins: i2c_pins {
162 i2c_pins {
163 ralink,group = "i2c";
164 ralink,function = "i2c";
165 };
166 };
167
168 spi_pins: spi_pins {
169 spi_pins {
170 ralink,group = "spi";
171 ralink,function = "spi";
172 };
173 };
174
175 uartlite_pins: uartlite {
176 uart {
177 ralink,group = "uartlite";
178 ralink,function = "uartlite";
179 };
180 };
181 };
182
183 rstctrl: rstctrl {
184 compatible = "ralink,rt2880-reset";
185 #reset-cells = <1>;
186 };
187
188 clkctrl: clkctrl {
189 compatible = "ralink,rt2880-clock";
190 #clock-cells = <1>;
191 };
192
193 pci: pci@440000 {
194 compatible = "ralink,rt288x-pci";
195 reg = <0x00440000 0x20000>;
196 #address-cells = <3>;
197 #size-cells = <2>;
198 status = "disabled";
199 };
200
201 ethernet: ethernet@400000 {
202 compatible = "ralink,rt2880-eth";
203 reg = <0x00400000 0x10000>;
204
205 #address-cells = <1>;
206 #size-cells = <0>;
207
208 resets = <&rstctrl 18>;
209 reset-names = "fe";
210
211 interrupt-parent = <&cpuintc>;
212 interrupts = <5>;
213
214 status = "disabled";
215
216 port@0 {
217 compatible = "ralink,rt2880-port", "mediatek,eth-port";
218 reg = <0>;
219 };
220
221 mdio-bus {
222 #address-cells = <1>;
223 #size-cells = <0>;
224
225 status = "disabled";
226 };
227 };
228
229 wmac: wmac@480000 {
230 compatible = "ralink,rt2880-wmac";
231 reg = <0x480000 0x40000>;
232
233 interrupt-parent = <&cpuintc>;
234 interrupts = <6>;
235
236 ralink,eeprom = "soc_wmac.eeprom";
237 };
238 };