target/linux/ramips/patches-3.8/0009-MIPS-ralink-adds-rt305x-devicetree.patch

   1 From 5644da4f635a30fc03b4f12d81b2197d716d9cef Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Tue, 22 Jan 2013 20:19:33 +0100
   4 Subject: [PATCH 09/14] MIPS: ralink: adds rt305x devicetree
   5
   6 This adds the devicetree file that describes the rt305x evaluation kit.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  10 Patchwork: http://patchwork.linux-mips.org/patch/4898/
  11 ---
  12  arch/mips/ralink/dts/rt3050.dtsi     |   96 ++++++++++++++++++++++++++++++++++
  13  arch/mips/ralink/dts/rt3052_eval.dts |   52 ++++++++++++++++++
  14  2 files changed, 148 insertions(+)
  15  create mode 100644 arch/mips/ralink/dts/rt3050.dtsi
  16  create mode 100644 arch/mips/ralink/dts/rt3052_eval.dts
  17
  18 --- /dev/null
  19 +++ b/arch/mips/ralink/dts/rt3050.dtsi
  20 @@ -0,0 +1,96 @@
  21 +/ {
  22 +       #address-cells = <1>;
  23 +       #size-cells = <1>;
  24 +       compatible = "ralink,rt3050-soc", "ralink,rt3052-soc";
  25 +
  26 +       cpus {
  27 +               cpu@0 {
  28 +                       compatible = "mips,mips24KEc";
  29 +               };
  30 +       };
  31 +
  32 +       chosen {
  33 +               bootargs = "console=ttyS0,57600 init=/init";
  34 +       };
  35 +
  36 +       palmbus@10000000 {
  37 +               compatible = "palmbus";
  38 +               reg = <0x10000000 0x200000>;
  39 +                ranges = <0x0 0x10000000 0x1FFFFF>;
  40 +
  41 +               #address-cells = <1>;
  42 +               #size-cells = <1>;
  43 +
  44 +               sysc@0 {
  45 +                       compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc";
  46 +                       reg = <0x0 0x100>;
  47 +               };
  48 +
  49 +               timer@100 {
  50 +                       compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt";
  51 +                       reg = <0x100 0x100>;
  52 +               };
  53 +
  54 +               intc: intc@200 {
  55 +                       compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
  56 +                       reg = <0x200 0x100>;
  57 +
  58 +                       interrupt-controller;
  59 +                       #interrupt-cells = <1>;
  60 +               };
  61 +
  62 +               memc@300 {
  63 +                       compatible = "ralink,rt3052-memc", "ralink,rt3050-memc";
  64 +                       reg = <0x300 0x100>;
  65 +               };
  66 +
  67 +               gpio0: gpio@600 {
  68 +                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
  69 +                       reg = <0x600 0x34>;
  70 +
  71 +                       gpio-controller;
  72 +                       #gpio-cells = <2>;
  73 +
  74 +                       ralink,ngpio = <24>;
  75 +                       ralink,regs = [ 00 04 08 0c
  76 +                                       20 24 28 2c
  77 +                                       30 34 ];
  78 +               };
  79 +
  80 +               gpio1: gpio@638 {
  81 +                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
  82 +                       reg = <0x638 0x24>;
  83 +
  84 +                       gpio-controller;
  85 +                       #gpio-cells = <2>;
  86 +
  87 +                       ralink,ngpio = <16>;
  88 +                       ralink,regs = [ 00 04 08 0c
  89 +                                       10 14 18 1c
  90 +                                       20 24 ];
  91 +               };
  92 +
  93 +               gpio2: gpio@660 {
  94 +                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
  95 +                       reg = <0x660 0x24>;
  96 +
  97 +                       gpio-controller;
  98 +                       #gpio-cells = <2>;
  99 +
 100 +                       ralink,ngpio = <12>;
 101 +                       ralink,regs = [ 00 04 08 0c
 102 +                                       10 14 18 1c
 103 +                                       20 24 ];
 104 +               };
 105 +
 106 +               uartlite@c00 {
 107 +                       compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
 108 +                       reg = <0xc00 0x100>;
 109 +
 110 +                       interrupt-parent = <&intc>;
 111 +                       interrupts = <12>;
 112 +
 113 +                       reg-shift = <2>;
 114 +               };
 115 +       };
 116 +};
 117 --- /dev/null
 118 +++ b/arch/mips/ralink/dts/rt3052_eval.dts
 119 @@ -0,0 +1,52 @@
 120 +/dts-v1/;
 121 +
 122 +/include/ "rt3050.dtsi"
 123 +
 124 +/ {
 125 +       #address-cells = <1>;
 126 +       #size-cells = <1>;
 127 +       compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc";
 128 +       model = "Ralink RT3052 evaluation board";
 129 +
 130 +       memory@0 {
 131 +               reg = <0x0 0x2000000>;
 132 +       };
 133 +
 134 +       palmbus@10000000 {
 135 +               sysc@0 {
 136 +                       ralink,pinmux = "uartlite", "spi";
 137 +                       ralink,uartmux = "gpio";
 138 +                       ralink,wdtmux = <0>;
 139 +               };
 140 +       };
 141 +
 142 +       cfi@1f000000 {
 143 +               compatible = "cfi-flash";
 144 +               reg = <0x1f000000 0x800000>;
 145 +
 146 +               bank-width = <2>;
 147 +               device-width = <2>;
 148 +               #address-cells = <1>;
 149 +               #size-cells = <1>;
 150 +
 151 +               partition@0 {
 152 +                       label = "uboot";
 153 +                       reg = <0x0 0x30000>;
 154 +                       read-only;
 155 +               };
 156 +               partition@30000 {
 157 +                       label = "uboot-env";
 158 +                       reg = <0x30000 0x10000>;
 159 +                       read-only;
 160 +               };
 161 +               partition@40000 {
 162 +                       label = "calibration";
 163 +                       reg = <0x40000 0x10000>;
 164 +                       read-only;
 165 +               };
 166 +               partition@50000 {
 167 +                       label = "linux";
 168 +                       reg = <0x50000 0x7b0000>;
 169 +               };
 170 +       };
 171 +};