add patches for v3.8
[openwrt/staging/wigyori.git] / target / linux / ramips / patches-3.8 / 0110-MIPS-add-rt3883-dts-files.patch
1 From 9d13fedc08f4e2cd9640983c2af8b9e9c64c094b Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 21 Mar 2013 18:37:00 +0100
4 Subject: [PATCH 110/121] MIPS: add rt3883 dts files
5
6 Add a dtsi file for RT3883 SoC. This SoC is almost the same as RT3050 but has
7 OHCI/EHCI in favour of the Synopsis DWC2 core. There is also a 3x3 802.11n
8 wifi core.
9
10 Signed-off-by: John Crispin <blogic@openwrt.org>
11 ---
12 arch/mips/ralink/Kconfig | 4 +
13 arch/mips/ralink/dts/Makefile | 1 +
14 arch/mips/ralink/dts/rt3883.dtsi | 186 ++++++++++++++++++++++++++++++++++
15 arch/mips/ralink/dts/rt3883_eval.dts | 52 ++++++++++
16 4 files changed, 243 insertions(+)
17 create mode 100644 arch/mips/ralink/dts/rt3883.dtsi
18 create mode 100644 arch/mips/ralink/dts/rt3883_eval.dts
19
20 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
21 index f21cbaa..2ef69ee 100644
22 --- a/arch/mips/ralink/Kconfig
23 +++ b/arch/mips/ralink/Kconfig
24 @@ -39,6 +39,10 @@ choice
25 bool "RT305x eval kit"
26 depends on SOC_RT305X
27
28 + config DTB_RT3883_EVAL
29 + bool "RT3883 eval kit"
30 + depends on SOC_RT3883
31 +
32 endchoice
33
34 endif
35 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
36 index f635a01..040a986 100644
37 --- a/arch/mips/ralink/dts/Makefile
38 +++ b/arch/mips/ralink/dts/Makefile
39 @@ -1,2 +1,3 @@
40 obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
41 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
42 +obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
43 diff --git a/arch/mips/ralink/dts/rt3883.dtsi b/arch/mips/ralink/dts/rt3883.dtsi
44 new file mode 100644
45 index 0000000..1e80ad3
46 --- /dev/null
47 +++ b/arch/mips/ralink/dts/rt3883.dtsi
48 @@ -0,0 +1,186 @@
49 +/ {
50 + #address-cells = <1>;
51 + #size-cells = <1>;
52 + compatible = "ralink,rt3883-soc";
53 +
54 + cpus {
55 + cpu@0 {
56 + compatible = "mips,mips74Kc";
57 + };
58 + };
59 +
60 + chosen {
61 + bootargs = "console=ttyS0,57600 init=/init";
62 + };
63 +
64 + cpuintc: cpuintc@0 {
65 + #address-cells = <0>;
66 + #interrupt-cells = <1>;
67 + interrupt-controller;
68 + compatible = "mti,cpu-interrupt-controller";
69 + };
70 +
71 + palmbus@10000000 {
72 + compatible = "palmbus";
73 + reg = <0x10000000 0x200000>;
74 + ranges = <0x0 0x10000000 0x1FFFFF>;
75 +
76 + #address-cells = <1>;
77 + #size-cells = <1>;
78 +
79 + sysc@0 {
80 + compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
81 + reg = <0x0 0x100>;
82 + };
83 +
84 + timer@100 {
85 + compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
86 + reg = <0x100 0x20>;
87 +
88 + interrupt-parent = <&intc>;
89 + interrupts = <1>;
90 +
91 + status = "disabled";
92 + };
93 +
94 + watchdog@120 {
95 + compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
96 + reg = <0x120 0x10>;
97 + };
98 +
99 + intc: intc@200 {
100 + compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
101 + reg = <0x200 0x100>;
102 +
103 + interrupt-controller;
104 + #interrupt-cells = <1>;
105 +
106 + interrupt-parent = <&cpuintc>;
107 + interrupts = <2>;
108 + };
109 +
110 + memc@300 {
111 + compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
112 + reg = <0x300 0x100>;
113 + };
114 +
115 + gpio0: gpio@600 {
116 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
117 + reg = <0x600 0x34>;
118 +
119 + gpio-controller;
120 + #gpio-cells = <2>;
121 +
122 + ralink,num-gpios = <24>;
123 + ralink,register-map = [ 00 04 08 0c
124 + 20 24 28 2c
125 + 30 34 ];
126 +
127 + status = "disabled";
128 + };
129 +
130 + gpio1: gpio@638 {
131 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
132 + reg = <0x638 0x24>;
133 +
134 + gpio-controller;
135 + #gpio-cells = <2>;
136 +
137 + ralink,num-gpios = <16>;
138 + ralink,register-map = [ 00 04 08 0c
139 + 10 14 18 1c
140 + 20 24 ];
141 +
142 + status = "disabled";
143 + };
144 +
145 + gpio2: gpio@660 {
146 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
147 + reg = <0x660 0x24>;
148 +
149 + gpio-controller;
150 + #gpio-cells = <2>;
151 +
152 + ralink,num-gpios = <32>;
153 + ralink,register-map = [ 00 04 08 0c
154 + 10 14 18 1c
155 + 20 24 ];
156 +
157 + status = "disabled";
158 + };
159 +
160 + gpio3: gpio@688 {
161 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
162 + reg = <0x688 0x24>;
163 +
164 + gpio-controller;
165 + #gpio-cells = <2>;
166 +
167 + ralink,num-gpios = <24>;
168 + ralink,register-map = [ 00 04 08 0c
169 + 10 14 18 1c
170 + 20 24 ];
171 +
172 + status = "disabled";
173 + };
174 +
175 + spi@b00 {
176 + compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
177 + reg = <0xb00 0x100>;
178 + #address-cells = <1>;
179 + #size-cells = <0>;
180 +
181 + status = "disabled";
182 + };
183 +
184 + uartlite@c00 {
185 + compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
186 + reg = <0xc00 0x100>;
187 +
188 + interrupt-parent = <&intc>;
189 + interrupts = <12>;
190 +
191 + reg-shift = <2>;
192 + };
193 + };
194 +
195 + ethernet@10100000 {
196 + compatible = "ralink,rt3883-eth";
197 + reg = <0x10100000 10000>;
198 +
199 + interrupt-parent = <&cpuintc>;
200 + interrupts = <5>;
201 +
202 + status = "disabled";
203 + };
204 +
205 + wmac@10180000 {
206 + compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
207 + reg = <0x10180000 40000>;
208 +
209 + interrupt-parent = <&cpuintc>;
210 + interrupts = <6>;
211 +
212 + status = "disabled";
213 + };
214 +
215 + ehci@101c0000 {
216 + compatible = "ralink,rt3883-ehci", "ehci-platform";
217 + reg = <0x101c0000 0x1000>;
218 +
219 + interrupt-parent = <&intc>;
220 + interrupts = <18>;
221 +
222 + status = "disabled";
223 + };
224 +
225 + ohci@101c1000 {
226 + compatible = "ralink,rt3883-ohci", "ohci-platform";
227 + reg = <0x101c1000 0x1000>;
228 +
229 + interrupt-parent = <&intc>;
230 + interrupts = <18>;
231 +
232 + status = "disabled";
233 + };
234 +};
235 diff --git a/arch/mips/ralink/dts/rt3883_eval.dts b/arch/mips/ralink/dts/rt3883_eval.dts
236 new file mode 100644
237 index 0000000..d4c06ed
238 --- /dev/null
239 +++ b/arch/mips/ralink/dts/rt3883_eval.dts
240 @@ -0,0 +1,52 @@
241 +/dts-v1/;
242 +
243 +/include/ "rt3883.dtsi"
244 +
245 +/ {
246 + #address-cells = <1>;
247 + #size-cells = <1>;
248 + compatible = "ralink,rt3883-eval-board", "ralink,rt3883-soc";
249 + model = "Ralink RT3883 evaluation board";
250 +
251 + memory@0 {
252 + reg = <0x0 0x4000000>;
253 + };
254 +
255 + palmbus@10000000 {
256 + sysc@0 {
257 + ralink,pinmmux = "uartlite", "spi";
258 + ralink,uartmux = "gpio";
259 + ralink,wdtmux = <0>;
260 + };
261 + };
262 +
263 + cfi@1f000000 {
264 + compatible = "cfi-flash";
265 + reg = <0x1f000000 0x800000>;
266 +
267 + bank-width = <2>;
268 + device-width = <2>;
269 + #address-cells = <1>;
270 + #size-cells = <1>;
271 +
272 + partition@0 {
273 + label = "uboot";
274 + reg = <0x0 0x30000>;
275 + read-only;
276 + };
277 + partition@30000 {
278 + label = "uboot-env";
279 + reg = <0x30000 0x10000>;
280 + read-only;
281 + };
282 + partition@40000 {
283 + label = "calibration";
284 + reg = <0x40000 0x10000>;
285 + read-only;
286 + };
287 + partition@50000 {
288 + label = "linux";
289 + reg = <0x50000 0x7b0000>;
290 + };
291 + };
292 +};
293 --
294 1.7.10.4
295