target/linux/rb532/files/arch/mips/rb500/misc.c

   1 #include <linux/module.h>
   2 #include <linux/kernel.h>   /* printk() */
   3 #include <linux/types.h>    /* size_t */
   4 #include <linux/pci.h>
   5 #include <linux/spinlock.h>
   6 #include <asm/rc32434/rb.h>
   7
   8 #define GPIO_BADDR  0xb8050000
   9
  10
  11 static volatile unsigned char *devCtl3Base = 0;
  12 static unsigned char latchU5State = 0;
  13 static spinlock_t clu5Lock = SPIN_LOCK_UNLOCKED;
  14
  15 void set434Reg(unsigned regOffs, unsigned bit, unsigned len, unsigned val) {
  16     unsigned flags, data;
  17     unsigned i = 0;
  18     spin_lock_irqsave(&clu5Lock, flags);
  19     data = *(volatile unsigned *) (IDT434_REG_BASE + regOffs);
  20     for (i = 0; i != len; ++i) {
  21         if (val & (1 << i)) data |= (1 << (i + bit));
  22         else data &= ~(1 << (i + bit));
  23     }
  24     *(volatile unsigned *) (IDT434_REG_BASE + regOffs) = data;
  25     spin_unlock_irqrestore(&clu5Lock, flags);
  26 }
  27
  28 void changeLatchU5(unsigned char orMask, unsigned char nandMask) {
  29     unsigned flags;
  30     spin_lock_irqsave(&clu5Lock, flags);
  31     latchU5State = (latchU5State | orMask) & ~nandMask;
  32     if( !devCtl3Base) devCtl3Base = (volatile unsigned char *)
  33                 KSEG1ADDR(*(volatile unsigned *) KSEG1ADDR(0x18010030));
  34     *devCtl3Base = latchU5State;
  35     spin_unlock_irqrestore(&clu5Lock, flags);
  36 }
  37
  38 u32 gpio_get(gpio_func func)
  39 {
  40         return readl((void *) GPIO_BADDR + func);
  41 }
  42
  43 void gpio_set(gpio_func func, u32 mask, u32 value)
  44 {
  45         u32 val = readl((void *) GPIO_BADDR + func);
  46
  47         val &= ~mask;
  48         val |= value & mask;
  49
  50         writel(val, (void *) GPIO_BADDR + func);
  51 }
  52
  53 EXPORT_SYMBOL(gpio_set);
  54 EXPORT_SYMBOL(gpio_get);
  55 EXPORT_SYMBOL(set434Reg);
  56 EXPORT_SYMBOL(changeLatchU5);