realtek: allow writing to "u-boot-env2"
[openwrt/staging/wigyori.git] / target / linux / realtek / dts / rtl8382_d-link_dgs-1210-10p.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "rtl838x.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 / {
9 compatible = "d-link,dgs-1210-10p", "realtek,rtl838x-soc";
10 model = "D-Link DGS-1210-10P";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 };
18
19 chosen {
20 bootargs = "console=ttyS0,115200";
21 };
22
23 memory@0 {
24 device_type = "memory";
25 reg = <0x0 0x8000000>;
26 };
27
28 leds {
29 compatible = "gpio-leds";
30
31 led_power: power {
32 // GPIO 24 seems to provide power to the leds
33 label = "green:power";
34 gpios = <&gpio0 47 GPIO_ACTIVE_LOW>;
35 };
36 };
37
38 keys {
39 compatible = "gpio-keys-polled";
40 poll-interval = <20>;
41
42 mode {
43 label = "reset";
44 gpios = <&gpio0 94 GPIO_ACTIVE_LOW>;
45 linux,code = <KEY_RESTART>;
46 };
47 };
48 };
49
50
51 &gpio0 {
52 indirect-access-bus-id = <0>;
53 };
54
55 &spi0 {
56 status = "okay";
57 flash@0 {
58 compatible = "jedec,spi-nor";
59 reg = <0>;
60 spi-max-frequency = <10000000>;
61
62 partitions {
63 compatible = "fixed-partitions";
64 #address-cells = <1>;
65 #size-cells = <1>;
66
67 partition@0 {
68 label = "u-boot";
69 reg = <0x00000000 0x80000>;
70 read-only;
71 };
72 partition@80000 {
73 label = "u-boot-env";
74 reg = <0x00080000 0x40000>;
75 read-only;
76 };
77 partition@c0000 {
78 label = "u-boot-env2";
79 reg = <0x000c0000 0x40000>;
80 };
81 partition@280000 {
82 label = "firmware";
83 compatible = "denx,uimage";
84 reg = <0x00100000 0xd80000>;
85 };
86 partition@be80000 {
87 label = "kernel2";
88 reg = <0x00e80000 0x180000>;
89 };
90 partition@1000000 {
91 label = "sysinfo";
92 reg = <0x01000000 0x40000>;
93 };
94 partition@1040000 {
95 label = "rootfs2";
96 reg = <0x01040000 0xc00000>;
97 };
98 partition@1c40000 {
99 label = "jffs2";
100 reg = <0x01c40000 0x3c0000>;
101 };
102 };
103 };
104 };
105
106 &ethernet0 {
107 mdio: mdio-bus {
108 compatible = "realtek,rtl838x-mdio";
109 regmap = <&ethernet0>;
110 #address-cells = <1>;
111 #size-cells = <0>;
112
113 INTERNAL_PHY(8)
114 INTERNAL_PHY(9)
115 INTERNAL_PHY(10)
116 INTERNAL_PHY(11)
117 INTERNAL_PHY(12)
118 INTERNAL_PHY(13)
119 INTERNAL_PHY(14)
120 INTERNAL_PHY(15)
121 INTERNAL_PHY(24)
122 INTERNAL_PHY(26)
123 };
124 };
125
126 &switch0 {
127 ports {
128 #address-cells = <1>;
129 #size-cells = <0>;
130
131 SWITCH_PORT(8, 1, internal)
132 SWITCH_PORT(9, 2, internal)
133 SWITCH_PORT(10, 3, internal)
134 SWITCH_PORT(11, 4, internal)
135 SWITCH_PORT(12, 5, internal)
136 SWITCH_PORT(13, 6, internal)
137 SWITCH_PORT(14, 7, internal)
138 SWITCH_PORT(15, 8, internal)
139 SWITCH_SFP_PORT(24, 9, rgmii-id)
140 SWITCH_SFP_PORT(26, 10, rgmii-id)
141
142 port@28 {
143 ethernet = <&ethernet0>;
144 reg = <28>;
145 phy-mode = "internal";
146 fixed-link {
147 speed = <1000>;
148 full-duplex;
149 };
150 };
151 };
152 };