provide an early ioremap cookie of the system configuration register
authorFlorian Fainelli <florian@openwrt.org>
Sat, 23 Jun 2012 11:03:50 +0000 (11:03 +0000)
committerFlorian Fainelli <florian@openwrt.org>
Sat, 23 Jun 2012 11:03:50 +0000 (11:03 +0000)
SVN-Revision: 32489

target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/clock.c
target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/common.c
target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/common.h
target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/debug-macro.S
target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/mcs814x.h
target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/uncompress.h

index 1d1324b6eae5189ceee3fe1d70b00255562981d0..88ecdffbb2e0f7cf74c56b6f72f50f2550b1ba1a 100644 (file)
@@ -16,6 +16,8 @@
 
 #include <mach/mcs814x.h>
 
+#include "common.h"
+
 #define KHZ    1000
 #define MHZ    (KHZ * KHZ)
 
@@ -32,7 +34,7 @@ struct clk {
        unsigned long divider;          /* clock divider */
        u32 usecount;                   /* reference count */
        struct clk_ops *ops;            /* clock operation */
-       void __iomem *enable_reg;       /* clock enable register */
+       u32 enable_reg;                 /* clock enable register */
        u32 enable_mask;                /* clock enable mask */
 };
 
@@ -52,13 +54,13 @@ static int clk_local_onoff_enable(struct clk *clk, int enable)
        if (!clk->enable_reg)
                return 0;
 
-       tmp = __raw_readl(clk->enable_reg);
+       tmp = __raw_readl(mcs814x_sysdbg_base + clk->enable_reg);
        if (!enable)
                tmp &= ~clk->enable_mask;
        else
                tmp |= clk->enable_mask;
 
-       __raw_writel(tmp, clk->enable_reg);
+       __raw_writel(tmp, mcs814x_sysdbg_base + clk->enable_reg);
 
        return 0;
 }
@@ -117,19 +119,19 @@ static struct clk clk_wdt = {
 
 static struct clk clk_emac = {
        .ops            = &default_clk_ops,
-       .enable_reg     = (void __iomem *)(_CONFADDR_SYSDBG + SYSDBG_SYSCTL),
+       .enable_reg     = SYSDBG_SYSCTL,
        .enable_mask    = SYSCTL_EMAC,
 };
 
 static struct clk clk_ephy = {
        .ops            = &default_clk_ops,
-       .enable_reg     = (void __iomem *)(_CONFADDR_SYSDBG + SYSDBG_PLL_CTL),
-       .enable_mask    = ~(1 << 0),
+       .enable_reg     = SYSDBG_PLL_CTL,
+       .enable_mask    = ~SYSCTL_EPHY, /* active low */
 };
 
 static struct clk clk_cipher = {
        .ops            = &default_clk_ops,
-       .enable_reg     = (void __iomem *)(_CONFADDR_SYSDBG + SYSDBG_SYSCTL),
+       .enable_reg     = SYSDBG_SYSCTL,
        .enable_mask    = SYSCTL_CIPHER,
 };
 
@@ -252,7 +254,7 @@ void __init mcs814x_clk_init(void)
        clkdev_add_table(mcs814x_chip_clks, ARRAY_SIZE(mcs814x_chip_clks));
 
        /* read the bootstrap registers to know the exact clocking scheme */
-       bs1 = __raw_readl(_CONFADDR_SYSDBG + SYSDBG_BS1);
+       bs1 = __raw_readl(mcs814x_sysdbg_base + SYSDBG_BS1);
        cpu_freq = (bs1 >> CPU_FREQ_SHIFT) & CPU_FREQ_MASK;
 
        pr_info("CPU frequency: %lu (kHz)\n", cpu_freq_table[cpu_freq]);
index e9926b3b348ce5a2a924d6d7e90d005a5f72e567..87193a31edd31d91f70e68e8027268c21de815c4 100644 (file)
@@ -23,6 +23,8 @@
 #include <asm/pgtable.h>
 #include <asm/mach/map.h>
 
+void __iomem *mcs814x_sysdbg_base;
+
 static struct map_desc mcs814x_io_desc[] __initdata = {
        {
                .virtual        = MCS814X_IO_BASE,
@@ -65,34 +67,34 @@ static void mcs814x_eth_hardware_filter_set(u8 value)
 {
        u32 reg;
 
-       reg = __raw_readl(_CONFADDR_DBGLED);
+       reg = __raw_readl(MCS814X_VIRT_BASE + MCS814X_DBGLED);
        if (value)
                reg |= 0x80;
        else
                reg &= ~0x80;
-       __raw_writel(reg, _CONFADDR_DBGLED);
+       __raw_writel(reg, MCS814X_VIRT_BASE + MCS814X_DBGLED);
 }
 
 static void mcs814x_eth_led_cfg_set(u8 cfg)
 {
        u32 reg;
 
-       reg = __raw_readl(_CONFADDR_SYSDBG + SYSDBG_BS2);
+       reg = __raw_readl(mcs814x_sysdbg_base + SYSDBG_BS2);
        reg &= ~LED_CFG_MASK;
        reg |= cfg;
-       __raw_writel(reg, _CONFADDR_SYSDBG + SYSDBG_BS2);
+       __raw_writel(reg, mcs814x_sysdbg_base + SYSDBG_BS2);
 }
 
 static void mcs814x_eth_buffer_shifting_set(u8 value)
 {
        u8 reg;
 
-       reg = __raw_readb(_CONFADDR_SYSDBG + SYSDBG_SYSCTL_MAC);
+       reg = __raw_readb(mcs814x_sysdbg_base + SYSDBG_SYSCTL_MAC);
        if (value)
                reg |= BUF_SHIFT_BIT;
        else
                reg &= ~BUF_SHIFT_BIT;
-       __raw_writeb(reg, _CONFADDR_SYSDBG + SYSDBG_SYSCTL_MAC);
+       __raw_writeb(reg, mcs814x_sysdbg_base + SYSDBG_SYSCTL_MAC);
 }
 
 static struct of_device_id mcs814x_eth_ids[] __initdata = {
@@ -130,7 +132,7 @@ void __init mcs814x_init_machine(void)
        u32 bs2, cpu_mode;
        int gpio;
 
-       bs2 = __raw_readl(_CONFADDR_SYSDBG + SYSDBG_BS2);
+       bs2 = __raw_readl(mcs814x_sysdbg_base + SYSDBG_BS2);
        cpu_mode = (bs2 >> CPU_MODE_SHIFT) & CPU_MODE_MASK;
 
        pr_info("CPU mode: %s\n", cpu_modes[cpu_mode].name);
@@ -148,9 +150,14 @@ void __init mcs814x_init_machine(void)
 void __init mcs814x_map_io(void)
 {
        iotable_init(mcs814x_io_desc, ARRAY_SIZE(mcs814x_io_desc));
+
+       mcs814x_sysdbg_base = ioremap(MCS814X_IO_START + MCS814X_SYSDBG,
+                                       MCS814X_SYSDBG_SIZE);
+       if (!mcs814x_sysdbg_base)
+               panic("unable to remap sysdbg base");
 }
 
 void mcs814x_restart(char mode, const char *cmd)
 {
-       __raw_writel(~(1 << 31), _CONFADDR_SYSDBG);
+       __raw_writel(~(1 << 31), mcs814x_sysdbg_base);
 }
index bf25cbfe681af9452422d85e9673c61e5e68f271..e523abeb21c7dda9c3373fd8ceff7187ed524cf0 100644 (file)
@@ -10,5 +10,6 @@ void mcs814x_init_machine(void);
 void mcs814x_handle_irq(struct pt_regs *regs);
 void mcs814x_restart(char mode, const char *cmd);
 extern struct sys_timer mcs814x_timer;
+extern void __iomem *mcs814x_sysdbg_base;
 
 #endif /* __ARCH_MCS814X_COMMON_H */
index 5c6d373ae707c414701aff024a71951af4d73bcd..93ecea4ed265e915d65ab061a2ccf3a9917daa42 100644 (file)
@@ -1,10 +1,10 @@
 #include <mach/mcs814x.h>
 
                 .macro  addruart, rp, rv, tmp
-               ldr     \rp, =_PHYS_CONFADDR
-               ldr     \rv, =_VIRT_CONFADDR
-               orr     \rp, \rp, #_CONFOFFSET_UART
-               orr     \rv, \rv, #_CONFOFFSET_UART
+               ldr     \rp, =MCS814X_PHYS_BASE
+               ldr     \rv, =MCS814X_VIRT_BASE
+               orr     \rp, \rp, #MCS814X_UART
+               orr     \rv, \rv, #MCS814X_UART
                 .endm
 
 #define UART_SHIFT     2
index 9dd09d0a44d24061594a6ffdb49f3a42ce67d451..2851ba49d6e9ed4711d3001033600aa21e010146 100644 (file)
 #define MCS814X_IRQ_MASK       0x20
 #define MCS814X_IRQ_STS0       0x40
 
-#define _PHYS_CONFADDR         0x40000000
-#define _VIRT_CONFADDR         MCS814X_IO_BASE
+#define MCS814X_PHYS_BASE      0x40000000
+#define MCS814X_VIRT_BASE      MCS814X_IO_BASE
 
-#define _CONFOFFSET_UART    0x000DC000
-#define _CONFOFFSET_DBGLED  0x000EC000
-#define _CONFOFFSET_SYSDBG  0x000F8000
-
-#define _CONFADDR_DBGLED  (_VIRT_CONFADDR + _CONFOFFSET_DBGLED)
-#define _CONFADDR_SYSDBG  (_VIRT_CONFADDR + _CONFOFFSET_SYSDBG)
+#define MCS814X_UART           0x000DC000
+#define MCS814X_DBGLED         0x000EC000
+#define MCS814X_SYSDBG         0x000F8000
+#define MCS814X_SYSDBG_SIZE    0x50
 
 /* System configuration and bootstrap registers */
 #define SYSDBG_BS1             0x00
@@ -46,6 +44,7 @@
 
 #define SYSDBG_SYSCTL          0x08
 #define  SYSCTL_EMAC           (1 << 0)
+#define  SYSCTL_EPHY           (1 << 1) /* active low */
 #define  SYSCTL_CIPHER         (1 << 16)
 
 #define SYSDBG_PLL_CTL         0x3C
index 2362e3c95e85de051e126d4dd0da174724df6187..cf3ed9a1a603f25b1014f3f7f55ca9d3bc89e8fe 100644 (file)
@@ -32,7 +32,7 @@ static inline void flush(void)
 static inline void arch_decomp_setup(void)
 {
        if (soc_is_mcs8140())
-               uart_base = (void __iomem *)(_PHYS_CONFADDR + _CONFOFFSET_UART);
+               uart_base = (void __iomem *)(MCS814X_PHYS_BASE +MCS814X_UART);
 }
 
 #define arch_decomp_wdog()