package/boot/uboot-oxnas/files/arch/arm/include/asm/arch-nas782x/clock.h

   1 #ifndef _NAS782X_CLOCK_H
   2 #define _NAS782X_CLOCK_H
   3
   4 #include <asm/arch/sysctl.h>
   5 #include <asm/arch/cpu.h>
   6
   7 /* bit numbers of clock control register */
   8 #define SYS_CTRL_CLK_COPRO  0
   9 #define SYS_CTRL_CLK_DMA    1
  10 #define SYS_CTRL_CLK_CIPHER 2
  11 #define SYS_CTRL_CLK_SD     3
  12 #define SYS_CTRL_CLK_SATA   4
  13 #define SYS_CTRL_CLK_I2S    5
  14 #define SYS_CTRL_CLK_USBHS  6
  15 #define SYS_CTRL_CLK_MACA   7
  16 #define SYS_CTRL_CLK_MAC   SYS_CTRL_CLK_MACA
  17 #define SYS_CTRL_CLK_PCIEA  8
  18 #define SYS_CTRL_CLK_STATIC 9
  19 #define SYS_CTRL_CLK_MACB   10
  20 #define SYS_CTRL_CLK_PCIEB  11
  21 #define SYS_CTRL_CLK_REF600 12
  22 #define SYS_CTRL_CLK_USBDEV 13
  23 #define SYS_CTRL_CLK_DDR    14
  24 #define SYS_CTRL_CLK_DDRPHY 15
  25 #define SYS_CTRL_CLK_DDRCK  16
  26
  27 /* bit numbers of reset control register */
  28 #define SYS_CTRL_RST_SCU          0
  29 #define SYS_CTRL_RST_COPRO        1
  30 #define SYS_CTRL_RST_ARM0         2
  31 #define SYS_CTRL_RST_ARM1         3
  32 #define SYS_CTRL_RST_USBHS        4
  33 #define SYS_CTRL_RST_USBHSPHYA    5
  34 #define SYS_CTRL_RST_MACA         6
  35 #define SYS_CTRL_RST_MAC        SYS_CTRL_RST_MACA
  36 #define SYS_CTRL_RST_PCIEA        7
  37 #define SYS_CTRL_RST_SGDMA        8
  38 #define SYS_CTRL_RST_CIPHER       9
  39 #define SYS_CTRL_RST_DDR          10
  40 #define SYS_CTRL_RST_SATA         11
  41 #define SYS_CTRL_RST_SATA_LINK    12
  42 #define SYS_CTRL_RST_SATA_PHY     13
  43 #define SYS_CTRL_RST_PCIEPHY      14
  44 #define SYS_CTRL_RST_STATIC       15
  45 #define SYS_CTRL_RST_GPIO         16
  46 #define SYS_CTRL_RST_UART1        17
  47 #define SYS_CTRL_RST_UART2        18
  48 #define SYS_CTRL_RST_MISC         19
  49 #define SYS_CTRL_RST_I2S          20
  50 #define SYS_CTRL_RST_SD           21
  51 #define SYS_CTRL_RST_MACB         22
  52 #define SYS_CTRL_RST_PCIEB        23
  53 #define SYS_CTRL_RST_VIDEO        24
  54 #define SYS_CTRL_RST_DDR_PHY      25
  55 #define SYS_CTRL_RST_USBHSPHYB    26
  56 #define SYS_CTRL_RST_USBDEV       27
  57 #define SYS_CTRL_RST_ARMDBG       29
  58 #define SYS_CTRL_RST_PLLA         30
  59 #define SYS_CTRL_RST_PLLB         31
  60
  61 static inline void reset_block(int block, int reset)
  62 {
  63         u32 reg;
  64         if (reset)
  65                 reg = SYS_CTRL_RST_SET_CTRL;
  66         else
  67                 reg = SYS_CTRL_RST_CLR_CTRL;
  68
  69         writel(BIT(block), reg);
  70 }
  71
  72 static inline void enable_clock(int block)
  73 {
  74         writel(BIT(block), SYS_CTRL_CLK_SET_CTRL);
  75 }
  76
  77 static inline void disable_clock(int block)
  78 {
  79         writel(BIT(block), SYS_CTRL_CLK_CLR_CTRL);
  80 }
  81
  82 int plla_set_config(int idx);
  83
  84 #endif /* _NAS782X_CLOCK_H */