f24d4697c16c75b51be9e63c1e9f39ca6f02b1ec
[openwrt/staging/yousong.git] / target / linux / ar71xx / files / arch / mips / ar71xx / dev-ap91-pci.c
1 /*
2 * Atheros AP91 reference board PCI initialization
3 *
4 * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/pci.h>
12 #include <linux/ath9k_platform.h>
13 #include <linux/delay.h>
14
15 #include <asm/mach-ar71xx/ar71xx.h>
16 #include <asm/mach-ar71xx/pci.h>
17
18 #include "dev-ap91-pci.h"
19
20 static struct ath9k_platform_data ap91_wmac_data;
21 static char ap91_wmac_mac[6];
22 static int ap91_pci_fixup_enabled;
23
24 static struct ar71xx_pci_irq ap91_pci_irqs[] __initdata = {
25 {
26 .slot = 0,
27 .pin = 1,
28 .irq = AR71XX_PCI_IRQ_DEV0,
29 }
30 };
31
32 static int ap91_pci_plat_dev_init(struct pci_dev *dev)
33 {
34 switch(PCI_SLOT(dev->devfn)) {
35 case 0:
36 dev->dev.platform_data = &ap91_wmac_data;
37 break;
38 }
39
40 return 0;
41 }
42
43 static void ap91_pci_fixup(struct pci_dev *dev)
44 {
45 void __iomem *mem;
46 u16 *cal_data;
47 u16 cmd;
48 u32 val;
49
50 if (!ap91_pci_fixup_enabled)
51 return;
52
53 printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
54
55 cal_data = ap91_wmac_data.eeprom_data;
56 if (*cal_data != 0xa55a) {
57 printk(KERN_ERR "PCI: no calibration data found for %s\n",
58 pci_name(dev));
59 return;
60 }
61
62 mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
63 if (!mem) {
64 printk(KERN_ERR "PCI: ioremap error for device %s\n",
65 pci_name(dev));
66 return;
67 }
68
69 /* Setup the PCI device to allow access to the internal registers */
70 switch (ar71xx_soc) {
71 case AR71XX_SOC_AR7240:
72 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff);
73 break;
74
75 case AR71XX_SOC_AR7241:
76 case AR71XX_SOC_AR7242:
77 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff);
78 break;
79
80 default:
81 BUG();
82 }
83
84 pci_read_config_word(dev, PCI_COMMAND, &cmd);
85 cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
86 pci_write_config_word(dev, PCI_COMMAND, cmd);
87
88 /* set pointer to first reg address */
89 cal_data += 3;
90 while (*cal_data != 0xffff) {
91 u32 reg;
92 reg = *cal_data++;
93 val = *cal_data++;
94 val |= (*cal_data++) << 16;
95
96 __raw_writel(val, mem + reg);
97 udelay(100);
98 }
99
100 pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
101 dev->vendor = val & 0xffff;
102 dev->device = (val >> 16) & 0xffff;
103
104 pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
105 dev->revision = val & 0xff;
106 dev->class = val >> 8; /* upper 3 bytes */
107
108 iounmap(mem);
109 }
110 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ap91_pci_fixup);
111
112 void __init ap91_pci_init(u8 *cal_data, u8 *mac_addr)
113 {
114 if (cal_data)
115 memcpy(ap91_wmac_data.eeprom_data, cal_data,
116 sizeof(ap91_wmac_data.eeprom_data));
117
118 if (mac_addr) {
119 memcpy(ap91_wmac_mac, mac_addr, sizeof(ap91_wmac_mac));
120 ap91_wmac_data.macaddr = ap91_wmac_mac;
121 }
122
123 ar71xx_pci_plat_dev_init = ap91_pci_plat_dev_init;
124 ar71xx_pci_init(ARRAY_SIZE(ap91_pci_irqs), ap91_pci_irqs);
125
126 ap91_pci_fixup_enabled = 1;
127 }